Problem with the stack on m68k
Noah Aklilu
naklilu@ualberta.ca
Thu May 18 19:03:00 GMT 2000
The problem seems to be related to the external hardware that I
have connected to it (a couple of Xilinx FPGAs). My program was
a glorified memory tester, so I changed the address range to the on
board dram and it worked fine. The 68306 has a built in dram
controller so no external address decoding was required, when
interfacing to the FPGAs which use the lower 24 bits for decoding
(the rest is controlled by chip select), somehow that causes it to
generate spurious errors. But thanks for your help, definitely
helped me eliminate some of my problems.
Noah Aklilu
MSc Graduate Student
Dept of Electrical and Computer Engineering
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