section alignment in ld.

Ian Lance Taylor
Sun Aug 13 09:00:00 GMT 2000

   Date: Sun, 13 Aug 2000 10:54:47 -0500
   From: Christopher Bahns <>

   >   From: "Palmer.Chris" <>
   >   Date: Mon, 17 Jan 2000 09:53:51 -0800
   >           I have noticed that m68k-coff-ld aligns each file within a
   >   on 4 byte boundaries. While this is appropriate for 32 bit bus CPU's
   it is
   >   wasteful for 16 bit members of the family. It causes me a problem
   because I
   >   need my retained variables to be in the same locations they were
   when my
   >   application was compiled with another compiler. This would be the
   case if I
   >   could make ld align on two byte boundaries. Does anybody now how to
   do this?
   >Change COFF_DEFAULT_SECTION_ALIGNMENT_POWER in bfd/coff-m68k.c, and

   I did what you say here, Ian, for the COFF object format, but am trying
   to use ELF now and having the same problem. Obviously your
   recommendation is COFF-specific. I have tried to build with ELF and have
   verified that it is aligning sections on 4-byte boundaries (I need to
   align on 2-byte boundaries). I grep'ed in the binutils-2.10/bfd
   directory for "SECTION" and "ALIGNMENT" and saw nothing obvious that
   applied to ELF.

   Any ideas on how to do the same thing using ELF?

WIth ELF, you can control the alignment on a section by section
basis.  ELF does not by default align sections at all.  If your code
is getting aligned on 4-byte boundaries, it is because you have .align
directives in your assembler source which are forcing that to happen.

Note that for the m68k, the .align directive appears to be different
for COFF and ELF.  For COFF, the argument appears to be interpreted as
a power of two (e.g., .align is equivalent to .p2align).  For ELF, the
argument appears to be interpreted as a byte count (e.g., .align is
equivalent to .balign).


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