FW: Results of "downloading compressed program images" request
Robert J. Brown
rj@eli.elilabs.com
Fri Jan 23 18:43:00 GMT 1998
First off, I guess everyone on this list has heard by now that
Netscape is giving away the source to their browser. I want to
congratulate Richard on a fine job with the NPR interview this
afternoon! This thread being discussed here could not have happened
at a more serendipitous time. If Netscape can do it, and Sun has
already done it with NFS and olwm, then we have empirical evidence
that we are on the right track!
>>>>> "Alec" == Alec Cawley <alec@cawley.demon.co.uk> writes:
Alec> It seems to me that the publication of good hardware designs
Alec> is as much a public good as the publication of good software
Alec> design. If a designer has a greater library of proven
Alec> solutions at his fingertips, he can create better
Alec> producs. He has to spend less time reinventing the wheel.
Alec> By insisting on GPL/GPLL for hardware designs, the FSF is
Alec> promoting (to the best of it's limited ability) the approach
Alec> of the originator loosing a small potential monopoly profit
Alec> in order to achieve a much greater public benefit into the
Alec> hardware arena. It seems to me exactly in accordance with
Alec> the FSF philosopy and aims that it should do so. The
Alec> benefits, however large or small they may be, to those who
Alec> chose to take the proprietary path, are no concern to the
Alec> FSF.
I missed something. Where does the FSF "insist" on GPL for *HARDWARE*
designs? (see below...)
Alec> In fact, it seems to me that the barriers to copying in
Alec> hardware are far greater than in software. I can copy a
Alec> complete software product with a few keystrokes. To
Alec> duplicate the hardware, I have to get a machine readable
Alec> circuit diagram, lay it out, get it manufactured, get it
Alec> populated, obtain sources for programmables....
Actually, most new integrated circuits are designed with a programming
language for describing and simulating digital circuit behaviour. The
2 dominant languages are Verilog and VHDL. They each have their good
and bad points. But my point is this: hardware is just a source file
too, just like software!
So when will the FSF start addressing the development of hardware?
There is already a Verilog simulation system available under GPL or
some other free software arrangement. What is needed is a
systhesizer, which is the tool that converts the HDL to a netlist of
low level gates, somewhat like the code generation phase of a software
compiler, and a floorplanning tool, which essentially does the job of
a linking loader for hardware.
Then, once the free tools are available, we need to build up a body of
free circuits -- cpus, memory managers, device controllers, signal
processors, memories, graphics accelerators, encryption engines, etc.
With such a library to draw on, the users of free hardware could
design devices quickly and easily.
The first synthesizer targets should be FPGAs, since no foundry is
needed. This should significantly increase sales of FPGA chips, so
one could expect the FPGA vendors to subsidize the development of
these targets.
Alec> -- Alec Cawley Newbury Berks, UK
--
-------- "And there came a writing to him from Elijah" [2Ch 21:12] --------
Robert Jay Brown III rj@eli.elilabs.com http://www.elilabs.com 1 847 705-0424
Elijah Laboratories Inc.; 37 South Greenwood Avenue; Palatine, IL 60067-6328
----- M o d e l i n g t h e M e t h o d s o f t h e M i n d ------
More information about the crossgcc
mailing list