Assembly, GCC and the linker
Fri Jan 31 18:18:00 GMT 1997
> I have a few #define in a .h file that are needed by C, asm
> and linker. Is there a way to do this without declaring them in
> 3 files.
> I tried to #include the .h file in the assembley file and feed it to
> the c preprocessor. The output had the #include file data in it, so 'as'
> What parameters should I pass to the preprocessor to get it to output
> something that can be fed to AS?
> or How can I do the above step in 1 shot.
When you compile .S files (assembly with preprocessor) gcc should set a
preprocessor symbol to indicate that it is doing assembler. On my Linux box,
this symbol is __ASSEMBLER__, I would expect it to be the same for you. To
check, just give gcc the -v flag.
You can then #ifdef out the bits of your .h files that are unpalatable to the
> I am compiling in a dos box under NT and make (or NT) doesn't see .S and
> .s files as different, it treats both as assembler. Is this an issue?
I'd say so. If it sees them all as .s, then give gcc the -x switch, to specify
the language explicitly (I think this would be "-x assembler-with-cpp").
> I need to allocate a block of memory in the linker file.
> The size of the block is a function of values declared in the .h
> file but the location must be specified by the linker
> Can I pass a value from a 'c' style #include file to the linker?
Well, a quick scan of the linker doco indicates no include facility for linker
command files. So as I see it, you have two options.
1) Build a template linker command file, with C preprocessor constructs, then
explicitly run it through cpp and feed the resultant to ld.
2) ensure that your C or asm code defines linker symbols with the values you
want from the #define s. This way the linker can reference the values of these
symbols exactly as it would any other symbol.
I personally prefer approach 2.
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