cgen -> opcodes problem

[Dmitry Eremin-Solenikov]

Hello all,

I'm back to my m68hc08 binutils port done via cgen.
Recently I've again stumbled upon a problem with instructions,
whose base? length != ISA base length.

E.g. in the attached stripped test case, the 'ttt' instruction either
(should be assembled as 0x9E 0xF1) is misencoded as 0xsmth 0x00.
Is this my fault? Or is this the expected behaviour and I should define
f-seccode in some other way?

Could you please help me?

-- 
With best wishes
Dmitry

-------------- next part --------------
; Freescale M68HC08/HCS08 opcode support, for GNU Binutils.  -*- Scheme -*-
;
; Copyright 2009 Free Software Foundation, Inc.
;
; This file is part of the GNU Binutils.
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
; MA 02110-1301, USA.

(include "simplify.inc")

(define-pmacro (dif x-name x-comment x-attrs x-word-offset x-word-length x-start x-length x-mode x-encode x-decode)
  (define-ifield
    (name x-name)
    (comment x-comment)
    (.splice attrs (.unsplice x-attrs))
    (word-offset x-word-offset)
    (word-length x-word-length)
    (start x-start)
    (length x-length)
    (mode x-mode)
    (.if (.equal? x-encode #f)
	    (encode #f)
	    (.splice encode (.unsplice x-encode)))
    (.if (.equal? x-decode #f)
	    (decode #f)
	    (.splice decode (.unsplice x-decode)))
    )
)

(define-pmacro (dnif x-name x-comment x-attrs x-word-offset x-word-length x-start x-length)
  (dif x-name x-comment x-attrs x-word-offset x-word-length x-start x-length
       UINT #f #f)
)

; define-arch must appear first

(define-arch
  (name m68hc08) ; name of cpu architecture
  (comment "M68HC08")
  (insn-lsb0? #f)
  (machs m68hc08)
  (isas m68hc08)
)

(define-isa
  (name m68hc08)
  (base-insn-bitsize 8)
  (default-insn-word-bitsize 8)
  (liw-insns 1)
  (parallel-insns 1)
)

; Cpu family definitions.
;
(define-cpu
  (name m68hc08bf)
  (endian big)
  (word-bitsize 8)
)

(define-mach
  (name m68hc08)
  (cpu m68hc08bf)
)

(define-model
  (name m68hc08)
  (comment "Generic M68HC08 model")
  (attrs)
  (mach m68hc08)
  (unit u-exec "Execution Unit" ()
	1 1 ; issue done
	() ; state
	() ; inputs
	() ; outputs
	() ; profile action (default)
	)
)

(define-hardware
  (name h-pc)
  (comment "M68HC08 program counter")
  (attrs PC)
  (type pc UHI)
)

(dsh h-a "Accumulator" () (register QI))

(dnif f-bitsel "bit for bit set/clear ops" () 0 8 4 3)
(dno bitsel "bit for bit set/clear ops" () h-uint f-bitsel)

(dnif f-opcode "first insn byte" () 0 8 0 8)

(define-pmacro (build-hex2 num) (.hex num 2))
(define-normal-insn-enum insn-opcode "insn opcode enums" () OP_ f-opcode
  (.map .upcase (.map build-hex2 (.iota 256)))
)


(dni nop
  "nop"
  ()
  "nop"
  (+ OP_9D)
  (nop)
  ()
)


;(dnif f-seccode "second insn byte" () 0 16 8 8)
(dnif f-seccode "second insn byte" () 8 8 0 8)
(define-normal-insn-enum p-insn-opcode "insn opcode enums" () SEC_ f-seccode
  (.map .upcase (.map build-hex2 (.iota 256)))
)

(dni ttt "ttt insn" ()
     "ttt"
     (+ OP_9E SEC_F1)
     (nop)
     ())