opcode bits beyond base-insn-bitsize

Doug Evans dje@sebabeach.org
Tue Dec 24 10:08:00 GMT 2002


   Date: Tue, 24 Dec 2002 12:52:59 -0500
   From: DJ Delorie <dj@redhat.com>

   > Can anyone remember what the details are?
   > i.e. what didn't work?  assembler? disassembler? simulator?

   xstormy16 has both 16bit and 32bit opcodes, and some of the 32bit
   opcodes have decodable bits in the second half.  The base-insn-bitsize
   is used to set up the masks and such, so it needs to be at least as
   big as the largest decodable bits.

s/needs/needed/
There is no intent that this is how things should work.

IIRC the simulator fetches and decodes additional bits as necessary.
In the case of opcodes support, there should be additional masks
as appropriate.

   The tricky bit is when the 32-bit opcodes are mixed endian (i.e.  the
   first 16 bits are swapped independently of the second 16 bits,
   resulting in ABCD or BADC endian, but not DCBA).

Yes, that adds extra trickyness, especially
if base-insn-bitsize is 32 and not 16.



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