variable width instructions

[Doug Evans]

Dave Carney writes:
 > I'm trying to write a .cpu file for a simple, non-pipelined (CISC) chip.  The 
 > instructions and data are all 16 bits (little endian).  Defining the 
 > instruction fields was relatively straight forward, until I realised that 
 > instructions involving 'immediate' datum are, in fact, 32 bits...

I cooked up a hypothetical example to try to help illustrate what to do.
Plus I've spiff'd up the docs in this area a teensy bit.
See the Porting guide, "Writing define-ifield".

Suppose an ISA has 16 bit insns, with optional 16 and 32 bit immediates,
plus for illustration's sake some insns may take a 32 bit immediate
followed by a 16 bit immediate, and vice-versa.

If lsb0? = #f:

(dnf f-op1       "op1"                 () 0 4)
(dnf f-op2       "op2"                 () 4 4)
(dnf f-op3       "op3"                 () 8 4)
(dnf f-op4       "op4"                 () 12 4)
(dnf f-r1        "r1"                  () 8 4)
(dnf f-r2        "r2"                  () 12 4)
(df  f-simm16     "simm16"             () 16 16 INT #f #f)
(df  f-simm16b    "16 bit signed immediate after simm32" () 48 16 INT #f #f)
(df  f-simm32     "simm32"             () 16 32 INT #f #f)
(df  f-simm32b    "32 bit signed immediate after simm16" () 32 32 INT #f #f)

If lsb0? = #t:

(dnf f-op1       "op1"                 () 15 4)
(dnf f-op2       "op2"                 () 11 4)
(dnf f-op3       "op3"                 () 7 4)
(dnf f-op4       "op4"                 () 3 4)
(dnf f-r1        "r1"                  () 7 4)
(dnf f-r2        "r2"                  () 3 4)
(df  f-simm16     "simm16"             () 31 16 INT #f #f)
(df  f-simm16b    "16 bit signed immediate after simm32" () 63 16 INT #f #f)
(df  f-simm32     "simm32"             () 47 32 INT #f #f)
(df  f-simm32b    "32 bit signed immediate after simm16" () 63 32 INT #f #f)

I haven't actually generated the tools from this.
If there are problems, let us know and we'll fix 'em.
The fr30 port, while obsoleted, worked at one point and as you've found
it has some insns that take an optional 32 bit immediate.