make CGEN a less moving target?

[Frank Ch. Eigler]

Hi -


dje wrote:
> So how about rephrase it as:
> This is what the h/w first fetches to decode an insn.

Dunno about that.

> For non-liw architectures this is the size of the smallest instruction.

If by "non-liw" you mean "RISC", then all instructions have the same size
and this is trivial.
For variable-length instruction sets, things just seem to work best when 
base-insn-size includes all the non-operand bits of the longest instruction.


- FChE
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