make CGEN a less moving target?

[Frank Ch. Eigler]

Hi -

>  > The most important value is the base-insn-size.  This should be
>  > large enough to include all opcode-like bits in the longest
>  > instruction, so most likely 16 or even 32 for this chip.  [...]
> 
> If the definition of base-insn-size has been changed to this that's a bummer.
> When did this go in?

I believe this is a practical description of what actually tends
to work with the opcodes/sim/sid runtimes, and does not relate to
any recent patches.


- FChE
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