delay slot and !pbb

[Frank Ch. Eigler]

Hi -

: I need some suggestions.  I'm working on my GNU Simulators port of
: OpenRISC.  

Okay.

: I want the simulator to be as real as the real thing as
: possible, so I decided to use a simple engine with scache and not
: pbb.  

The choice of instruction engine affects performance and complexity
of implementation, not fidelity.

: Anyone got any suggestions how I should implement the delay slot
: handling in the best way?

If you're planning to build a simulator for the gdb/sim collection,
see sim/fr30/mloop.in.  If a sid-based simulator, methinks we haven't
released to the public any ports with delay slots, but the code
involved is straightforward, and we could provide relevant excerpts
for the sid/component/cgen-cpu/CPU/CPU.cxx:step_insns function.

- FChE
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