Endian sensitive semantics

[Ben Elliston]

Hi,

I am trying to describe some load and store instructions that deal with
misaligned addresses.  Their semantics depend on the endianness of the cpu.  
How should these be dealt with?

I could escape to C to handle this (so that I have the cpu's endianness
available from relevant cpu state records), but I'd prefer to keep
everything written in high level RTL to maintain cross-framework
portability.

Thanks!

Ben