From f2629caa6c5ba0a78d92114bbe0b2bbb72ed673a Mon Sep 17 00:00:00 2001 From: LiliCui Date: Thu, 25 Jul 2019 09:38:50 +0800 Subject: [PATCH] Add support for intel TSXLDTRK instructions gas/ChangeLog: 2020-04-02 Lili Cui * config/tc-i386.c (cpu_arch): Add .TSXLDTRK. (cpu_noarch): Likewise. * doc/c-i386.texi: Document TSXLDTRK. * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests. * testsuite/gas/i386/tsxldtrk.d: Likewise. * testsuite/gas/i386/tsxldtrk.s: Likewise. * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise. opcodes/ChangeLog: 2020-04-02 Lili Cui * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1, (prefix_table): New instructions (see prefixes above). (rm_table): Likewise * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS, CPU_ANY_TSXLDTRK_FLAGS. (cpu_flags): Add CpuTSXLDTRK. * i386-opc.h (enum): Add CpuTSXLDTRK. (i386_cpu_flags): Add cputsxldtrk. * i386-opc.tbl: Add XSUSPLDTRK insns. * i386-init.h: Regenerate. * i386-tbl.h: Likewise. --- gas/config/tc-i386.c | 3 +++ gas/doc/c-i386.texi | 4 +++- gas/testsuite/gas/i386/i386.exp | 2 ++ gas/testsuite/gas/i386/tsxldtrk.d | 13 +++++++++++++ gas/testsuite/gas/i386/tsxldtrk.s | 6 ++++++ gas/testsuite/gas/i386/x86-64-tsxldtrk.d | 13 +++++++++++++ opcodes/i386-dis.c | 13 ++++++++++++- opcodes/i386-gen.c | 5 +++++ opcodes/i386-opc.h | 3 +++ opcodes/i386-opc.tbl | 7 +++++++ 10 files changed, 67 insertions(+), 2 deletions(-) create mode 100644 gas/testsuite/gas/i386/tsxldtrk.d create mode 100644 gas/testsuite/gas/i386/tsxldtrk.s create mode 100644 gas/testsuite/gas/i386/x86-64-tsxldtrk.d diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index d67532c422..093497becd 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1214,6 +1214,8 @@ static const arch_entry cpu_arch[] = CPU_MCOMMIT_FLAGS, 0 }, { STRING_COMMA_LEN (".sev_es"), PROCESSOR_UNKNOWN, CPU_SEV_ES_FLAGS, 0 }, + { STRING_COMMA_LEN (".tsxldtrk"), PROCESSOR_UNKNOWN, + CPU_TSXLDTRK_FLAGS, 0 }, }; static const noarch_entry cpu_noarch[] = @@ -1258,6 +1260,7 @@ static const noarch_entry cpu_noarch[] = { STRING_COMMA_LEN ("noavx512_vp2intersect"), CPU_ANY_SHSTK_FLAGS }, { STRING_COMMA_LEN ("noenqcmd"), CPU_ANY_ENQCMD_FLAGS }, { STRING_COMMA_LEN ("noserialize"), CPU_ANY_SERIALIZE_FLAGS }, + { STRING_COMMA_LEN ("notsxldtrk"), CPU_ANY_TSXLDTRK_FLAGS }, }; #ifdef I386COFF diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index d42148ed43..8141a84d97 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -188,6 +188,7 @@ accept various extension mnemonics. For example, @code{movdir64b}, @code{enqcmd}, @code{serialize}, +@code{tsxldtrk}, @code{avx512f}, @code{avx512cd}, @code{avx512er}, @@ -223,6 +224,7 @@ accept various extension mnemonics. For example, @code{noavx512_bf16}, @code{noenqcmd}, @code{noserialize}, +@code{notsxldtrk}, @code{vmx}, @code{vmfunc}, @code{smx}, @@ -1495,7 +1497,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} -@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} +@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 7961bb1f37..9dacc11906 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -477,6 +477,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "enqcmd-intel" run_list_test "enqcmd-inval" run_dump_test "serialize" + run_dump_test "tsxldtrk" run_dump_test "vp2intersect" run_dump_test "vp2intersect-intel" run_list_test "vp2intersect-inval-bcast" @@ -1054,6 +1055,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-enqcmd-intel" run_list_test "x86-64-enqcmd-inval" run_dump_test "x86-64-serialize" + run_dump_test "x86-64-tsxldtrk" run_dump_test "x86-64-vp2intersect" run_dump_test "x86-64-vp2intersect-intel" run_list_test "x86-64-vp2intersect-inval-bcast" diff --git a/gas/testsuite/gas/i386/tsxldtrk.d b/gas/testsuite/gas/i386/tsxldtrk.d new file mode 100644 index 0000000000..26df4ca633 --- /dev/null +++ b/gas/testsuite/gas/i386/tsxldtrk.d @@ -0,0 +1,13 @@ +#as: +#objdump: -dw +#name: TSXLDTRK insns +#source: tsxldtrk.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: + +[a-f0-9]+: f2 0f 01 e8 xsuspldtrk[ ]* + +[a-f0-9]+: f2 0f 01 e9 xresldtrk[ ]* +#pass diff --git a/gas/testsuite/gas/i386/tsxldtrk.s b/gas/testsuite/gas/i386/tsxldtrk.s new file mode 100644 index 0000000000..3bbe9aa623 --- /dev/null +++ b/gas/testsuite/gas/i386/tsxldtrk.s @@ -0,0 +1,6 @@ +# Check TSXLDTRK instructions. + + .text +_start: + xsuspldtrk + xresldtrk diff --git a/gas/testsuite/gas/i386/x86-64-tsxldtrk.d b/gas/testsuite/gas/i386/x86-64-tsxldtrk.d new file mode 100644 index 0000000000..8ef3446f4d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-tsxldtrk.d @@ -0,0 +1,13 @@ +#as: +#objdump: -dw +#name: x86_64 TSXLDTRK insns +#source: tsxldtrk.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: + +[a-f0-9]+: f2 0f 01 e8 xsuspldtrk[ ]* + +[a-f0-9]+: f2 0f 01 e9 xresldtrk[ ]* +#pass diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 89ab43c1ab..eaefb2c979 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -962,6 +962,7 @@ enum PREFIX_0F01_REG_3_RM_1, PREFIX_0F01_REG_5_MOD_0, PREFIX_0F01_REG_5_MOD_3_RM_0, + PREFIX_0F01_REG_5_MOD_3_RM_1, PREFIX_0F01_REG_5_MOD_3_RM_2, PREFIX_0F01_REG_7_MOD_3_RM_2, PREFIX_0F01_REG_7_MOD_3_RM_3, @@ -3646,6 +3647,16 @@ static const struct dis386 prefix_table[][4] = { { { "serialize", { Skip_MODRM }, PREFIX_OPCODE }, { "setssbsy", { Skip_MODRM }, PREFIX_OPCODE }, + { Bad_Opcode }, + { "xsuspldtrk", { Skip_MODRM }, PREFIX_OPCODE }, + }, + + /* PREFIX_0F01_REG_5_MOD_3_RM_2 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { Bad_Opcode }, + { "xresldtrk", { Skip_MODRM }, PREFIX_OPCODE }, }, /* PREFIX_0F01_REG_5_MOD_3_RM_2 */ @@ -11038,7 +11049,7 @@ static const struct dis386 rm_table[][8] = { { /* RM_0F01_REG_5_MOD_3 */ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_0) }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_1) }, { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_2) }, { Bad_Opcode }, { Bad_Opcode }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 3a6a4a0492..6e33fc56df 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -313,6 +313,8 @@ static initializer cpu_flag_init[] = "CpuMCOMMIT" }, { "CPU_SEV_ES_FLAGS", "CpuSEV_ES" }, + { "CPU_TSXLDTRK_FLAGS", + "CpuTSXLDTRK"}, { "CPU_ANY_X87_FLAGS", "CPU_ANY_287_FLAGS|Cpu8087" }, { "CPU_ANY_287_FLAGS", @@ -391,6 +393,8 @@ static initializer cpu_flag_init[] = "CpuSERIALIZE" }, { "CPU_ANY_AVX512_VP2INTERSECT_FLAGS", "CpuAVX512_VP2INTERSECT" }, + { "CPU_ANY_TSXLDTRK_FLAGS", + "CpuTSXLDTRK" }, }; static initializer operand_type_init[] = @@ -614,6 +618,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuRDPRU), BITFIELD (CpuMCOMMIT), BITFIELD (CpuSEV_ES), + BITFIELD (CpuTSXLDTRK), #ifdef CpuUnused BITFIELD (CpuUnused), #endif diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index f4f48871be..e5a5dcb7dd 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -251,6 +251,8 @@ enum CpuMCOMMIT, /* SEV-ES instruction(s) required */ CpuSEV_ES, + /* TSXLDTRK instruction required */ + CpuTSXLDTRK, /* 64bit support required */ Cpu64, /* Not supported in the 64bit mode */ @@ -384,6 +386,7 @@ typedef union i386_cpu_flags unsigned int cpurdpru:1; unsigned int cpumcommit:1; unsigned int cpusev_es:1; + unsigned int cputsxldtrk:1; unsigned int cpu64:1; unsigned int cpuno64:1; #ifdef CpuUnused diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 2d1b98078d..92cc9bad13 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -4082,3 +4082,10 @@ rdpru, 0, 0x0f01fd, None, 3, CpuRDPRU, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|N serialize, 0, 0x0f01e8, None, 3, CpuSERIALIZE, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } // SERIALIZE instruction end. + +// TSXLDTRK instructions. + +xsuspldtrk, 0, 0xf20f01e8, None, 3, CpuTSXLDTRK, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +xresldtrk, 0, 0xf20f01e9, None, 3, CpuTSXLDTRK, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } + +// TSXLDTRK instructions end. -- 2.17.1