diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_1.d b/gas/testsuite/gas/aarch64/sve-movprfx_1.d new file mode 100644 index 0000000000000000000000000000000000000000..6bf892ffce00c614603d07338c7b36a0b6d47ed9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_1.d @@ -0,0 +1,13 @@ +#source: sve-movprfx_1.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 0497a441 neg z1.s, p1/m, z2.s +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_1.s b/gas/testsuite/gas/aarch64/sve-movprfx_1.s new file mode 100644 index 0000000000000000000000000000000000000000..17e49bb49a9ef00742f1566f391c0672971be85d --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_1.s @@ -0,0 +1,9 @@ +/* correct usage of movprfx. No diagnosis. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/m, z3.s + neg z1.s, p1/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_10.d b/gas/testsuite/gas/aarch64/sve-movprfx_10.d new file mode 100644 index 0000000000000000000000000000000000000000..8458738b785519141f02ecababe9b274a41ba8ac --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_10.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_10.s +#warning_output: sve-movprfx_10.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912401 movprfx z1.s, p1/m, z0.s +[^:]+: 04d7a441 neg z1.d, p1/m, z2.d // note: register size not compatible with previous `movprfx' at operand 1 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_10.l b/gas/testsuite/gas/aarch64/sve-movprfx_10.l new file mode 100644 index 0000000000000000000000000000000000000000..95aa534daf30f0aa7c389e5266c196325c7f6eea --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_10.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: register size not compatible with previous `movprfx' at operand 1 -- `neg z1.d,p1/m,z2.d' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_10.s b/gas/testsuite/gas/aarch64/sve-movprfx_10.s new file mode 100644 index 0000000000000000000000000000000000000000..2cf29bfe4c100bcacd0e66e9da9af626e944f899 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_10.s @@ -0,0 +1,10 @@ +/* incorrect usage of movprfx, register size is different. + Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/M, z0.s + neg z1.d, p1/m, z2.d + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_11.d b/gas/testsuite/gas/aarch64/sve-movprfx_11.d new file mode 100644 index 0000000000000000000000000000000000000000..91b5ebba83d9de30e5fae155cff442ea58818d97 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_11.d @@ -0,0 +1,13 @@ +#source: sve-movprfx_11.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 +[^:]+: 04d7a041 neg z1.d, p0/m, z2.d +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_11.s b/gas/testsuite/gas/aarch64/sve-movprfx_11.s new file mode 100644 index 0000000000000000000000000000000000000000..09b908e68d7ec02523650e875d5eaa55a98de196 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_11.s @@ -0,0 +1,10 @@ +/* Correct usage of movprfx, unpredicated movprfx, any register size allowed for + instruction at PC+4. No diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + neg z1.d, p0/m, z2.d + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_12.d b/gas/testsuite/gas/aarch64/sve-movprfx_12.d new file mode 100644 index 0000000000000000000000000000000000000000..78d928b7da182be19a62075f0b10a8a0508e0317 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_12.d @@ -0,0 +1,13 @@ +#source: sve-movprfx_12.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04902461 movprfx z1.s, p1/z, z3.s +[^:]+: 0497a441 neg z1.s, p1/m, z2.s +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_12.s b/gas/testsuite/gas/aarch64/sve-movprfx_12.s new file mode 100644 index 0000000000000000000000000000000000000000..4e9c60bf0734d3f45a68d2be7735deec62c93130 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_12.s @@ -0,0 +1,9 @@ +/* correct usage of movprfx. No diagnosis. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/z, z3.s + neg z1.s, p1/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_13.d b/gas/testsuite/gas/aarch64/sve-movprfx_13.d new file mode 100644 index 0000000000000000000000000000000000000000..a74aba20f2f2d06fedbbd4ab82805c5bfee5ca35 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_13.d @@ -0,0 +1,17 @@ +#source: sve-movprfx_13.s +#warning_output: sve-movprfx_13.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 + +0+8 <.*>: +[^:]+: 0497a021 neg z1.s, p0/m, z1.s // note: output register of preceding `movprfx' used as input at operand 3 +[^:]+: d65f03c0 ret + diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_13.l b/gas/testsuite/gas/aarch64/sve-movprfx_13.l new file mode 100644 index 0000000000000000000000000000000000000000..538d76781c93ee1c893025c103b5506ca6c6cfc0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_13.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `neg z1.s,p0/m,z1.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_13.s b/gas/testsuite/gas/aarch64/sve-movprfx_13.s new file mode 100644 index 0000000000000000000000000000000000000000..f5868f3734da0676b382fed4103aef97ca5f0172 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_13.s @@ -0,0 +1,11 @@ +/* Prefixed register used in valid sve instruction at PC+4. Label does not + change flow. Diagnostic required due to register used as input. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 +bar: + neg z1.s, p0/m, z1.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_14.d b/gas/testsuite/gas/aarch64/sve-movprfx_14.d new file mode 100644 index 0000000000000000000000000000000000000000..eaa9200379f7e88b5dbb044a9d78f44c5265a788 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_14.d @@ -0,0 +1,15 @@ +#source: sve-movprfx_14.s +#warning_output: sve-movprfx_14.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 0497a041 neg z1.s, p0/m, z2.s // note: predicate register differs from that in preceding `movprfx' at operand 2 +[^:]+: d65f03c0 ret + diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_14.l b/gas/testsuite/gas/aarch64/sve-movprfx_14.l new file mode 100644 index 0000000000000000000000000000000000000000..d39228f791a7eeec4c37b28f3136d3f4beb8f81c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_14.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: predicate register differs from that in preceding `movprfx' at operand 2 -- `neg z1.s,p0/m,z2.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_14.s b/gas/testsuite/gas/aarch64/sve-movprfx_14.s new file mode 100644 index 0000000000000000000000000000000000000000..73b85c89fb99b97b6e1106996ff99a74eaff40f3 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_14.s @@ -0,0 +1,10 @@ +/* incorrect usage of movprfx, predicate register not the same as movprfx. + Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/m, z3.s + neg z1.s, p0/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_15.d b/gas/testsuite/gas/aarch64/sve-movprfx_15.d new file mode 100644 index 0000000000000000000000000000000000000000..8020c7ce06b563a0276f8600fb8831b185ca7d40 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_15.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_15.s +#warning_output: sve-movprfx_15.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 04623061 orr z1.d, z3.d, z2.d // note: SVE `movprfx' compatible instruction expected +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_15.l b/gas/testsuite/gas/aarch64/sve-movprfx_15.l new file mode 100644 index 0000000000000000000000000000000000000000..90fd677fb55a17b84245e42b3258721f8eecf72f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_15.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: SVE `movprfx' compatible instruction expected -- `orr z1.d,z3.d,z2.d' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_15.s b/gas/testsuite/gas/aarch64/sve-movprfx_15.s new file mode 100644 index 0000000000000000000000000000000000000000..8a8b2503b80b8f15478e52ced4d87699cb327b7e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_15.s @@ -0,0 +1,10 @@ +/* incorrect usage of movprfx, predicated instruction not followed by predicated + instruction at PC+4. Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/m, z3.s + orr z1.d, z3.d, z2.d + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_16.d b/gas/testsuite/gas/aarch64/sve-movprfx_16.d new file mode 100644 index 0000000000000000000000000000000000000000..0c760cc055c24010cb135289d89fbc3c76736b69 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_16.d @@ -0,0 +1,13 @@ +#source: sve-movprfx_16.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 6589a441 fcvt z1.s, p1/m, z2.h +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_16.s b/gas/testsuite/gas/aarch64/sve-movprfx_16.s new file mode 100644 index 0000000000000000000000000000000000000000..0116260b784b9e29e17d357b168453e201468c64 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_16.s @@ -0,0 +1,10 @@ +/* movprfx's dest register must be the same width. Correct usage. No + diagnosis. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/m, z3.s + fcvt z1.s, p1/m, z2.h + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_17.d b/gas/testsuite/gas/aarch64/sve-movprfx_17.d new file mode 100644 index 0000000000000000000000000000000000000000..010130044434da55d9a5ebcca37c032747068061 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_17.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_17.s +#warning_output: sve-movprfx_17.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 65c9a441 fcvt z1.d, p1/m, z2.h // note: register size not compatible with previous `movprfx' at operand 1 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_17.l b/gas/testsuite/gas/aarch64/sve-movprfx_17.l new file mode 100644 index 0000000000000000000000000000000000000000..82dfaf0c75725427925af858251cdf6d9f98588d --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_17.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: register size not compatible with previous `movprfx' at operand 1 -- `fcvt z1.d,p1/m,z2.h' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_17.s b/gas/testsuite/gas/aarch64/sve-movprfx_17.s new file mode 100644 index 0000000000000000000000000000000000000000..cd82c0b88854cf43ebb1af64669fd6e9de5cae08 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_17.s @@ -0,0 +1,10 @@ +/* movprfx's dest register must be the wider of the two. Incorrect usage. + Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/m, z3.s + fcvt z1.d, p1/m, z2.h + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_18.d b/gas/testsuite/gas/aarch64/sve-movprfx_18.d new file mode 100644 index 0000000000000000000000000000000000000000..09d6fa6b1092bcef386b01bfc9c8f25adc67d8b1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_18.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_18.s +#warning_output: sve-movprfx_18.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 25a0c141 add z1.s, z1.s, #10 // note: predicated instruction expected after `movprfx' +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_18.l b/gas/testsuite/gas/aarch64/sve-movprfx_18.l new file mode 100644 index 0000000000000000000000000000000000000000..b5ccd58ffa71f4c8d6ba0054e77f5b1777519d6a --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_18.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: predicated instruction expected after `movprfx' -- `add z1.s,z1.s,#10' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_18.s b/gas/testsuite/gas/aarch64/sve-movprfx_18.s new file mode 100644 index 0000000000000000000000000000000000000000..aac54ccaa825efeda84dcc52867ac7c5a80fa757 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_18.s @@ -0,0 +1,10 @@ +/* predicated movprfx must be used with a predicated SVE instruction at PC+4. + Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1.s, p1/m, z3.s + add z1.s, z1.s, #10 + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_19.d b/gas/testsuite/gas/aarch64/sve-movprfx_19.d new file mode 100644 index 0000000000000000000000000000000000000000..8d13b46d1fd72332f1995a66f40ab90cc5c5a2bc --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_19.d @@ -0,0 +1,13 @@ +#source: sve-movprfx_19.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 04800441 add z1.s, p1/m, z1.s, z2.s +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_19.s b/gas/testsuite/gas/aarch64/sve-movprfx_19.s new file mode 100644 index 0000000000000000000000000000000000000000..d167d067d8a1e6f9fa65c4ecb95826b8637b05ca --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_19.s @@ -0,0 +1,10 @@ +/* unpredicated movprfx can be used with a predicated SVE instruction at PC+4 + with a merging predicate. No diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z3 + add z1.s, p1/m, z1.s, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_2.d b/gas/testsuite/gas/aarch64/sve-movprfx_2.d new file mode 100644 index 0000000000000000000000000000000000000000..7558a4289c9dbebb357c22357f6502ec38faf335 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_2.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_2.s +#warning_output: sve-movprfx_2.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 +[^:]+: 0497a042 neg z2.s, p0/m, z2.s // note: output register of preceding `movprfx' not used in current instruction at operand 1 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_2.l b/gas/testsuite/gas/aarch64/sve-movprfx_2.l new file mode 100644 index 0000000000000000000000000000000000000000..9a194dc2999026fc16a72da14cb5a82c726478af --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_2.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `neg z2.s,p0/m,z2.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_2.s b/gas/testsuite/gas/aarch64/sve-movprfx_2.s new file mode 100644 index 0000000000000000000000000000000000000000..ad08b107013dc8ad401cf667c6809b25d9d78a8f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_2.s @@ -0,0 +1,10 @@ +/* Prefixed register not used in valid sve instruction at PC+4. + Diagnostic required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + neg z2.s, p0/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_20.d b/gas/testsuite/gas/aarch64/sve-movprfx_20.d new file mode 100644 index 0000000000000000000000000000000000000000..ae7dda64fdcc1417e245007e95e4b4d505dc9d16 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_20.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_20.s +#warning_output: sve-movprfx_20.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 04a20041 add z1.s, z2.s, z2.s // note: SVE `movprfx' compatible instruction expected +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_20.l b/gas/testsuite/gas/aarch64/sve-movprfx_20.l new file mode 100644 index 0000000000000000000000000000000000000000..6feb7ad5a3c1c0c722d26c8f547cb5ae505ab22b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_20.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: SVE `movprfx' compatible instruction expected -- `add z1.s,z2.s,z2.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_20.s b/gas/testsuite/gas/aarch64/sve-movprfx_20.s new file mode 100644 index 0000000000000000000000000000000000000000..326703433a65311525d51b66d1ef45d5ee8da134 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_20.s @@ -0,0 +1,11 @@ +/* unpredicated movprfx cannot be used with a unpredicated SVE instruction at + PC+4 that is not valid for use following a movprfx. + Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z3 + add z1.s, z2.s, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_21.d b/gas/testsuite/gas/aarch64/sve-movprfx_21.d new file mode 100644 index 0000000000000000000000000000000000000000..ea53dbea92c42747adb307a0732997e802262256 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_21.d @@ -0,0 +1,13 @@ +#source: sve-movprfx_21.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 04800441 add z1.s, p1/m, z1.s, z2.s +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_21.s b/gas/testsuite/gas/aarch64/sve-movprfx_21.s new file mode 100644 index 0000000000000000000000000000000000000000..ea6182146d7ed1d2bba34e690244f476d62b73b0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_21.s @@ -0,0 +1,10 @@ +/* movprfx dest register can be used in destructive operations where required. + Valid usage. No diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z3 + add z1.s, p1/m, z1.s, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_22.d b/gas/testsuite/gas/aarch64/sve-movprfx_22.d new file mode 100644 index 0000000000000000000000000000000000000000..431d5b691138ef92b738e35da471dc32622df4b9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_22.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_22.s +#warning_output: sve-movprfx_22.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 04800421 add z1.s, p1/m, z1.s, z1.s // note: output register of preceding `movprfx' used as input at operand 4 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_22.l b/gas/testsuite/gas/aarch64/sve-movprfx_22.l new file mode 100644 index 0000000000000000000000000000000000000000..8e3da220e0bac17dee1b805d5938ba0a934f99f9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_22.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: output register of preceding `movprfx' used as input at operand 4 -- `add z1.s,p1/m,z1.s,z1.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_22.s b/gas/testsuite/gas/aarch64/sve-movprfx_22.s new file mode 100644 index 0000000000000000000000000000000000000000..8ceced070c8d6d3d9b3765f453f9bba370feb4d4 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_22.s @@ -0,0 +1,10 @@ +/* movprfx dest register can be used in destructive operations where required, + but no where else. Invalid usage. Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z3 + add z1.s, p1/m, z1.s, z1.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_23.d b/gas/testsuite/gas/aarch64/sve-movprfx_23.d new file mode 100644 index 0000000000000000000000000000000000000000..af3c5ed1df0893cbe10e2a35b12505f1b479fb54 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_23.d @@ -0,0 +1,51 @@ +#source: sve-movprfx_23.s +#warning_output: sve-movprfx_23.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 04512461 movprfx z1.h, p1/m, z3.h +[^:]+: 256c8021 incp z1.h, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 25ac8021 incp z1.s, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 25ec8021 incp z1.d, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04512461 movprfx z1.h, p1/m, z3.h +[^:]+: 256d8021 decp z1.h, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 25ad8021 decp z1.s, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 25ed8021 decp z1.d, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04512461 movprfx z1.h, p1/m, z3.h +[^:]+: 25688021 sqincp z1.h, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 25a88021 sqincp z1.s, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 25e88021 sqincp z1.d, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04512461 movprfx z1.h, p1/m, z3.h +[^:]+: 256a8021 sqdecp z1.h, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 25aa8021 sqdecp z1.s, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 25ea8021 sqdecp z1.d, p1 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04112461 movprfx z1.b, p1/m, z3.b +[^:]+: 05288421 clasta z1.b, p1, z1.b, z1.b // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04512461 movprfx z1.h, p1/m, z3.h +[^:]+: 05688421 clasta z1.h, p1, z1.h, z1.h // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 05a88421 clasta z1.s, p1, z1.s, z1.s // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05e88421 clasta z1.d, p1, z1.d, z1.d // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04112461 movprfx z1.b, p1/m, z3.b +[^:]+: 05298421 clastb z1.b, p1, z1.b, z1.b // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04512461 movprfx z1.h, p1/m, z3.h +[^:]+: 05698421 clastb z1.h, p1, z1.h, z1.h // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04912461 movprfx z1.s, p1/m, z3.s +[^:]+: 05a98421 clastb z1.s, p1, z1.s, z1.s // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05e98421 clastb z1.d, p1, z1.d, z1.d // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_23.l b/gas/testsuite/gas/aarch64/sve-movprfx_23.l new file mode 100644 index 0000000000000000000000000000000000000000..ff25ee712ed350c8a7a442a18142b0f69df3aa68 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_23.l @@ -0,0 +1,21 @@ +[^:]*: Assembler messages: +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `incp z1.h,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `incp z1.s,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `incp z1.d,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `decp z1.h,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `decp z1.s,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `decp z1.d,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `sqincp z1.h,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `sqincp z1.s,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `sqincp z1.d,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `sqdecp z1.h,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `sqdecp z1.s,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `sqdecp z1.d,p1' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clasta z1.b,p1,z1.b,z1.b' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clasta z1.h,p1,z1.h,z1.h' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clasta z1.s,p1,z1.s,z1.s' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clasta z1.d,p1,z1.d,z1.d' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clastb z1.b,p1,z1.b,z1.b' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clastb z1.h,p1,z1.h,z1.h' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clastb z1.s,p1,z1.s,z1.s' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `clastb z1.d,p1,z1.d,z1.d' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_23.s b/gas/testsuite/gas/aarch64/sve-movprfx_23.s new file mode 100644 index 0000000000000000000000000000000000000000..709d81aa8a04e098c5483c9986ed88d9fe6397c0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_23.s @@ -0,0 +1,34 @@ +/* Instructions not allowed to be used with predicated movprfx. Invalid usage. + Diagnosis required. */ + .text + .arch armv8-a+sve + + /* All of these should be invalid because the predicated movprfx is used + with an unpredicated instruction. */ + + .macro test_sametwo inst + .irp sz, h,s,d + movprfx z1.\sz, p1/m, z3.\sz + \inst z1.\sz, p1 + .endr + .endm + + .macro test_samethree inst + .irp sz, b,h,s,d + movprfx z1.\sz, p1/m, z3.\sz + \inst z1.\sz, p1, z1.\sz, z1.\sz + .endr + .endm + + +f: + test_sametwo incp + test_sametwo decp + + test_sametwo sqincp + test_sametwo sqdecp + + test_samethree clasta + test_samethree clastb + ret + diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_24.d b/gas/testsuite/gas/aarch64/sve-movprfx_24.d new file mode 100644 index 0000000000000000000000000000000000000000..b70d59e5ef8cb03bdda74e049631dc9ee647a27f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_24.d @@ -0,0 +1,25 @@ +#source: sve-movprfx_24.s +#warning_output: sve-movprfx_24.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 04db0441 bic z1.d, p1/m, z1.d, z2.d +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 04e23021 bic z1.d, z1.d, z2.d // note: SVE `movprfx' compatible instruction expected +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 04e23021 bic z1.d, z1.d, z2.d // note: SVE `movprfx' compatible instruction expected +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 0583e7a1 and z1.d, z1.d, #0xfffffffffffffff3 // note: predicated instruction expected after `movprfx' +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 0583e7a1 and z1.d, z1.d, #0xfffffffffffffff3 +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 0543e7a1 eor z1.d, z1.d, #0xfffffffffffffff3 +[^:]+: 0420bc61 movprfx z1, z3 +[^:]+: 0503f021 orr z1.d, z1.d, #0xc +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_24.l b/gas/testsuite/gas/aarch64/sve-movprfx_24.l new file mode 100644 index 0000000000000000000000000000000000000000..5b9e0fd3045cfe840ce65fa08237665b025db39b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_24.l @@ -0,0 +1,4 @@ +[^:]*: Assembler messages: +.*: Warning: SVE `movprfx' compatible instruction expected -- `bic z1.D,z1.D,z2.D' +.*: Warning: SVE `movprfx' compatible instruction expected -- `bic z1.D,z1.D,z2.D' +.*: Warning: predicated instruction expected after `movprfx' -- `bic z1.D,z1.D,#12' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_24.s b/gas/testsuite/gas/aarch64/sve-movprfx_24.s new file mode 100644 index 0000000000000000000000000000000000000000..d0f446b87cd66c20db97cb7b0036cc45dbccd617 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_24.s @@ -0,0 +1,36 @@ +/* Only predicated vector BIC is allowed following a movprfx, and some pseudo + instructions should be allowed due to the instructions they alias. + Has invalid usages. Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + /* OK, vectored predicated. */ + movprfx z1.D, p1/m, z3.D + bic z1.D, p1/M, z1.D, z2.D + + /* Not OK, vectored unpredicated. */ + movprfx z1.D, p1/m, z3.D + bic z1.D, z1.D, z2.D + + /* Not OK, vectored unpredicated. */ + movprfx z1, z3 + bic z1.D, z1.D, z2.D + + /* Not OK, immediate form, unpredicated. */ + movprfx z1.D, p1/m, z3.D + bic z1.D, z1.D, #12 + + /* OK, immediate form alias of AND which is allowed. */ + movprfx z1, z3 + bic z1.D, z1.D, #12 + + /* OK, immediate form alias of EOR which is allowed. */ + movprfx z1, z3 + eon z1.D, z1.D, #12 + + /* OK, immediate form alias of ORR which is allowed. */ + movprfx z1, z3 + orr z1.D, z1.D, #12 + ret + diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.d b/gas/testsuite/gas/aarch64/sve-movprfx_25.d new file mode 100644 index 0000000000000000000000000000000000000000..15738564627dbb82676c435b2e3bc5a505948d58 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.d @@ -0,0 +1,29 @@ +#source: sve-movprfx_25.s +#warning_output: sve-movprfx_25.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05d14181 mov z1.d, p1/m, #12 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05d14001 mov z1.d, p1/m, #0 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05d14001 mov z1.d, p1/m, #0 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05d94181 mov z1.d, p9/m, #12 // note: predicate register differs from that in preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05d10181 mov z1.d, p1/z, #12 // note: merging predicate expected due to preceding `movprfx' at operand 2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05e8a441 mov z1.d, p1/m, x2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05e8a421 mov z1.d, p1/m, x1 // note: output register of preceding `movprfx' used as input at operand 3 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05e08441 mov z1.d, p1/m, d2 +[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d +[^:]+: 05e08421 mov z1.d, p1/m, d1 // note: output register of preceding `movprfx' used as input at operand 3 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.l b/gas/testsuite/gas/aarch64/sve-movprfx_25.l new file mode 100644 index 0000000000000000000000000000000000000000..ec7e2dbd60e1b22219e01b664427a05b11630e15 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.l @@ -0,0 +1,5 @@ +[^:]*: Assembler messages: +.*: Warning: predicate register differs from that in preceding `movprfx' at operand 2 -- `cpy z1.d,p9/m,#12' +.*: Warning: merging predicate expected due to preceding `movprfx' at operand 2 -- `cpy z1.d,p1/z,#12' +.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `cpy z1.d,p1/m,x1' +.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `cpy z1.d,p1/m,d1' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.s b/gas/testsuite/gas/aarch64/sve-movprfx_25.s new file mode 100644 index 0000000000000000000000000000000000000000..58124cee1ca1d567407f6081321703a346459399 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.s @@ -0,0 +1,45 @@ +/* Checks that CPY is allowed after a movprfx, special case in that SIMD&Scalar + version is also valid and Pg is 4 bits rather than 3. + Has invalid usages. Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + /* OK, immediate predicated, alias mov. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/m, #12 + + /* OK, immediate predicated, alias mov, fmov. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/m, #0 + + /* OK, immediate predicated, alias mov. */ + movprfx z1.d, p1/m, z3.d + fmov z1.d, p1/m, #0 + + /* Not OK, immediate predicated, but different predicate registers. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p9/m, #12 + + /* Not OK, zeroing predicate. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/z, #12 + + /* OK, scalar predicated, alias mov. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/m, x2 + + /* Not OK, scalar but register z1 and x1 are architecturally the same. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/m, x1 + + /* OK, SIMD&FP predicated, alias mov */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/m, d2 + + /* Not OK, SIMD&FP predicated, but register d1 is architecturally the + same. */ + movprfx z1.d, p1/m, z3.d + cpy z1.d, p1/m, d1 + ret + diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_26.d b/gas/testsuite/gas/aarch64/sve-movprfx_26.d new file mode 100644 index 0000000000000000000000000000000000000000..00bafdc830db49626b8298b5d499c68c48b2bdb5 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_26.d @@ -0,0 +1,23 @@ +#source: sve-movprfx_26.s +#warning_output: sve-movprfx_26.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 04912420 movprfx z0.s, p1/m, z1.s +[^:]+: 65caa440 fcvt z0.s, p1/m, z2.d // note: register size not compatible with previous `movprfx' at operand 1 +[^:]+: 04d12420 movprfx z0.d, p1/m, z1.d +[^:]+: 65caa440 fcvt z0.s, p1/m, z2.d +[^:]+: 04912420 movprfx z0.s, p1/m, z1.s +[^:]+: 65cba440 fcvt z0.d, p1/m, z2.s // note: register size not compatible with previous `movprfx' at operand 1 +[^:]+: 04d12420 movprfx z0.d, p1/m, z1.d +[^:]+: 65cba440 fcvt z0.d, p1/m, z2.s +[^:]+: 04112420 movprfx z0.b, p1/m, z1.b +[^:]+: 041b8440 lsl z0.b, p1/m, z0.b, z2.d +[^:]+: 04d12420 movprfx z0.d, p1/m, z1.d +[^:]+: 041b8440 lsl z0.b, p1/m, z0.b, z2.d // note: register size not compatible with previous `movprfx' at operand 1 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_26.l b/gas/testsuite/gas/aarch64/sve-movprfx_26.l new file mode 100644 index 0000000000000000000000000000000000000000..695f90fde0ae94f56bc9d81db3bb19a2bccb492b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_26.l @@ -0,0 +1,4 @@ +[^:]*: Assembler messages: +.*: Warning: register size not compatible with previous `movprfx' at operand 1 -- `fcvt Z0.S,P1/M,Z2.D' +.*: Warning: register size not compatible with previous `movprfx' at operand 1 -- `fcvt Z0.D,P1/M,Z2.S' +.*: Warning: register size not compatible with previous `movprfx' at operand 1 -- `lsl Z0.B,P1/M,Z0.B,Z2.D' \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_26.s b/gas/testsuite/gas/aarch64/sve-movprfx_26.s new file mode 100644 index 0000000000000000000000000000000000000000..15f52db14435da8efc4d70569c526e984a428924 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_26.s @@ -0,0 +1,31 @@ +/* Checks the special cases for FCVT and LSL. + Has invalid usages. Diagnosis required. */ + .text + .arch armv8-a+sve + +f: + /* Not OK, 64-bit operation, upper 32-bits cleared. */ + movprfx Z0.S, P1/M, Z1.S + fcvt Z0.S, P1/M, Z2.D + + /* OK, 64-bit operation, upper 32-bits cleared. */ + movprfx Z0.D, P1/M, Z1.D + fcvt Z0.S, P1/M, Z2.D + + /* Not OK, 64-bit operation ignoring 32-bits. */ + movprfx Z0.S, P1/M, Z1.S + fcvt Z0.D, P1/M, Z2.S + + /* OK, 64-bit operation ignoring 32-bits. */ + movprfx Z0.D, P1/M, Z1.D + fcvt Z0.D, P1/M, Z2.S + + /* OK, 8-bit operation. */ + movprfx Z0.B, P1/M, Z1.B + lsl Z0.B, P1/M, Z0.B, Z2.D + + /* Not Ok, destination register sizes don't match. */ + movprfx Z0.D, P1/M, Z1.D + lsl Z0.B, P1/M, Z0.B, Z2.D + ret + diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_3.d b/gas/testsuite/gas/aarch64/sve-movprfx_3.d new file mode 100644 index 0000000000000000000000000000000000000000..d56ad28abebdce4b123498d7ba3ba8ee3ab22003 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_3.d @@ -0,0 +1,14 @@ +#source: sve-movprfx_3.s +#warning_output: sve-movprfx_3.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 +[^:]+: 0497a021 neg z1.s, p0/m, z1.s // note: output register of preceding `movprfx' used as input at operand 3 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_3.l b/gas/testsuite/gas/aarch64/sve-movprfx_3.l new file mode 100644 index 0000000000000000000000000000000000000000..538d76781c93ee1c893025c103b5506ca6c6cfc0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_3.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `neg z1.s,p0/m,z1.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_3.s b/gas/testsuite/gas/aarch64/sve-movprfx_3.s new file mode 100644 index 0000000000000000000000000000000000000000..b6d0c8be679d451dae92d764c5e00acfe047c961 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_3.s @@ -0,0 +1,10 @@ +/* Prefixed register used as input on valid sve instruction at PC+4. + Diagnostic required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + neg z1.s, p0/m, z1.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_4.d b/gas/testsuite/gas/aarch64/sve-movprfx_4.d new file mode 100644 index 0000000000000000000000000000000000000000..056d67d7443ddb0fd0d6854616bb96d160556906 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_4.d @@ -0,0 +1,12 @@ +#source: sve-movprfx_4.s +#warning_output: sve-movprfx_4.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_4.l b/gas/testsuite/gas/aarch64/sve-movprfx_4.l new file mode 100644 index 0000000000000000000000000000000000000000..277a6d969f10f2bf8c1ec35fd9f35a5a25e25af0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_4.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: previous `movprfx' sequence has not been closed diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_4.s b/gas/testsuite/gas/aarch64/sve-movprfx_4.s new file mode 100644 index 0000000000000000000000000000000000000000..d5d4ffc5425b420ed7e0c51f99fade140c36b222 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_4.s @@ -0,0 +1,8 @@ +/* Prefixed register not used, movprfx last instruction. + Diagnostic required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_5.d b/gas/testsuite/gas/aarch64/sve-movprfx_5.d new file mode 100644 index 0000000000000000000000000000000000000000..99f5a01e59700926ce34b2a68db8970acdd70f3c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_5.d @@ -0,0 +1,15 @@ +#source: sve-movprfx_5.s +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 + +0+8 <.*>: +[^:]+: 0497a041 neg z1.s, p0/m, z2.s +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_5.s b/gas/testsuite/gas/aarch64/sve-movprfx_5.s new file mode 100644 index 0000000000000000000000000000000000000000..c4aabd911f0a64df5d3cc4eec908d8a18f360df4 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_5.s @@ -0,0 +1,11 @@ +/* Prefixed register used in valid sve instruction at PC+4. Label does not + change flow. No Diagnostic. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 +bar: + neg z1.s, p0/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_6.d b/gas/testsuite/gas/aarch64/sve-movprfx_6.d new file mode 100644 index 0000000000000000000000000000000000000000..92e574c46b7ec72b64359081fbe34fa074de1754 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_6.d @@ -0,0 +1,15 @@ +#source: sve-movprfx_6.s +#warning_output: sve-movprfx_6.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 +[^:]+: 0420bc62 movprfx z2, z3 // note: instruction opens new dependency sequence without ending previous one +[^:]+: 0497a042 neg z2.s, p0/m, z2.s // note: output register of preceding `movprfx' used as input at operand 3 +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_6.l b/gas/testsuite/gas/aarch64/sve-movprfx_6.l new file mode 100644 index 0000000000000000000000000000000000000000..51ad18bf4b58f15972d0b91c85a97310e3020124 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_6.l @@ -0,0 +1,3 @@ +[^:]*: Assembler messages: +.*: Warning: instruction opens new dependency sequence without ending previous one -- `movprfx z2,z3' +.*: Warning: output register of preceding `movprfx' used as input at operand 3 -- `neg z2.s,p0/m,z2.s' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_6.s b/gas/testsuite/gas/aarch64/sve-movprfx_6.s new file mode 100644 index 0000000000000000000000000000000000000000..03df04f1b39cb05540d17a005a27971d5badb8e9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_6.s @@ -0,0 +1,12 @@ +/* Prefixed register used in valid sve instruction at PC+4, but used as input + as well. Prefix block opened twice without closing first one. + Two diagnosis required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + movprfx z2, z3 + neg z2.s, p0/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_7.d b/gas/testsuite/gas/aarch64/sve-movprfx_7.d new file mode 100644 index 0000000000000000000000000000000000000000..ce35370385f9eac474cd095c7e4a9e2551838536 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_7.d @@ -0,0 +1,17 @@ +#source: sve-movprfx_7.s +#warning_output: sve-movprfx_7.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 + +Disassembly of section .*: + +0+ <.*>: +[^:]+: d65f03c0 ret // note: previous `movprfx' sequence not closed \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_7.l b/gas/testsuite/gas/aarch64/sve-movprfx_7.l new file mode 100644 index 0000000000000000000000000000000000000000..277a6d969f10f2bf8c1ec35fd9f35a5a25e25af0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_7.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: previous `movprfx' sequence has not been closed diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_7.s b/gas/testsuite/gas/aarch64/sve-movprfx_7.s new file mode 100644 index 0000000000000000000000000000000000000000..a913cea51f13b06579dafeb80b8d8be9dc9f9e7e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_7.s @@ -0,0 +1,10 @@ +/* New section started without sequence closed. Diagnostic required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + .section foo +g: + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_8.d b/gas/testsuite/gas/aarch64/sve-movprfx_8.d new file mode 100644 index 0000000000000000000000000000000000000000..d7f8bbaa7aafa994dffdac7252a4f9ec3c7b7ddd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_8.d @@ -0,0 +1,18 @@ +#source: sve-movprfx_8.s +#warning_output: sve-movprfx_8.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 0497a041 neg z1.s, p0/m, z2.s // note: previous `movprfx' sequence not closed +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_8.l b/gas/testsuite/gas/aarch64/sve-movprfx_8.l new file mode 100644 index 0000000000000000000000000000000000000000..277a6d969f10f2bf8c1ec35fd9f35a5a25e25af0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_8.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: previous `movprfx' sequence has not been closed diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_8.s b/gas/testsuite/gas/aarch64/sve-movprfx_8.s new file mode 100644 index 0000000000000000000000000000000000000000..711a8fc7d3f16373c8481e099021cb80c35b837a --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_8.s @@ -0,0 +1,10 @@ +/* New section started without sequence closed. Diagnostic required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + .section foo + neg z1.s, p0/m, z2.s + ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_9.d b/gas/testsuite/gas/aarch64/sve-movprfx_9.d new file mode 100644 index 0000000000000000000000000000000000000000..0a316de8d2e99671a1023a3d65f52cb8cacaac95 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_9.d @@ -0,0 +1,15 @@ +#source: sve-movprfx_9.s +#warning_output: sve-movprfx_9.l +#as: -march=armv8-a+sve -I$srcdir/$subdir +#objdump: -Dr -M notes + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +[^:]+: 2598e3e0 ptrue p0.s +[^:]+: 0420bc01 movprfx z1, z0 +[^:]+: 910003e0 mov x0, sp // note: SVE instruction expected after `movprfx' +[^:]+: 0497a042 neg z2.s, p0/m, z2.s +[^:]+: d65f03c0 ret diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_9.l b/gas/testsuite/gas/aarch64/sve-movprfx_9.l new file mode 100644 index 0000000000000000000000000000000000000000..28d9ec24cd79cee5708a07d442a880c296922fea --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_9.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Warning: SVE instruction expected after `movprfx' -- `mov x0,sp' diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_9.s b/gas/testsuite/gas/aarch64/sve-movprfx_9.s new file mode 100644 index 0000000000000000000000000000000000000000..8e011c3cf8fb0159ad6f2830006a6a3dca9b5e8c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-movprfx_9.s @@ -0,0 +1,11 @@ +/* Instruction at PC+4 after prefix sequence opening is not an SVE instruction. + Diagnostic required. */ + .text + .arch armv8-a+sve + +f: + ptrue p0.s + movprfx z1, z0 + mov x0, sp + neg z2.s, p0/m, z2.s + ret