diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 31985963e314cbe772afbd190d4b0ca6e9608466..4f200419dbed093b17bca5f2890a4d9a1d8ce3c8 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8660,6 +8660,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
   {"armv8.2-a", AARCH64_ARCH_V8_2},
   {"armv8.3-a", AARCH64_ARCH_V8_3},
   {"armv8.4-a", AARCH64_ARCH_V8_4},
+  {"armv8.5-a", AARCH64_ARCH_V8_5},
   {NULL, AARCH64_ARCH_NONE}
 };
 
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index b659b8ba5971b964fbdf3357c97093471227db67..bac0f7775e51e8ac97bf88408d9ad53d9cac7a3e 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -91,7 +91,8 @@ This option specifies the target architecture.  The assembler will
 issue an error message if an attempt is made to assemble an
 instruction which will not execute on the target architecture.  The
 following architecture names are recognized: @code{armv8-a},
-@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a} and @code{armv8.4-a}.
+@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
+and @code{armv8.5-a}.
 
 If both @option{-mcpu} and @option{-march} are specified, the
 assembler will use the setting for @option{-mcpu}.  If neither are
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 7141927fad17f157bdf6e50f83a3ee1d715355e4..c7e168f7c2a7c6c7ad8ac0f3f5a7a2af7b073de9 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -62,6 +62,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_COMPNUM	0x40000000	/* Complex # instructions.  */
 #define AARCH64_FEATURE_DOTPROD 0x080000000     /* Dot Product instructions.  */
 #define AARCH64_FEATURE_F16_FML	0x1000000000ULL	/* v8.2 FP16FML ins.  */
+#define AARCH64_FEATURE_V8_5	0x2000000000ULL	/* ARMv8.5 processors.  */
 
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8		AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -85,6 +86,9 @@ typedef uint32_t aarch64_insn;
 						 AARCH64_FEATURE_V8_4   \
 						 | AARCH64_FEATURE_DOTPROD \
 						 | AARCH64_FEATURE_F16_FML)
+#define AARCH64_ARCH_V8_5	AARCH64_FEATURE (AARCH64_ARCH_V8_4,	\
+						 AARCH64_FEATURE_V8_5)
+
 
 #define AARCH64_ARCH_NONE	AARCH64_FEATURE (0, 0)
 #define AARCH64_ANY		AARCH64_FEATURE (-1, 0)	/* Any basic core.  */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index c16386c9cbab846a9718cb89fcc8fabd3029e28d..4c7c7d5ece10f7bb333e95e0ab1f6b5b114349f3 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2159,6 +2159,9 @@ static const aarch64_feature_set aarch64_feature_sha3 =
 static const aarch64_feature_set aarch64_feature_fp_16_v8_2 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16_FML
 		   | AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0);
+static const aarch64_feature_set aarch64_feature_v8_5 =
+  AARCH64_FEATURE (AARCH64_FEATURE_V8_5, 0);
+
 
 #define CORE		&aarch64_feature_v8
 #define FP		&aarch64_feature_fp
@@ -2186,6 +2189,7 @@ static const aarch64_feature_set aarch64_feature_fp_16_v8_2 =
 #define CRYPTO_V8_2	&aarch64_feature_crypto_v8_2
 #define FP_F16_V8_2	&aarch64_feature_fp_16_v8_2
 #define DOTPROD		&aarch64_feature_dotprod
+#define ARMV8_5		&aarch64_feature_v8_5
 
 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, NULL }
@@ -2234,6 +2238,9 @@ static const aarch64_feature_set aarch64_feature_fp_16_v8_2 =
   { NAME, OPCODE, MASK, CLASS, 0, FP_F16_V8_2, OPS, QUALS, FLAGS, 0, NULL }
 #define DOT_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, 0, DOTPROD, OPS, QUALS, FLAGS, 0, NULL }
+#define V8_5_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
+  { NAME, OPCODE, MASK, CLASS, 0, ARMV8_5, OPS, QUALS, FLAGS, 0, NULL }
+
 
 struct aarch64_opcode aarch64_opcode_table[] =
 {