From 26bc4cf115951a74a3a1a4e2ab7102a28ac258f2 Mon Sep 17 00:00:00 2001 From: Nelson Chu Date: Tue, 21 Aug 2018 15:05:14 +0800 Subject: [PATCH 01/13] NDS32: Remove the unsupported target features. This patch remove all obsolete features and codes for NDS32. bfd/ * elf32-nds32.c (nds32_elf_relax_loadstore): Remove the unused target features. (bfd_elf32_nds32_set_target_option): Remove the unused parameters. (nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12, nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls, nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff nds32_elf_relax_gotoff_suff, calculate_plt_memory_address, calculate_plt_offset, calculate_got_memory_address, nds32_elf_check_dup_relocs): Removed. All callers changed. * elf32-nds32.h: Remove the unused macros and defines. (elf_nds32_link_hash_table): Remove the unused variable. (bfd_elf32_nds32_set_target_option): Update prototype. (nds32_elf_ex9_init): Removed. gas/ * config/tc-riscv.c: Remove the unused target features. (nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp, nds32_set_elf_flags_by_insn, nds32_insert_relax_entry, nds32_apply_fix): Likewise. (nds32_no_ex9_begin): Removed. include/ * elf/nds32.h: Remove the unused target features. opcodes/ * nds32-asm.c (operand_fields): Remove the unused fields. (nds32_opcodes): Remove the unused instructions. * nds32-dis.c (nds32_ex9_info): Removed. (nds32_parse_opcode): Updated. (print_insn_nds32): Likewise. --- bfd/elf32-nds32.c | 716 +-------------------------------------- bfd/elf32-nds32.h | 44 +-- gas/config/tc-nds32.c | 81 +---- include/elf/nds32.h | 4 +- ld/emultempl/nds32elf.em | 180 +--------- opcodes/nds32-asm.c | 9 - opcodes/nds32-dis.c | 97 +----- 7 files changed, 31 insertions(+), 1100 deletions(-) diff --git a/bfd/elf32-nds32.c b/bfd/elf32-nds32.c index ae43cdfd8a..8dd1955120 100644 --- a/bfd/elf32-nds32.c +++ b/bfd/elf32-nds32.c @@ -6505,84 +6505,8 @@ calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, - (irel->r_offset + sec->output_section->vma + sec->output_offset)); return foff; } - -static bfd_vma -calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info, - Elf_Internal_Sym *isymbuf, - Elf_Internal_Rela *irel, - Elf_Internal_Shdr *symtab_hdr) -{ - bfd_vma symval; - - if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) - { - Elf_Internal_Sym *isym; - asection *sym_sec; - /* A local symbol. */ - isym = isymbuf + ELF32_R_SYM (irel->r_info); - - if (isym->st_shndx == SHN_UNDEF) - sym_sec = bfd_und_section_ptr; - else if (isym->st_shndx == SHN_ABS) - sym_sec = bfd_abs_section_ptr; - else if (isym->st_shndx == SHN_COMMON) - sym_sec = bfd_com_section_ptr; - else - sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); - symval = isym->st_value + sym_sec->output_section->vma - + sym_sec->output_offset; - } - else - { - unsigned long indx; - struct elf_link_hash_entry *h; - struct elf_nds32_link_hash_table *htab; - asection *splt; - - /* An external symbol. */ - indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; - h = elf_sym_hashes (abfd)[indx]; - BFD_ASSERT (h != NULL); - htab = nds32_elf_hash_table (link_info); - splt = htab->root.splt; - - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - - if (h->plt.offset == (bfd_vma) - 1) - { - if (h->root.type != bfd_link_hash_defined - && h->root.type != bfd_link_hash_defweak) - /* This appears to be a reference to an undefined - * symbol. Just ignore it--it will be caught by the - * regular reloc processing. */ - return 0; - symval = (h->root.u.def.value - + h->root.u.def.section->output_section->vma - + h->root.u.def.section->output_offset); - } - else - symval = splt->output_section->vma + h->plt.offset; - } - - return symval; -} - -static bfd_signed_vma -calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info, - Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel, - Elf_Internal_Shdr *symtab_hdr) -{ - bfd_vma foff; - if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel, - symtab_hdr)) == 0) - return 0; - else - return foff - (irel->r_offset - + sec->output_section->vma + sec->output_offset); -} + /* Convert a 32-bit instruction to 16-bit one. INSN is the input 32-bit instruction, INSN16 is the output 16-bit instruction. If INSN_TYPE is not NULL, it the CGEN instruction @@ -7799,44 +7723,6 @@ calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel, return foff; } -static bfd_vma -calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info, - Elf_Internal_Rela *irel, - Elf_Internal_Shdr *symtab_hdr) -{ - int symndx; - bfd_vma *local_got_offsets; - /* Get the value of the symbol referred to by the reloc. */ - struct elf_link_hash_entry *h; - struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info); - - /* An external symbol. */ - symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; - h = elf_sym_hashes (abfd)[symndx]; - while (h->root.type == bfd_link_hash_indirect - || h->root.type == bfd_link_hash_warning) - h = (struct elf_link_hash_entry *) h->root.u.i.link; - - if (symndx >= 0) - { - BFD_ASSERT (h != NULL); - return (htab->root.sgot->output_section->vma - + htab->root.sgot->output_offset - + h->got.offset); - } - else - { - local_got_offsets = elf_local_got_offsets (abfd); - BFD_ASSERT (local_got_offsets != NULL); - return (htab->root.sgot->output_section->vma - + htab->root.sgot->output_offset - + local_got_offsets[ELF32_R_SYM (irel->r_info)]); - } - - /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */ - /* The check of h->root.type is passed. */ -} - static int is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, Elf_Internal_Rela *rel) @@ -8090,38 +7976,6 @@ find_relocs_at_address_addr (Elf_Internal_Rela *reloc, return find_relocs_at_address (rel_t, relocs, irelend, reloc_type); } -static bfd_boolean -nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc, - Elf_Internal_Rela *internal_relocs, - Elf_Internal_Rela *irelend, - unsigned char reloc_type) -{ - Elf_Internal_Rela *rel_t; - - for (rel_t = reloc; - rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset; - rel_t--) - if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) - { - if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info) - && rel_t->r_addend == reloc->r_addend) - continue; - return TRUE; - } - - for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset; - rel_t++) - if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) - { - if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info) - && rel_t->r_addend == reloc->r_addend) - continue; - return TRUE; - } - - return FALSE; -} - typedef struct nds32_elf_blank nds32_elf_blank_t; struct nds32_elf_blank { @@ -10591,57 +10445,6 @@ nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd, } break; - case R_NDS32_GOT_HI20: - access_addr = - calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr); - - /* If this symbol is not in .got, the return value will be -1. - Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE, - a negative offset is allowed. */ - if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT - && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) - eliminate_sethi = 1; - break; - - case R_NDS32_PLT_GOTREL_HI20: - access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf, - hi_irelfn, symtab_hdr); - - if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT - && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) - eliminate_sethi = 1; - break; - - case R_NDS32_GOTOFF_HI20: - access_addr = - calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); - - if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT - && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) - eliminate_sethi = 1; - break; - - case R_NDS32_GOTPC_HI20: - /* The access_addr must consider r_addend of hi_irel. */ - access_addr = sec->output_section->vma + sec->output_offset - + irel->r_offset + hi_irelfn->r_addend; - - if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT - && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT) - eliminate_sethi = 1; - break; - - case R_NDS32_TLS_LE_HI20: - access_addr = - calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); - BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); - access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); - if ((range_type == NDS32_LOADSTORE_IMM) - && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT - && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT) - eliminate_sethi = 1; - break; - default: return FALSE; } @@ -10769,225 +10572,6 @@ nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd, return; } -/* Relax low part of PIC instruction pattern. */ - -static void -nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd, - asection *sec, Elf_Internal_Rela *irel, - bfd_byte *contents, Elf_Internal_Sym *isymbuf, - Elf_Internal_Shdr *symtab_hdr) -{ - uint32_t insn; - bfd_vma local_sda, laddr; - bfd_signed_vma foff; - unsigned long reloc; - - nds32_elf_final_sda_base (sec->output_section->owner, link_info, - &local_sda, FALSE); - laddr = irel->r_offset; - insn = bfd_getb32 (contents + laddr); - - if (N32_OP6 (insn) != N32_OP6_ORI) - return; - - if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12) - { - foff = calculate_got_memory_address (abfd, link_info, irel, - symtab_hdr) - local_sda; - reloc = R_NDS32_GOT20; - } - else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12) - { - foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel, - symtab_hdr) - local_sda; - reloc = R_NDS32_PLT_GOTREL_LO20; - } - else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12) - { - foff = calculate_memory_address (abfd, irel, isymbuf, - symtab_hdr) - local_sda; - reloc = R_NDS32_GOTOFF; - } - else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12) - { - foff = local_sda - sec->output_section->vma + sec->output_offset - + irel->r_offset + irel->r_addend; - reloc = R_NDS32_GOTPC20; - } - else - return; - - if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT)) - { - /* Turn into MOVI. */ - irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); - insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); - bfd_putb32 (insn, contents + laddr); - } -} - -/* Relax low part of LE TLS instruction pattern. */ - -static void -nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd, - Elf_Internal_Rela *irel, - bfd_byte *contents, Elf_Internal_Sym *isymbuf, - Elf_Internal_Shdr *symtab_hdr) -{ - uint32_t insn; - bfd_vma laddr; - bfd_signed_vma foff; - unsigned long reloc; - - laddr = irel->r_offset; - foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); - BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); - foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); - insn = bfd_getb32 (contents + laddr); - - if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT - && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT) - { - /* Pattern sethi-ori transform to movi. */ - reloc = R_NDS32_TLS_LE_20; - irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); - insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); - bfd_putb32 (insn, contents + laddr); - } -} - -/* Relax LE TLS calculate address instruction pattern. */ - -static void -nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd, - asection *sec, Elf_Internal_Rela *irel, - Elf_Internal_Rela *internal_relocs, - bfd_byte *contents, Elf_Internal_Sym *isymbuf, - Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) -{ - /* Local TLS non-pic - sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20 - ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12 - add ra, ta, tp ; TLS_LE_ADD */ - - uint32_t insn; - bfd_vma laddr; - bfd_signed_vma foff; - Elf_Internal_Rela *i1_irelfn, *irelend; - - irelend = internal_relocs + sec->reloc_count; - laddr = irel->r_offset; - insn = bfd_getb32 (contents + laddr); - i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, - R_NDS32_PTR_RESOLVED); - foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); - BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); - foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); - - /* The range is +/-16k. */ - if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT - && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT) - { - /* Transform add to addi. */ - insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0); - - bfd_putb32 (insn, contents + laddr); - if (i1_irelfn != irelend) - { - i1_irelfn->r_addend |= 1; - *again = TRUE; - } - } -} - -/* Relax LE TLS load store instruction pattern. */ - -static void -nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd, - asection *sec, Elf_Internal_Rela *irel, - Elf_Internal_Rela *internal_relocs, - bfd_byte *contents, Elf_Internal_Sym *isymbuf, - Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) -{ - - uint32_t insn; - bfd_vma laddr; - bfd_signed_vma foff; - Elf_Internal_Rela *i1_irelfn, *irelend; - int success = 0; - - irelend = internal_relocs + sec->reloc_count; - laddr = irel->r_offset; - insn = bfd_getb32 (contents + laddr); - i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, - R_NDS32_PTR_RESOLVED); - foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); - BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); - foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); - - switch ((N32_OP6 (insn) << 8) | (insn & 0xff)) - { - case (N32_OP6_MEM << 8) | N32_MEM_LB: - case (N32_OP6_MEM << 8) | N32_MEM_SB: - case (N32_OP6_MEM << 8) | N32_MEM_LBS: - /* The range is +/-16k. */ - if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT - && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT) - { - insn = - ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0); - success = 1; - break; - } - /* Fall through. */ - case (N32_OP6_MEM << 8) | N32_MEM_LH: - case (N32_OP6_MEM << 8) | N32_MEM_SH: - case (N32_OP6_MEM << 8) | N32_MEM_LHS: - /* The range is +/-32k. */ - if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1 - && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1) - { - insn = - ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1); - success = 1; - break; - } - /* Fall through. */ - case (N32_OP6_MEM << 8) | N32_MEM_LW: - case (N32_OP6_MEM << 8) | N32_MEM_SW: - /* The range is +/-64k. */ - if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2 - && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2) - { - insn = - ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2); - success = 1; - break; - } - /* Fall through. */ - default: - break; - } - - if (success) - { - bfd_putb32 (insn, contents + laddr); - if (i1_irelfn != irelend) - { - i1_irelfn->r_addend |= 1; - *again = TRUE; - } - } -} - /* Relax PTR relocation for nds32_elf_relax_section. */ static bfd_boolean @@ -11039,243 +10623,6 @@ nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, return TRUE; } -/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */ - -static void -nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd, - asection *sec, Elf_Internal_Rela *irel, - Elf_Internal_Rela *internal_relocs, - bfd_byte *contents, Elf_Internal_Sym *isymbuf, - Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) -{ - uint32_t insn; - bfd_signed_vma foff; - Elf_Internal_Rela *i1_irelfn, *irelend; - bfd_vma local_sda, laddr; - - irelend = internal_relocs + sec->reloc_count; - laddr = irel->r_offset; - insn = bfd_getb32 (contents + laddr); - - /* FIXME: It's a little trouble to turn JRAL5 to JAL since - we need additional space. It might be help if we could - borrow some space from instructions to be eliminated - such as sethi, ori, add. */ - if (insn & 0x80000000) - return; - - if (nds32_elf_check_dup_relocs - (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF)) - return; - - i1_irelfn = - find_relocs_at_address (irel, internal_relocs, irelend, - R_NDS32_PTR_RESOLVED); - - /* FIXIT 090606 - The boundary should be reduced since the .plt section hasn't - been created and the address of specific entry is still unknown - Maybe the range between the function call and the begin of the - .text section can be used to decide if the .plt is in the range - of function call. */ - - if (N32_OP6 (insn) == N32_OP6_ALU1 - && N32_SUB5 (insn) == N32_ALU1_ADD) - { - /* Get the value of the symbol referred to by the reloc. */ - nds32_elf_final_sda_base (sec->output_section->owner, link_info, - &local_sda, FALSE); - foff = (bfd_signed_vma) (calculate_plt_memory_address - (abfd, link_info, isymbuf, irel, - symtab_hdr) - local_sda); - /* This condition only happened when symbol is undefined. */ - if (foff == 0) - return; - - if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT) - return; - irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), - R_NDS32_PLT_GOTREL_LO19); - /* addi.gp */ - insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19)); - } - else if (N32_OP6 (insn) == N32_OP6_JREG - && N32_SUB5 (insn) == N32_JREG_JRAL) - { - /* Get the value of the symbol referred to by the reloc. */ - foff = - calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr); - /* This condition only happened when symbol is undefined. */ - if (foff == 0) - return; - if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1) - return; - irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL); - insn = INSN_JAL; - } - else - return; - - bfd_putb32 (insn, contents + laddr); - if (i1_irelfn != irelend) - { - i1_irelfn->r_addend |= 1; - *again = TRUE; - } -} - -/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */ - -static void -nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd, - asection *sec, Elf_Internal_Rela *irel, - Elf_Internal_Rela *internal_relocs, - bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr, - bfd_boolean *again) -{ - uint32_t insn; - bfd_signed_vma foff; - Elf_Internal_Rela *i1_irelfn, *irelend; - bfd_vma local_sda, laddr; - - irelend = internal_relocs + sec->reloc_count; - laddr = irel->r_offset; - insn = bfd_getb32 (contents + laddr); - if (insn & 0x80000000) - return; - - if (nds32_elf_check_dup_relocs - (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF)) - return; - - i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, - R_NDS32_PTR_RESOLVED); - - nds32_elf_final_sda_base (sec->output_section->owner, link_info, - &local_sda, FALSE); - foff = calculate_got_memory_address (abfd, link_info, irel, - symtab_hdr) - local_sda; - - if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT) - { - /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */ - insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA); - bfd_putb32 (insn, contents + laddr); - if (i1_irelfn != irelend) - { - i1_irelfn->r_addend |= 1; - *again = TRUE; - } - } -} - -/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */ - -static void -nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd, - asection *sec, Elf_Internal_Rela *irel, - Elf_Internal_Rela *internal_relocs, - bfd_byte *contents, Elf_Internal_Sym *isymbuf, - Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) -{ - int opc_insn_gotoff; - uint32_t insn; - bfd_signed_vma foff; - Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend; - bfd_vma local_sda, laddr; - - irelend = internal_relocs + sec->reloc_count; - laddr = irel->r_offset; - insn = bfd_getb32 (contents + laddr); - - if (insn & 0x80000000) - return; - - if (nds32_elf_check_dup_relocs - (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF)) - return; - - i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, - R_NDS32_PTR_RESOLVED); - nds32_elf_final_sda_base (sec->output_section->owner, link_info, - &local_sda, FALSE); - foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); - foff = foff - local_sda; - - if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT) - return; - - /* Concatenate opcode and sub-opcode for switch case. - It may be MEM or ALU1. */ - opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff); - switch (opc_insn_gotoff) - { - case (N32_OP6_MEM << 8) | N32_MEM_LW: - /* 4-byte aligned. */ - insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_SW: - insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_LH: - /* 2-byte aligned. */ - insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_LHS: - insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_SH: - insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_LB: - /* 1-byte aligned. */ - insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_LBS: - insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); - break; - case (N32_OP6_MEM << 8) | N32_MEM_SB: - insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); - break; - case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD: - insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19)); - irel->r_info = - ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); - break; - default: - return; - } - - bfd_putb32 (insn, contents + laddr); - if (i1_irelfn != irelend) - { - i1_irelfn->r_addend |= 1; - *again = TRUE; - } - if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, - R_NDS32_INSN16)) != irelend) - i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); - -} - static bfd_boolean nds32_relax_adjust_label (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs, @@ -11792,59 +11139,27 @@ nds32_elf_relax_section (bfd *abfd, asection *sec, /* It is impossible to delete blank, so just continue. */ continue; + case R_NDS32_PTR: + removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs, + &insn_len, &seq_len, contents); + break; case R_NDS32_GOT_LO12: case R_NDS32_GOTOFF_LO12: case R_NDS32_PLTREL_LO12: case R_NDS32_PLT_GOTREL_LO12: case R_NDS32_GOTPC_LO12: - /* Relax for PIC gp-relative low part. */ - nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents, - isymbuf, symtab_hdr); - - /* It is impossible to delete blank, so just continue. */ - continue; case R_NDS32_TLS_LE_LO12: - /* Relax for LE TLS low part. */ - nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents, - isymbuf, symtab_hdr); - - /* It is impossible to delete blank, so just continue. */ - continue; case R_NDS32_TLS_LE_ADD: - nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs, - contents, isymbuf, symtab_hdr, again); - /* It is impossible to delete blank, so just continue. */ - continue; case R_NDS32_TLS_LE_LS: - nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs, - contents, isymbuf, symtab_hdr, again); - continue; - case R_NDS32_PTR: - removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs, - &insn_len, &seq_len, contents); - break; case R_NDS32_PLT_GOT_SUFF: - nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel, - internal_relocs, contents, - isymbuf, symtab_hdr, again); - /* It is impossible to delete blank, so just continue. */ - continue; case R_NDS32_GOT_SUFF: - nds32_elf_relax_got_suff (link_info, abfd, sec, irel, - internal_relocs, contents, - symtab_hdr, again); - /* It is impossible to delete blank, so just continue. */ - continue; case R_NDS32_GOTOFF_SUFF: - nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel, - internal_relocs, contents, - isymbuf, symtab_hdr, again); - /* It is impossible to delete blank, so just continue. */ continue; default: continue; } + if (removed && seq_len - insn_len > 0) { if (!insert_nds32_elf_blank @@ -11990,13 +11305,8 @@ void bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info, int relax_fp_as_gp, int eliminate_gc_relocs, - FILE * sym_ld_script, int load_store_relax, - int target_optimize, int relax_status, - int relax_round, FILE * ex9_export_file, - FILE * ex9_import_file, - int update_ex9_table, int ex9_limit, - bfd_boolean ex9_loop_aware, - bfd_boolean ifc_loop_aware) + FILE * sym_ld_script, + int load_store_relax) { struct elf_nds32_link_hash_table *table; @@ -12008,17 +11318,9 @@ bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info, table->eliminate_gc_relocs = eliminate_gc_relocs; table->sym_ld_script = sym_ld_script; table ->load_store_relax = load_store_relax; - table->target_optimize = target_optimize; - table->relax_status = relax_status; - table->relax_round = relax_round; - table->ex9_export_file = ex9_export_file; - table->ex9_import_file = ex9_import_file; - table->update_ex9_table = update_ex9_table; - table->ex9_limit = ex9_limit; - table->ex9_loop_aware = ex9_loop_aware; - table->ifc_loop_aware = ifc_loop_aware; } + /* These functions and data-structures are used for fp-as-gp optimization. */ diff --git a/bfd/elf32-nds32.h b/bfd/elf32-nds32.h index bf2e93f581..6466816241 100644 --- a/bfd/elf32-nds32.h +++ b/bfd/elf32-nds32.h @@ -40,12 +40,6 @@ extern "C" { /* To distinguish the assembly code generated by compiler or written manually. */ #define R_NDS32_RELAX_ENTRY_VERBATIM_FLAG (1 << 28) -/* EX9 and link-time IFC must be explicitly enabled, so we - won't mess up handcraft assembly code. */ -/* Enable EX9 optimization for this section. */ -#define R_NDS32_RELAX_ENTRY_EX9_FLAG (1 << 2) -/* Enable IFC optimization for this section. */ -#define R_NDS32_RELAX_ENTRY_IFC_FLAG (1 << 3) /* Two bits for ICT to comply with files without directive. */ /* ICT small model. */ #define R_NDS32_RELAX_ENTRY_ICT_SMALL (0x2 << 4) @@ -73,8 +67,6 @@ extern "C" { /* NOT_OMIT_FP_FLAG is set if this region is not worth for fp-as-gp. */ #define R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG (1 << 1) -/* Suppress EX9 optimization in the region. */ -#define R_NDS32_RELAX_REGION_NO_EX9_FLAG (1 << 2) /* A Innermost loop region. Some optimizations is suppressed in this region due to performance drop. */ #define R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG (1 << 4) @@ -90,38 +82,15 @@ enum NDS32_LOADSTORE_FLOAT_D = 0x10, NDS32_LOADSTORE_IMM = 0x20 }; - -/* Relax tag for nds32_elf_relax_section, we have to specify which - optimization do in this round. */ -enum -{ - NDS32_RELAX_NONE_ROUND = 0, - NDS32_RELAX_NORMAL_ROUND, - NDS32_RELAX_JUMP_IFC_ROUND, - NDS32_RELAX_EX9_BUILD_ROUND, - NDS32_RELAX_EX9_REPLACE_ROUND, - NDS32_RELAX_EMPTY_ROUND -}; - -/* Optimization status mask. */ -#define NDS32_RELAX_JUMP_IFC_DONE (1 << 0) -#define NDS32_RELAX_EX9_DONE (1 << 1) - -/* Optimization turn on mask. */ -#define NDS32_RELAX_JUMP_IFC_ON (1 << 0) -#define NDS32_RELAX_EX9_ON (1 << 1) + extern void nds32_insertion_sort (void *, size_t, size_t, int (*) (const void *, const void *)); -extern int nds32_elf_ex9_init (void); extern int nds32_convert_32_to_16 (bfd *, uint32_t, uint16_t *, int *); extern int nds32_convert_16_to_32 (bfd *, uint16_t, uint32_t *); extern void bfd_elf32_nds32_set_target_option (struct bfd_link_info *, - int, int, FILE *, int, - int, int, int, FILE *, - FILE *, int, int, - bfd_boolean, bfd_boolean); + int, int, FILE *, int); #define nds32_elf_hash_table(info) \ (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ @@ -148,15 +117,6 @@ struct elf_nds32_link_hash_table FILE *sym_ld_script; /* --mgen-symbol-ld-script= */ /* Disable if linking a dynamically linked executable. */ int load_store_relax; - int target_optimize; /* Switch optimization. */ - int relax_status; /* Finished optimization. */ - int relax_round; /* Going optimization. */ - FILE *ex9_export_file; /* --mexport-ex9= */ - FILE *ex9_import_file; /* --mimport-ex9= */ - int update_ex9_table; /* --mupdate-ex9. */ - int ex9_limit; - bfd_boolean ex9_loop_aware; /* Ignore ex9 if inside a loop. */ - bfd_boolean ifc_loop_aware; /* Ignore ifc if inside a loop. */ }; #ifdef __cplusplus diff --git a/gas/config/tc-nds32.c b/gas/config/tc-nds32.c index 01bc17b6c2..39a4ca4bc1 100644 --- a/gas/config/tc-nds32.c +++ b/gas/config/tc-nds32.c @@ -87,10 +87,6 @@ static struct hash_control *nds32_hint_hash; /* Generate relocation for relax or not, and the default is true. */ static int enable_relax_relocs = 1; -/* The value will be used in RELAX_ENTRY. */ -static int enable_relax_ex9 = 0; -/* The value will be used in RELAX_ENTRY. */ -static int enable_relax_ifc = 0; /* Save option -O for performance. */ static int optimize = 0; /* Save option -Os for code size. */ @@ -3525,7 +3521,8 @@ nds32_aligned_cons (int idx) if (now_seg->flags & SEC_CODE && now_seg->flags & SEC_ALLOC && now_seg->flags & SEC_RELOC) { - /* Use BFD_RELOC_NDS32_DATA to avoid EX9 optimization replacing data. */ + /* Use BFD_RELOC_NDS32_DATA to avoid linker + optimization replacing data. */ expressionS exp; exp.X_add_number = 0; @@ -3585,7 +3582,7 @@ nds32_relax_relocs (int relax) char *name; int i; const char *subtype_relax[] = - {"", "", "ex9", "ifc"}; + {"", "",}; name = input_line_pointer; while (*input_line_pointer && !ISSPACE (*input_line_pointer)) @@ -3602,14 +3599,6 @@ nds32_relax_relocs (int relax) case 0: case 1: enable_relax_relocs = relax & enable_relax_relocs; - enable_relax_ex9 = relax & enable_relax_ex9; - enable_relax_ifc = relax & enable_relax_ifc; - break; - case 2: - enable_relax_ex9 = relax; - break; - case 3: - enable_relax_ifc = relax; break; default: break; @@ -3659,31 +3648,6 @@ nds32_omit_fp_begin (int mode) } } -/* Insert relocations to mark the begin and end of ex9 region, - for further relaxation use. - bit[i] for $ri */ - -static void -nds32_no_ex9_begin (int mode) -{ - expressionS exp; - - exp.X_op = O_symbol; - exp.X_add_symbol = abs_section_sym; - if (mode == 1) - { - exp.X_add_number = R_NDS32_RELAX_REGION_NO_EX9_FLAG; - fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0, - BFD_RELOC_NDS32_RELAX_REGION_BEGIN); - } - else - { - exp.X_add_number = R_NDS32_RELAX_REGION_NO_EX9_FLAG; - fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0, - BFD_RELOC_NDS32_RELAX_REGION_END); - } -} - static void nds32_loop_begin (int mode) { @@ -3840,6 +3804,7 @@ nds32_flag (int ignore ATTRIBUTE_UNUSED) *input_line_pointer = saved_char; ignore_rest_of_line (); } + static void ict_model (int ignore ATTRIBUTE_UNUSED) { @@ -3940,8 +3905,6 @@ const pseudo_typeS md_pseudo_table[] = {"hint_func_args", nds32_set_hint_func_args, 0}, /* Abandon?? */ {"omit_fp_begin", nds32_omit_fp_begin, 1}, {"omit_fp_end", nds32_omit_fp_begin, 0}, - {"no_ex9_begin", nds32_no_ex9_begin, 1}, - {"no_ex9_end", nds32_no_ex9_begin, 0}, {"vec_size", nds32_vec_size, 0}, {"flag", nds32_flag, 0}, {"innermost_loop_begin", nds32_loop_begin, 1}, @@ -4354,20 +4317,6 @@ nds32_elf_record_fixup_exp (fragS *fragP, const char *str, else abort (); - fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize, - insn->info, 1 /* pcrel */, reloc); - } - else if (fld && fld->bitpos == 0 && (insn->attr & NASM_ATTR_IFC_EXT)) - { - /* Relocation for ifcall instruction. */ - if (insn->opcode->isize == 2 && fld->bitsize == 9 && fld->shift == 1) - reloc = BFD_RELOC_NDS32_10IFCU_PCREL; - else if (insn->opcode->isize == 4 && fld->bitsize == 16 - && fld->shift == 1) - reloc = BFD_RELOC_NDS32_17IFC_PCREL; - else - abort (); - fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize, insn->info, 1 /* pcrel */, reloc); } @@ -4634,11 +4583,6 @@ nds32_set_elf_flags_by_insn (struct nds32_asm_insn * insn) as_bad (_("instruction %s requires enabling DX_REGS extension"), insn->opcode->opcode); } - /* TODO: for DX_REG set but not for MAC, DIV, AUDIO */ - else if (insn->opcode->attr & NASM_ATTR_IFC_EXT) - { - nds32_elf_flags |= E_NDS32_HAS_IFC_INST; - } /* TODO: E_NDS32_HAS_SATURATION_INST */ } @@ -6251,12 +6195,11 @@ nds32_insert_relax_entry (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, seginfo = seg_info (sec); if (!seginfo || !symbol_rootP || !subseg_text_p (sec) || sec->size == 0) return; - /* If there is no relocation and relax is disabled, it is not necessary to - insert R_NDS32_RELAX_ENTRY for linker do EX9 or IFC optimization. */ + for (fixp = seginfo->fix_root; fixp; fixp = fixp->fx_next) if (!fixp->fx_done) break; - if (!fixp && !enable_relax_ex9 && !verbatim && ict_flag == ICT_NONE) + if (!fixp && !verbatim && ict_flag == ICT_NONE) return; subseg_change (sec, 0); @@ -6264,7 +6207,7 @@ nds32_insert_relax_entry (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, /* Set RELAX_ENTRY flags for linker. */ fragP = seginfo->frchainP->frch_root; exp.X_op = O_symbol; - exp.X_add_symbol = section_symbol (sec); + exp.X_add_symbol = abs_section_sym; exp.X_add_number = 0; if (!enable_relax_relocs) exp.X_add_number |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG; @@ -6273,10 +6216,6 @@ nds32_insert_relax_entry (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, /* These flags are only enabled when global relax is enabled. Maybe we can check DISABLE_RELAX_FLAG at link-time, so we set them anyway. */ - if (enable_relax_ex9) - exp.X_add_number |= R_NDS32_RELAX_ENTRY_EX9_FLAG; - if (enable_relax_ifc) - exp.X_add_number |= R_NDS32_RELAX_ENTRY_IFC_FLAG; if (verbatim) exp.X_add_number |= R_NDS32_RELAX_ENTRY_VERBATIM_FLAG; if (ict_flag == ICT_SMALL) @@ -6515,12 +6454,12 @@ nds32_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) fixP->tc_fix_data = NULL; /* Transform specific relocations here for later relocation generation. - Tag data here for ex9 relaxation and tag tls data for linker. */ + Tag tls data for linker. */ switch (fixP->fx_r_type) { case BFD_RELOC_NDS32_DATA: - if (!enable_relax_ex9) - fixP->fx_done = 1; + /* This reloc is obselete, we do not need it so far. */ + fixP->fx_done = 1; break; case BFD_RELOC_NDS32_TPOFF: case BFD_RELOC_NDS32_TLS_LE_HI20: diff --git a/include/elf/nds32.h b/include/elf/nds32.h index 1b3a3219d0..b70561a8ef 100644 --- a/include/elf/nds32.h +++ b/include/elf/nds32.h @@ -217,7 +217,6 @@ END_RELOC_NUMBERS (R_NDS32_max) /* MFUSR rt, PC and correct ISYNC, MSYNC instructions. Old N1213HC has no such instructions. */ #define E_NDS32_HAS_MFUSR_PC_INST 0x00000100 /* Reclaimed. */ -#define E_NDS32_HAS_EX9_INST 0x00000100 /* v3, ELF 1.4. */ /* C/C++ performance extension instructions. */ #define E_NDS32_HAS_EXT_INST 0x00000200 /* Performance extension set II instructions. */ @@ -232,7 +231,6 @@ END_RELOC_NUMBERS (R_NDS32_max) #define E_NDS32_HAS_DIV_DX_INST 0x00002000 /* v2. */ /* 16-bit instructions. */ #define E_NDS32_HAS_16BIT_INST 0x00004000 /* Reclaimed. */ -#define E_NDS32_HAS_IFC_INST 0x00004000 /* v3, ELF 1.4. */ /* String operation instructions. */ #define E_NDS32_HAS_STRING_INST 0x00008000 /* Reduced register file. */ @@ -293,7 +291,7 @@ END_RELOC_NUMBERS (R_NDS32_max) /* Andes ELF Version 1.31. */ #define E_NDS32_ELF_VER_1_3 0x1 /* Andes ELF Version 1.4. Change the way we fix .debug_* and .gcc_except_table. - Change three bit for EX9, IFC and SAT. */ + Change three bit for SAT. */ #define E_NDS32_ELF_VER_1_4 0x2 #endif diff --git a/ld/emultempl/nds32elf.em b/ld/emultempl/nds32elf.em index eb29d0472f..255b04cbb2 100644 --- a/ld/emultempl/nds32elf.em +++ b/ld/emultempl/nds32elf.em @@ -32,15 +32,6 @@ static int eliminate_gc_relocs = 0; /* --meliminate-gc-relocs */ static FILE *sym_ld_script = NULL; /* --mgen-symbol-ld-script= */ /* Disable if linking a dynamically linked executable. */ static int load_store_relax = 1; -static int target_optimize = 0; /* Switch optimization. */ -static int relax_status = 0; /* Finished optimization. */ -static int relax_round = 0; /* Going optimization. */ -static FILE *ex9_export_file = NULL; /* --mexport-ex9= */ -static FILE *ex9_import_file = NULL; /* --mimport-ex9= */ -static int update_ex9_table = 0; /* --mupdate-ex9. */ -static int ex9_limit = 511; -static bfd_boolean ex9_loop_aware = FALSE; /* Ignore ex9 if inside a loop. */ -static bfd_boolean ifc_loop_aware = FALSE; /* Ignore ifc if inside a loop. */ /* Save the target options into output bfd to avoid using to many global variables. Do this after the output has been created, but before @@ -56,14 +47,11 @@ nds32_elf_create_output_section_statements (void) return; } - bfd_elf32_nds32_set_target_option (&link_info, relax_fp_as_gp, + bfd_elf32_nds32_set_target_option (&link_info, + relax_fp_as_gp, eliminate_gc_relocs, sym_ld_script, - load_store_relax, - target_optimize, relax_status, relax_round, - ex9_export_file, ex9_import_file, - update_ex9_table, ex9_limit, - ex9_loop_aware, ifc_loop_aware); + load_store_relax); } static void @@ -73,25 +61,7 @@ nds32_elf_after_parse (void) DISABLE_RELAXATION; if (!RELAXATION_ENABLED) - { - target_optimize = target_optimize & (!NDS32_RELAX_JUMP_IFC_ON); - target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON); - relax_fp_as_gp = 0; - } - - if (ex9_import_file != NULL) - { - ex9_export_file = NULL; - target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON); - } - else - update_ex9_table = 0; - - if (bfd_link_pic (&link_info)) - { - target_optimize = target_optimize & (!NDS32_RELAX_JUMP_IFC_ON); - target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON); - } + relax_fp_as_gp = 0; gld${EMULATION_NAME}_after_parse (); } @@ -124,34 +94,6 @@ nds32_elf_after_open (void) einfo (_("%F%P: %pB: ABI version of object files mismatched\n"), abfd); } - -#if defined NDS32_EX9_EXT - /* Append .ex9.itable section in the last input object file. */ - if (abfd->link_next == NULL && (target_optimize & NDS32_RELAX_EX9_ON)) - { - asection *itable; - struct bfd_link_hash_entry *h; - itable = bfd_make_section_with_flags (abfd, ".ex9.itable", - SEC_CODE | SEC_ALLOC | SEC_LOAD - | SEC_HAS_CONTENTS | SEC_READONLY - | SEC_IN_MEMORY | SEC_KEEP); - if (itable) - { - itable->gc_mark = 1; - itable->alignment_power = 2; - itable->size = 0x1000; - itable->contents = bfd_zalloc (abfd, itable->size); - - /* Add a symbol in the head of ex9.itable to objdump clearly. */ - h = bfd_link_hash_lookup (link_info.hash, "_EX9_BASE_", - FALSE, FALSE, FALSE); - _bfd_generic_link_add_one_symbol - (&link_info, link_info.output_bfd, "_EX9_BASE_", - BSF_GLOBAL | BSF_WEAK, itable, 0, (const char *) NULL, FALSE, - get_elf_backend_data (link_info.output_bfd)->collect, &h); - } - } -#endif } /* Check object files if the target is dynamic linked executable @@ -210,26 +152,6 @@ PARSE_AND_LIST_PROLOGUE=' #define OPTION_REDUCE_FP_UPDATE (OPTION_BASELINE + 4) #define OPTION_NO_REDUCE_FP_UPDATE (OPTION_BASELINE + 5) #define OPTION_EXPORT_SYMBOLS (OPTION_BASELINE + 6) - -/* These are only available to ex9. */ -#if defined NDS32_EX9_EXT -#define OPTION_EX9_BASELINE 320 -#define OPTION_EX9_TABLE (OPTION_EX9_BASELINE + 1) -#define OPTION_NO_EX9_TABLE (OPTION_EX9_BASELINE + 2) -#define OPTION_EXPORT_EX9 (OPTION_EX9_BASELINE + 3) -#define OPTION_IMPORT_EX9 (OPTION_EX9_BASELINE + 4) -#define OPTION_UPDATE_EX9 (OPTION_EX9_BASELINE + 5) -#define OPTION_EX9_LIMIT (OPTION_EX9_BASELINE + 6) -#define OPTION_EX9_LOOP (OPTION_EX9_BASELINE + 7) -#endif - -/* These are only available to link-time ifc. */ -#if defined NDS32_IFC_EXT -#define OPTION_IFC_BASELINE 340 -#define OPTION_JUMP_IFC (OPTION_IFC_BASELINE + 1) -#define OPTION_NO_JUMP_IFC (OPTION_IFC_BASELINE + 2) -#define OPTION_IFC_LOOP (OPTION_IFC_BASELINE + 3) -#endif ' PARSE_AND_LIST_LONGOPTS=' { "mfp-as-gp", no_argument, NULL, OPTION_FP_AS_GP}, @@ -243,50 +165,12 @@ PARSE_AND_LIST_LONGOPTS=' { "mrelax-omit-fp", no_argument, NULL, OPTION_FP_AS_GP}, { "mrelax-no-omit-fp", no_argument, NULL, OPTION_NO_FP_AS_GP}, { "mgen-symbol-ld-script", required_argument, NULL, OPTION_EXPORT_SYMBOLS}, - /* These are specific optioins for ex9-ext support. */ -#if defined NDS32_EX9_EXT - { "mex9", no_argument, NULL, OPTION_EX9_TABLE}, - { "mno-ex9", no_argument, NULL, OPTION_NO_EX9_TABLE}, - { "mexport-ex9", required_argument, NULL, OPTION_EXPORT_EX9}, - { "mimport-ex9", required_argument, NULL, OPTION_IMPORT_EX9}, - { "mupdate-ex9", no_argument, NULL, OPTION_UPDATE_EX9}, - { "mex9-limit", required_argument, NULL, OPTION_EX9_LIMIT}, - { "mex9-loop-aware", no_argument, NULL, OPTION_EX9_LOOP}, -#endif - /* These are specific optioins for ifc-ext support. */ -#if defined NDS32_IFC_EXT - { "mifc", no_argument, NULL, OPTION_JUMP_IFC}, - { "mno-ifc", no_argument, NULL, OPTION_NO_JUMP_IFC}, - { "mifc-loop-aware", no_argument, NULL, OPTION_IFC_LOOP}, -#endif ' PARSE_AND_LIST_OPTIONS=' fprintf (file, _("\ --m[no-]fp-as-gp Disable/enable fp-as-gp relaxation\n")); fprintf (file, _("\ --mexport-symbols=FILE Exporting symbols in linker script\n")); - -#if defined NDS32_EX9_EXT - fprintf (file, _("\ - --m[no-]ex9 Disable/enable link-time EX9 relaxation\n")); - fprintf (file, _("\ - --mexport-ex9=FILE Export EX9 table after linking\n")); - fprintf (file, _("\ - --mimport-ex9=FILE Import Ex9 table for EX9 relaxation\n")); - fprintf (file, _("\ - --mupdate-ex9 Update existing EX9 table\n")); - fprintf (file, _("\ - --mex9-limit=NUM Maximum number of entries in ex9 table\n")); - fprintf (file, _("\ - --mex9-loop-aware Avoid generate EX9 instruction inside loop\n")); -#endif - -#if defined NDS32_IFC_EXT - fprintf (file, _("\ - --m[no-]ifc Disable/enable link-time IFC optimization\n")); - fprintf (file, _("\ - --mifc-loop-aware Avoid generate IFC instruction inside loop\n")); -#endif ' PARSE_AND_LIST_ARGS_CASES=' case OPTION_BASELINE: @@ -316,62 +200,6 @@ PARSE_AND_LIST_ARGS_CASES=' einfo (_("%F%P: cannot open map file %s: %E\n"), optarg); } break; -#if defined NDS32_EX9_EXT - case OPTION_EX9_TABLE: - target_optimize = target_optimize | NDS32_RELAX_EX9_ON; - break; - case OPTION_NO_EX9_TABLE: - target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON); - break; - case OPTION_EXPORT_EX9: - if (!optarg) - einfo (_("%P: missing file for --mexport-ex9=\n")); - - if(strcmp (optarg, "-") == 0) - ex9_export_file = stdout; - else - { - ex9_export_file = fopen (optarg, "wb"); - if(ex9_export_file == NULL) - einfo (_("%F%P: cannot open ex9 export file %s\n"), optarg); - } - break; - case OPTION_IMPORT_EX9: - if (!optarg) - einfo (_("%P: missing file for --mimport-ex9=\n")); - - ex9_import_file = fopen (optarg, "rb+"); - if(ex9_import_file == NULL) - einfo (_("%F%P: cannot open ex9 import file %s\n"), optarg); - break; - case OPTION_UPDATE_EX9: - update_ex9_table = 1; - break; - case OPTION_EX9_LIMIT: - if (optarg) - { - ex9_limit = atoi (optarg); - if (ex9_limit > 511 || ex9_limit < 1) - einfo (_("%F%P: the range of ex9_limit must between 1 and 511\n")); - } - break; - case OPTION_EX9_LOOP: - target_optimize = target_optimize | NDS32_RELAX_EX9_ON; - ex9_loop_aware = 1; - break; -#endif -#if defined NDS32_IFC_EXT - case OPTION_JUMP_IFC: - target_optimize = target_optimize | NDS32_RELAX_JUMP_IFC_ON; - break; - case OPTION_NO_JUMP_IFC: - target_optimize = target_optimize & (!NDS32_RELAX_JUMP_IFC_ON); - break; - case OPTION_IFC_LOOP: - target_optimize = target_optimize | NDS32_RELAX_JUMP_IFC_ON; - ifc_loop_aware = 1; - break; -#endif ' LDEMUL_AFTER_OPEN=nds32_elf_after_open LDEMUL_AFTER_PARSE=nds32_elf_after_parse diff --git a/opcodes/nds32-asm.c b/opcodes/nds32-asm.c index b5309fbd54..f8d075c845 100644 --- a/opcodes/nds32-asm.c +++ b/opcodes/nds32-asm.c @@ -169,7 +169,6 @@ const field_t operand_fields[] = {"i5u", 0, 5, 0, HW_UINT, NULL}, {"ib5u", 10, 5, 0, HW_UINT, NULL}, /* imm5 field in ALU. */ {"ib5s", 10, 5, 0, HW_INT, NULL}, /* imm5 field in ALU. */ - {"i9u", 0, 9, 0, HW_UINT, NULL}, /* for ex9.it. */ {"ia3u", 3, 3, 0, HW_UINT, NULL}, /* for bmski33, fexti33. */ {"i8u", 0, 8, 0, HW_UINT, NULL}, {"ib8u", 7, 8, 0, HW_UINT, NULL}, /* for ffbi. */ @@ -293,7 +292,6 @@ struct nds32_opcode nds32_opcodes[] = {"jrnez", "%rb", JREG (JRNEZ), 4, ATTR (BRANCH) | ATTR_V3, 0, NULL, 0, NULL}, {"jralnez", "%rt,%rb", JREG (JRALNEZ), 4, ATTR (BRANCH) | ATTR_V3, 0, NULL, 0, NULL}, {"ret", "%rb", JREG (JR) | JREG_RET, 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL}, - {"ifret", "", JREG (JR) | JREG_IFC | JREG_RET, 4, ATTR (BRANCH) | ATTR (IFC_EXT), 0, NULL, 0, NULL}, {"jral", "%rb", JREG (JRAL) | RT (30), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL}, {"jralnez", "%rb", JREG (JRALNEZ) | RT (30), 4, ATTR (BRANCH) | ATTR_V3, 0, NULL, 0, NULL}, {"ret", "", JREG (JR) | JREG_RET | RB (30), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL}, @@ -305,8 +303,6 @@ struct nds32_opcode nds32_opcodes[] = {"beq", "%rt,%ra,%i14s1", OP6 (BR1), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL}, {"bne", "%rt,%ra,%i14s1", OP6 (BR1) | N32_BIT (14), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL}, /* seg-BR2. */ -#define BR2(sub) (OP6 (BR2) | (N32_BR2_ ## sub << 16)) - {"ifcall", "%i16s1", BR2 (IFCALL), 4, ATTR (IFC_EXT), 0, NULL, 0, NULL}, {"beqz", "%rt,%i16s1", BR2 (BEQZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL}, {"bnez", "%rt,%i16s1", BR2 (BNEZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL}, {"bgez", "%rt,%i16s1", BR2 (BGEZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL}, @@ -709,7 +705,6 @@ struct nds32_opcode nds32_opcodes[] = /* SEG11_2 bit7~bit5. */ {"jr5", "%ra5", 0xdd00, 2, ATTR_ALL, 0, NULL, 0, NULL}, {"jral5", "%ra5", 0xdd20, 2, ATTR_ALL, 0, NULL, 0, NULL}, - {"ex9.it", "%i5u", 0xdd40, 2, ATTR (EX9_EXT), 0, NULL, 0, NULL}, {"ret5", "%ra5", 0xdd80, 2, ATTR_ALL, 0, NULL, 0, NULL}, {"add5.pc", "%ra5", 0xdda0, 2, ATTR_V3, 0, NULL, 0, NULL}, /* SEG11_3 if Ra5=30. */ @@ -726,13 +721,10 @@ struct nds32_opcode nds32_opcodes[] = /* SEG13_1 bit8. */ {"beqzs8", "%i8s1", 0xe800, 2, ATTR_PCREL | ATTR_ALL, USE_REG (15), NULL, 0, NULL}, {"bnezs8", "%i8s1", 0xe900, 2, ATTR_PCREL | ATTR_ALL, USE_REG (15), NULL, 0, NULL}, - /* SEG13_2 bit8~bit5. */ - {"ex9.it", "%i9u", 0xea00, 2, ATTR (EX9_EXT), 0, NULL, 0, NULL}, /* SEG14 bit7. */ {"lwi37.sp", "=rt38,[+%i7u2]", 0xf000, 2, ATTR_V2UP, USE_REG (31), NULL, 0, NULL}, {"swi37.sp", "%rt38,[+%i7u2]", 0xf080, 2, ATTR_V2UP, USE_REG (31), NULL, 0, NULL}, /* SEG15 bit10~bit9. */ - {"ifcall9", "%i9u1", 0xf800, 2, ATTR (IFC_EXT), 0, NULL, 0, NULL}, {"movpi45", "=rt4,%pi5", 0xfa00, 2, ATTR_V3MUP, 0, NULL, 0, NULL}, /* SEG15_1 bit8. */ {"movd44", "=rt5e,%ra5e", 0xfd00, 2, ATTR_V3MUP, 0, NULL, 0, NULL}, @@ -758,7 +750,6 @@ struct nds32_opcode nds32_opcodes[] = {"or33", "=rt3,%ra3", 0xfe07, 2, ATTR_V3MUP, 0, NULL, 0, NULL}, /* SEG-Alias instructions. */ {"nop16", "", 0x9200, 2, ATTR_ALL, 0, NULL, 0, NULL}, - {"ifret16", "", 0x83ff, 2, ATTR (IFC_EXT), 0, NULL, 0, NULL}, /* Saturation ext ISA. */ {"kaddw", "=rt,%ra,%rb", ALU2 (KADD), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL}, diff --git a/opcodes/nds32-dis.c b/opcodes/nds32-dis.c index 418019ae87..c1ccc3e54b 100644 --- a/opcodes/nds32-dis.c +++ b/opcodes/nds32-dis.c @@ -39,8 +39,6 @@ #define UNKNOWN_INSN_MSG _("*unknown*") #define NDS32_PARSE_INSN16 0x01 #define NDS32_PARSE_INSN32 0x02 -#define NDS32_PARSE_EX9IT 0x04 -#define NDS32_PARSE_EX9TAB 0x08 extern struct nds32_opcode nds32_opcodes[]; extern const field_t operand_fields[]; @@ -65,62 +63,10 @@ struct objdump_disasm_info arelent * reloc; }; -/* file_ptr ex9_filepos=NULL;. */ -bfd_byte *ex9_data = NULL; -int ex9_ready = 0, ex9_base_offset = 0; - /* Hash function for disassemble. */ static htab_t opcode_htab; -static void -nds32_ex9_info (bfd_vma pc ATTRIBUTE_UNUSED, - disassemble_info *info, uint32_t ex9_index) -{ - uint32_t insn; - static asymbol *itb = NULL; - bfd_byte buffer[4]; - long unsigned int isec_vma; - - /* Lookup itb symbol. */ - if (!itb) - { - int i; - - for (i = 0; i < info->symtab_size; i++) - if (bfd_asymbol_name (info->symtab[i]) - && (strcmp (bfd_asymbol_name (info->symtab[i]), "$_ITB_BASE_") == 0 - || strcmp (bfd_asymbol_name (info->symtab[i]), - "_ITB_BASE_") == 0)) - { - itb = info->symtab[i]; - break; - } - - /* Lookup it only once, in case _ITB_BASE_ doesn't exist at all. */ - if (itb == NULL) - itb = (void *) -1; - } - - if (itb == (void *) -1) - return; - - isec_vma = itb->section->vma; - isec_vma = itb->section->vma - bfd_asymbol_value (itb); - if (!itb->section || !itb->section->owner) - return; - bfd_get_section_contents (itb->section->owner, itb->section, buffer, - ex9_index * 4 - isec_vma, 4); - insn = bfd_getb32 (buffer); - /* 16-bit instructions in ex9 table. */ - if (insn & 0x80000000) - print_insn16 (pc, info, (insn & 0x0000FFFF), - NDS32_PARSE_INSN16 | NDS32_PARSE_EX9IT); - /* 32-bit instructions in ex9 table. */ - else - print_insn32 (pc, info, insn, NDS32_PARSE_INSN32 | NDS32_PARSE_EX9IT); -} - /* Find the value map register name. */ static keyword_t * @@ -245,9 +191,6 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, return; } - if (parse_mode & NDS32_PARSE_EX9IT) - func (stream, " !"); - pstr_src = opc->instruction; if (*pstr_src == 0) { @@ -348,12 +291,11 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, int_value = 0 - (128 - int_value); func (stream, "#%d", int_value); } - /* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8/ifcall9. */ + /* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8. */ else if ((opc->value == 0xc000) || (opc->value == 0xc800) || (opc->value == 0xd000) || (opc->value == 0xd800) || (opc->value == 0xd500) || (opc->value == 0xe800) - || (opc->value == 0xe900) - || (opc->value == 0xf800)) + || (opc->value == 0xe900)) { info->print_address_func (int_value + pc, info); } @@ -365,12 +307,6 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, func (stream, "~$%s", keyword_gpr[push25gpr].name); func (stream, ", $fp, $gp, $lp}"); } - /* ex9.it. */ - else if ((opc->value == 0xdd40) || (opc->value == 0xea00)) - { - func (stream, "#%d", int_value); - nds32_ex9_info (pc, info, int_value); - } else if (pfd->hw_res == HW_INT) { if (int_value < 10) @@ -444,15 +380,7 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED, /* FIXME: Handle relocation. */ if (info->flags & INSN_HAS_RELOC) pc = 0; - /* Check if insn32 in ex9 table. */ - if (parse_mode & NDS32_PARSE_EX9IT) - info->print_address_func ((pc & 0xFE000000) | int_value, - info); - /* Check if decode ex9 table, PC(31,25)|Inst(23,0)<<1. */ - else if (parse_mode & NDS32_PARSE_EX9TAB) - func (stream, "PC(31,25)|#0x%x", int_value); - else - info->print_address_func (int_value + pc, info); + info->print_address_func (int_value + pc, info); } else if (op == N32_OP6_LSMW) { @@ -968,13 +896,8 @@ nds32_special_opcode (uint32_t insn, struct nds32_opcode **opc) case JREG (JR) | JREG_RET: if (__GF (insn, 8, 2) != 0) string = "tit"; - break; + break; case N32_OP6_COP: - break; - case 0xea00: - /* break16 ex9 */ - if (__GF (insn, 5, 4) != 0) - string = "ex9"; break; case 0x9200: /* nop16 */ @@ -1057,12 +980,6 @@ print_insn_nds32 (bfd_vma pc, disassemble_info *info) /* 16-bit instruction. */ if (insn & 0x80000000) { - if (info->section && strstr (info->section->name, ".ex9.itable") != NULL) - { - print_insn16 (pc, info, (insn & 0x0000FFFF), - NDS32_PARSE_INSN16 | NDS32_PARSE_EX9TAB); - return 4; - } print_insn16 (pc, info, (insn >> 16), NDS32_PARSE_INSN16); return 2; } @@ -1070,11 +987,7 @@ print_insn_nds32 (bfd_vma pc, disassemble_info *info) /* 32-bit instructions. */ else { - if (info->section - && strstr (info->section->name, ".ex9.itable") != NULL) - print_insn32 (pc, info, insn, NDS32_PARSE_INSN32 | NDS32_PARSE_EX9TAB); - else - print_insn32 (pc, info, insn, NDS32_PARSE_INSN32); + print_insn32 (pc, info, insn, NDS32_PARSE_INSN32); return 4; } } -- 2.19.0