diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index e6f4a9f..063d437 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -11717,10 +11717,14 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) /* This needs to happen before Tag_ABI_FP_number_model is merged. */ if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) { - /* Ignore mismatches if the object doesn't use floating point. */ - if (out_attr[Tag_ABI_FP_number_model].i == 0) + /* Ignore mismatches if the object doesn't use floating point or is + floating point ABI independent. */ + if (out_attr[Tag_ABI_FP_number_model].i == 0 + || (in_attr[Tag_ABI_FP_number_model].i != 0 + && out_attr[Tag_ABI_VFP_args].i == 3)) out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; - else if (in_attr[Tag_ABI_FP_number_model].i != 0) + else if (in_attr[Tag_ABI_FP_number_model].i != 0 + && in_attr[Tag_ABI_VFP_args].i != 3) { _bfd_error_handler (_("error: %B uses VFP register arguments, %B does not"), @@ -14671,7 +14675,7 @@ elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATT && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) { int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); - if (abi) + if (abi == 1) i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; else i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; diff --git a/binutils/readelf.c b/binutils/readelf.c index f038422..2e451bf 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -11585,7 +11585,7 @@ static const char * arm_attr_tag_ABI_enum_size[] = static const char * arm_attr_tag_ABI_HardFP_use[] = {"As Tag_FP_arch", "SP only", "DP only", "SP and DP"}; static const char * arm_attr_tag_ABI_VFP_args[] = - {"AAPCS", "VFP registers", "custom"}; + {"AAPCS", "VFP registers", "custom", "compatible"}; static const char * arm_attr_tag_ABI_WMMX_args[] = {"AAPCS", "WMMX registers", "custom"}; static const char * arm_attr_tag_ABI_optimization_goals[] = diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index cb0030c..17473b3 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -9997,9 +9997,16 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) conventions" - we don't know any such conventions, so leave it as "auto". */ break; + case 3: + /* "Code is compatible with both the base + and VFP variants; the user did not permit + non-variadic functions to pass FP + parameters/results" - leave it as + "auto". */ + break; default: /* Attribute value not mentioned in the - October 2008 ABI, so leave it as + November 2012 ABI, so leave it as "auto". */ break; } diff --git a/gold/arm.cc b/gold/arm.cc index 6c472bb..4af9f62 100644 --- a/gold/arm.cc +++ b/gold/arm.cc @@ -10056,7 +10056,7 @@ Target_arm::do_adjust_elf_header( if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN) { Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args); - if (attr->int_value()) + if (attr->int_value() == 1) flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD; else flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT; @@ -10493,10 +10493,13 @@ Target_arm::merge_object_attributes( != out_attr[elfcpp::Tag_ABI_VFP_args].int_value()) { // Ignore mismatches if the object doesn't use floating point. */ - if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0) + if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0 + || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0 + && out_attr[elfcpp::Tag_ABI_VFP_args].int_value() == 3)) out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value( in_attr[elfcpp::Tag_ABI_VFP_args].int_value()); else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0 + && in_attr[elfcpp::Tag_ABI_VFP_args].int_value() != 3 && parameters->options().warn_mismatch()) gold_error(_("%s uses VFP register arguments, output does not"), name); diff --git a/ld/testsuite/ld-arm/attr-merge-2.attr b/ld/testsuite/ld-arm/attr-merge-2.attr index 578333b..9f63df4 100644 --- a/ld/testsuite/ld-arm/attr-merge-2.attr +++ b/ld/testsuite/ld-arm/attr-merge-2.attr @@ -11,4 +11,5 @@ File Attributes Tag_ABI_align_needed: 8-byte Tag_ABI_align_preserved: 8-byte, except leaf SP Tag_ABI_enum_size: small + Tag_ABI_VFP_args: VFP registers Tag_ABI_optimization_goals: Aggressive Debug diff --git a/ld/testsuite/ld-arm/attr-merge-2a.s b/ld/testsuite/ld-arm/attr-merge-2a.s index 0303163..8a7260c 100644 --- a/ld/testsuite/ld-arm/attr-merge-2a.s +++ b/ld/testsuite/ld-arm/attr-merge-2a.s @@ -6,5 +6,6 @@ .eabi_attribute 24, 1 .eabi_attribute 25, 1 .eabi_attribute 26, 1 + .eabi_attribute 28, 3 .eabi_attribute 30, 6 .file "attr-merge-2a.s" diff --git a/ld/testsuite/ld-arm/attr-merge-2b.s b/ld/testsuite/ld-arm/attr-merge-2b.s index 047890a..a22776b 100644 --- a/ld/testsuite/ld-arm/attr-merge-2b.s +++ b/ld/testsuite/ld-arm/attr-merge-2b.s @@ -6,6 +6,7 @@ .eabi_attribute 24, 1 .eabi_attribute 25, 1 .eabi_attribute 26, 1 + .eabi_attribute 28, 1 .eabi_attribute 30, 6 .eabi_attribute 18, 4 .file "attr-merge-2b.s" diff --git a/ld/testsuite/ld-arm/attr-merge-4.attr b/ld/testsuite/ld-arm/attr-merge-4.attr index 75fd063..f74b024 100644 --- a/ld/testsuite/ld-arm/attr-merge-4.attr +++ b/ld/testsuite/ld-arm/attr-merge-4.attr @@ -5,4 +5,6 @@ File Attributes Tag_CPU_arch_profile: Microcontroller Tag_ARM_ISA_use: Yes Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_VFP_args: compatible Tag_also_compatible_with: v6-M diff --git a/ld/testsuite/ld-arm/attr-merge-4a.s b/ld/testsuite/ld-arm/attr-merge-4a.s index b5b77bf..9282fa2 100644 --- a/ld/testsuite/ld-arm/attr-merge-4a.s +++ b/ld/testsuite/ld-arm/attr-merge-4a.s @@ -5,3 +5,6 @@ @ Tag_also_compatible_with = v6-M .eabi_attribute Tag_also_compatible_with, "\006\013" + + .eabi_attribute Tag_ABI_FP_number_model, 3 + .eabi_attribute Tag_ABI_VFP_args, 3 diff --git a/ld/testsuite/ld-arm/attr-merge-4b.s b/ld/testsuite/ld-arm/attr-merge-4b.s index d2eb6de..2cf68df 100644 --- a/ld/testsuite/ld-arm/attr-merge-4b.s +++ b/ld/testsuite/ld-arm/attr-merge-4b.s @@ -5,3 +5,6 @@ @ Tag_also_compatible_with = v4T .eabi_attribute Tag_also_compatible_with, "\006\002" + + .eabi_attribute Tag_ABI_FP_number_model, 0 + .eabi_attribute Tag_ABI_VFP_args, 0 diff --git a/ld/testsuite/ld-arm/attr-merge-6.attr b/ld/testsuite/ld-arm/attr-merge-6.attr index 0af32f7..1ee5d40 100644 --- a/ld/testsuite/ld-arm/attr-merge-6.attr +++ b/ld/testsuite/ld-arm/attr-merge-6.attr @@ -5,5 +5,6 @@ File Attributes Tag_CPU_arch_profile: Application Tag_ARM_ISA_use: Yes Tag_THUMB_ISA_use: Thumb-2 + Tag_ABI_FP_number_model: IEEE 754 Tag_MPextension_use: Allowed Tag_Virtualization_use: TrustZone diff --git a/ld/testsuite/ld-arm/attr-merge-6a.s b/ld/testsuite/ld-arm/attr-merge-6a.s index 056d8c8..0423bbf 100644 --- a/ld/testsuite/ld-arm/attr-merge-6a.s +++ b/ld/testsuite/ld-arm/attr-merge-6a.s @@ -1,4 +1,6 @@ .cpu cortex-a9 .fpu softvfp + .eabi_attribute 23, 3 + .eabi_attribute 28, 0 .eabi_attribute 70, 1 .file "attr-merge-6a.s" diff --git a/ld/testsuite/ld-arm/attr-merge-6b.s b/ld/testsuite/ld-arm/attr-merge-6b.s index b9ef4d2..9383bcc 100644 --- a/ld/testsuite/ld-arm/attr-merge-6b.s +++ b/ld/testsuite/ld-arm/attr-merge-6b.s @@ -1,3 +1,5 @@ .cpu cortex-a9 .fpu softvfp + .eabi_attribute 23, 3 + .eabi_attribute 28, 3 .file "attr-merge-6b.s"