Index: opcodes/arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.97
diff -c -3 -p -r1.97 arm-dis.c
*** opcodes/arm-dis.c	15 Jun 2009 15:42:34 -0000	1.97
--- opcodes/arm-dis.c	16 Jun 2009 13:54:34 -0000
*************** print_insn_neon (struct disassemble_info
*** 2665,2670 ****
--- 2665,2702 ----
    return FALSE;
  }
  
+ /* Given a bfd_mach_arm_XXX value, returns a bitmask of the
+    corresponding base ARM architecture(s) supported by that
+    type of CPU.  FIXME: This could more efficiently implemented
+    as a constant array, although it would also be less robust.  */
+ 
+ static unsigned long
+ arm_arch_from_mach (unsigned long mach)
+ {
+   switch (mach)
+     {
+       /* If the user has not specified a machine
+ 	 type, allow all architecture types.  */
+     case bfd_mach_arm_unknown: return -1UL;
+     case bfd_mach_arm_2:       return ARM_AEXT_V2;
+     case bfd_mach_arm_2a:      return ARM_AEXT_V2;
+     case bfd_mach_arm_3:       return ARM_AEXT_V3;
+     case bfd_mach_arm_3M:      return ARM_AEXT_V3M;
+     case bfd_mach_arm_4:       return ARM_AEXT_V4;
+     case bfd_mach_arm_4T:      return ARM_AEXT_V4T;
+     case bfd_mach_arm_5:       return ARM_AEXT_V5;
+     case bfd_mach_arm_5T:      return ARM_AEXT_V5T;
+     case bfd_mach_arm_5TE:     return ARM_AEXT_V5TE;
+     case bfd_mach_arm_XScale:  return ARM_AEXT_V5TE;
+     case bfd_mach_arm_ep9312:  return ARM_AEXT_V4T;
+     case bfd_mach_arm_iWMMXt:  return ARM_AEXT_V5TE;
+     case bfd_mach_arm_iWMMXt2: return ARM_AEXT_V5TE;
+     default:
+       abort ();
+     }
+ }
+ 
+ 
  /* Print one ARM instruction from PC on INFO->STREAM.  */
  
  static void
*************** print_insn_arm (bfd_vma pc, struct disas
*** 2687,2692 ****
--- 2719,2727 ----
  	  && info->mach != bfd_mach_arm_iWMMXt)
  	insn = insn + IWMMXT_INSN_COUNT;
  
+       if ((insn->arch & (* (unsigned long *) info->private_data)) == 0)
+ 	continue;
+ 	
        if ((given & insn->mask) == insn->value
  	  /* Special case: an instruction with all bits set in the condition field
  	     (0xFnnn_nnnn) is only matched if all those bits are set in insn->mask,
*************** print_insn (bfd_vma pc, struct disassemb
*** 3991,3996 ****
--- 4026,4042 ----
        info->disassembler_options = NULL;
      }
  
+   if (info->private_data == NULL)
+     {
+       static unsigned long arch;
+ 
+       /* Compute the architecture bitmask from the machine number.
+ 	 Note: This assumes that the machine number will not change
+ 	 during disassembly....  */
+       arch = arm_arch_from_mach (info->mach);
+       info->private_data = & arch;
+     }
+   
    /* Decide if our code is going to be little-endian, despite what the
       function argument might say.  */
    little_code = ((info->endian_code == BFD_ENDIAN_LITTLE) || little);