Index: bfd/bfd-in2.h =================================================================== RCS file: /var/cvsroot/src-cvs/src/bfd/bfd-in2.h,v retrieving revision 1.365 diff -u -p -r1.365 bfd-in2.h --- bfd/bfd-in2.h 2 Sep 2005 13:12:33 -0000 1.365 +++ bfd/bfd-in2.h 7 Sep 2005 23:56:19 -0000 @@ -2876,7 +2876,7 @@ pc-relative or some form of GOT-indirect BFD_RELOC_ARM_T32_IMM12, BFD_RELOC_ARM_T32_ADD_PC12, BFD_RELOC_ARM_SHIFT_IMM, - BFD_RELOC_ARM_SMI, + BFD_RELOC_ARM_SMC, BFD_RELOC_ARM_SWI, BFD_RELOC_ARM_MULTI, BFD_RELOC_ARM_CP_OFF_IMM, Index: bfd/libbfd.h =================================================================== RCS file: /var/cvsroot/src-cvs/src/bfd/libbfd.h,v retrieving revision 1.156 diff -u -p -r1.156 libbfd.h --- bfd/libbfd.h 2 Sep 2005 13:12:33 -0000 1.156 +++ bfd/libbfd.h 7 Sep 2005 23:56:19 -0000 @@ -1214,7 +1214,7 @@ static const char *const bfd_reloc_code_ "BFD_RELOC_ARM_T32_IMM12", "BFD_RELOC_ARM_T32_ADD_PC12", "BFD_RELOC_ARM_SHIFT_IMM", - "BFD_RELOC_ARM_SMI", + "BFD_RELOC_ARM_SMC", "BFD_RELOC_ARM_SWI", "BFD_RELOC_ARM_MULTI", "BFD_RELOC_ARM_CP_OFF_IMM", Index: bfd/reloc.c =================================================================== RCS file: /var/cvsroot/src-cvs/src/bfd/reloc.c,v retrieving revision 1.137 diff -u -p -r1.137 reloc.c --- bfd/reloc.c 2 Sep 2005 13:12:33 -0000 1.137 +++ bfd/reloc.c 7 Sep 2005 23:56:06 -0000 @@ -2744,7 +2744,7 @@ ENUMX ENUMX BFD_RELOC_ARM_SHIFT_IMM ENUMX - BFD_RELOC_ARM_SMI + BFD_RELOC_ARM_SMC ENUMX BFD_RELOC_ARM_SWI ENUMX Index: gas/config/tc-arm.c =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/config/tc-arm.c,v retrieving revision 1.225 diff -u -p -r1.225 tc-arm.c --- gas/config/tc-arm.c 6 Sep 2005 18:43:45 -0000 1.225 +++ gas/config/tc-arm.c 7 Sep 2005 23:55:47 -0000 @@ -5095,9 +5095,9 @@ do_shift (void) } static void -do_smi (void) +do_smc (void) { - inst.reloc.type = BFD_RELOC_ARM_SMI; + inst.reloc.type = BFD_RELOC_ARM_SMC; inst.reloc.pc_rel = 0; } @@ -7430,7 +7430,7 @@ do_t_simd (void) } static void -do_t_smi (void) +do_t_smc (void) { unsigned int value = inst.reloc.exp.X_add_number; constraint (inst.reloc.exp.X_op != O_constant, @@ -8846,7 +8846,7 @@ static const struct asm_opcode insns[] = #undef ARM_VARIANT #define ARM_VARIANT ARM_EXT_V6Z - TCE(smi, 1600070, f7f08000, 1, (EXPi), smi, t_smi), + TCE(smc, 1600070, f7f08000, 1, (EXPi), smc, t_smc), #undef ARM_VARIANT #define ARM_VARIANT ARM_EXT_V6T2 @@ -11268,10 +11268,10 @@ md_apply_fix (fixS * fixP, md_number_to_chars (buf+2, (valueT) (newval & 0xffff), THUMB_SIZE); break; - case BFD_RELOC_ARM_SMI: + case BFD_RELOC_ARM_SMC: if (((unsigned long) value) > 0xffff) as_bad_where (fixP->fx_file, fixP->fx_line, - _("invalid smi expression")); + _("invalid smc expression")); newval = md_chars_to_number (buf, INSN_SIZE); newval |= (value & 0xf) | ((value & 0xfff0) << 4); md_number_to_chars (buf, newval, INSN_SIZE); @@ -11866,7 +11866,7 @@ tc_gen_reloc (asection * section ATTRIBU case BFD_RELOC_NONE: type = "NONE"; break; case BFD_RELOC_ARM_OFFSET_IMM8: type = "OFFSET_IMM8"; break; case BFD_RELOC_ARM_SHIFT_IMM: type = "SHIFT_IMM"; break; - case BFD_RELOC_ARM_SMI: type = "SMI"; break; + case BFD_RELOC_ARM_SMC: type = "SMC"; break; case BFD_RELOC_ARM_SWI: type = "SWI"; break; case BFD_RELOC_ARM_MULTI: type = "MULTI"; break; case BFD_RELOC_ARM_CP_OFF_IMM: type = "CP_OFF_IMM"; break; Index: gas/testsuite/gas/arm/arch6zk.d =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/arch6zk.d,v retrieving revision 1.3 diff -u -p -r1.3 arch6zk.d --- gas/testsuite/gas/arm/arch6zk.d 18 May 2005 05:40:09 -0000 1.3 +++ gas/testsuite/gas/arm/arch6zk.d 8 Sep 2005 00:02:47 -0000 @@ -24,8 +24,8 @@ Disassembly of section .text: 0+040 <[^>]*> e320f002 ? wfe 0+044 <[^>]*> e320f003 ? wfi 0+048 <[^>]*> e320f001 ? yield -0+04c <[^>]*> e16ec371 ? smi 60465 -0+050 <[^>]*> 11613c7e ? smine 5070 +0+04c <[^>]*> e16ec371 ? smc 60465 +0+050 <[^>]*> 11613c7e ? smcne 5070 0+054 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) 0+058 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) 0+05c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) Index: gas/testsuite/gas/arm/arch6zk.s =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/arch6zk.s,v retrieving revision 1.3 diff -u -p -r1.3 arch6zk.s --- gas/testsuite/gas/arm/arch6zk.s 18 May 2005 05:40:09 -0000 1.3 +++ gas/testsuite/gas/arm/arch6zk.s 8 Sep 2005 00:02:56 -0000 @@ -23,8 +23,8 @@ label: wfi yield # ARMV6Z instructions - smi 0xec31 - smine 0x13ce + smc 0xec31 + smcne 0x13ce # Add three nop instructions to ensure that the # output is 32-byte aligned as required for arm-aout. Index: gas/testsuite/gas/arm/thumb32.d =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/thumb32.d,v retrieving revision 1.12 diff -u -p -r1.12 thumb32.d --- gas/testsuite/gas/arm/thumb32.d 6 Sep 2005 16:59:24 -0000 1.12 +++ gas/testsuite/gas/arm/thumb32.d 8 Sep 2005 00:03:07 -0000 @@ -810,8 +810,8 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> fa60 f009 ror\.w r0, r0, r9 0[0-9a-f]+ <[^>]+> fa60 f005 ror\.w r0, r0, r5 0[0-9a-f]+ <[^>]+> fa71 f002 rors\.w r0, r1, r2 -0[0-9a-f]+ <[^>]+> f7f0 8000 smi #0 ; 0x0 -0[0-9a-f]+ <[^>]+> f7fd 8bca smi #43981 ; 0xabcd +0[0-9a-f]+ <[^>]+> f7f0 8000 smc #0 ; 0x0 +0[0-9a-f]+ <[^>]+> f7fd 8bca smc #43981 ; 0xabcd 0[0-9a-f]+ <[^>]+> fb10 0000 smlabb r0, r0, r0, r0 0[0-9a-f]+ <[^>]+> fb10 0900 smlabb r9, r0, r0, r0 0[0-9a-f]+ <[^>]+> fb19 0000 smlabb r0, r9, r0, r0 Index: gas/testsuite/gas/arm/thumb32.s =================================================================== RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/arm/thumb32.s,v retrieving revision 1.8 diff -u -p -r1.8 thumb32.s --- gas/testsuite/gas/arm/thumb32.s 6 Sep 2005 16:59:24 -0000 1.8 +++ gas/testsuite/gas/arm/thumb32.s 8 Sep 2005 00:03:15 -0000 @@ -609,9 +609,9 @@ shift: .purgem sh -smi: - smi #0 - smi #0xabcd +smc: + smc #0 + smc #0xabcd smla: smlabb r0, r0, r0, r0 Index: opcodes/arm-dis.c =================================================================== RCS file: /var/cvsroot/src-cvs/src/opcodes/arm-dis.c,v retrieving revision 1.55 diff -u -p -r1.55 arm-dis.c --- opcodes/arm-dis.c 2 Sep 2005 14:54:27 -0000 1.55 +++ opcodes/arm-dis.c 8 Sep 2005 00:03:39 -0000 @@ -440,7 +440,7 @@ static const struct opcode32 arm_opcodes {ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"}, /* ARM V6Z instructions. */ - {ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smi%c\t%e"}, + {ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smc%c\t%e"}, /* ARM V6K instructions. */ {ARM_EXT_V6K, 0xf57ff01f, 0xffffffff, "clrex"}, @@ -968,7 +968,7 @@ static const struct opcode32 thumb32_opc {ARM_EXT_V6T2, 0xfbe00000, 0xfff000f0, "umlal\t%12-15r, %8-11r, %16-19r, %0-3r"}, {ARM_EXT_V6T2, 0xfbe00060, 0xfff000f0, "umaal\t%12-15r, %8-11r, %16-19r, %0-3r"}, {ARM_EXT_V6T2, 0xe8500f00, 0xfff00f00, "ldrex\t%12-15r, [%16-19r, #%0-7W]"}, - {ARM_EXT_V6T2, 0xf7f08000, 0xfff0f000, "smi\t%K"}, + {ARM_EXT_V6T2, 0xf7f08000, 0xfff0f000, "smc\t%K"}, {ARM_EXT_V6T2, 0xf04f0000, 0xfbef8000, "mov%20's.w\t%8-11r, %M"}, {ARM_EXT_V6T2, 0xf06f0000, 0xfbef8000, "mvn%20's.w\t%8-11r, %M"}, {ARM_EXT_V6T2, 0xf810f000, 0xff70f000, "pld\t%a"},