#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS DSP ASE for MIPS32
#as:
#stderr: mips32-dsp.l

# Check MIPS DSP ASE for MIPS32 Instruction Assembly

.*: +file format .*mips.*

Disassembly of section .text:
0+0000 <[^>]*> 7c220290 	addq\.ph	zero,at,v0
0+0004 <[^>]*> 7c430b90 	addq_s\.ph	at,v0,v1
0+0008 <[^>]*> 7c641590 	addq_s\.w	v0,v1,a0
0+000c <[^>]*> 7c851810 	addu\.qb	v1,a0,a1
0+0010 <[^>]*> 7ca62110 	addu_s\.qb	a0,a1,a2
0+0014 <[^>]*> 7cc72ad0 	subq\.ph	a1,a2,a3
0+0018 <[^>]*> 7ce833d0 	subq_s\.ph	a2,a3,t0
0+001c <[^>]*> 7d093dd0 	subq_s\.w	a3,t0,t1
0+0020 <[^>]*> 7d2a4050 	subu\.qb	t0,t1,t2
0+0024 <[^>]*> 7d4b4950 	subu_s\.qb	t1,t2,t3
0+0028 <[^>]*> 7d6c5410 	addsc	t2,t3,t4
0+002c <[^>]*> 7d8d5c50 	addwc	t3,t4,t5
0+0030 <[^>]*> 7dae6490 	modsub	t4,t5,t6
0+0034 <[^>]*> 7dc06d10 	raddu\.w\.qb	t5,t6
0+0038 <[^>]*> 7c0f7212 	absq\.ph	t6,t7
0+003c <[^>]*> 7c107a52 	absq_s\.ph	t7,s0
0+0040 <[^>]*> 7c118452 	absq_s\.w	s0,s1
0+0044 <[^>]*> 7e538b11 	precrq\.qb\.ph	s1,s2,s3
0+0048 <[^>]*> 7e749511 	precrq\.ph\.w	s2,s3,s4
0+004c <[^>]*> 7e959d51 	precrq_rs\.ph\.w	s3,s4,s5
0+0050 <[^>]*> 7eb6a3d1 	precrqu_s\.qb\.ph	s4,s5,s6
0+0054 <[^>]*> 7c16ab12 	preceq\.w\.phl	s5,s6
0+0058 <[^>]*> 7c17b352 	preceq\.w\.phr	s6,s7
0+005c <[^>]*> 7c18b912 	precequ\.ph\.qbl	s7,t8
0+0060 <[^>]*> 7c19c152 	precequ\.ph\.qbr	t8,t9
0+0064 <[^>]*> 7c1ac992 	precequ\.ph\.qbla	t9,k0
0+0068 <[^>]*> 7c1bd1d2 	precequ\.ph\.qbra	k0,k1
0+006c <[^>]*> 7c1cdf12 	preceu\.ph\.qbl	k1,gp
0+0070 <[^>]*> 7c1de752 	preceu\.ph\.qbr	gp,sp
0+0074 <[^>]*> 7c1eef92 	preceu\.ph\.qbla	sp,s8
0+0078 <[^>]*> 7c1ff7d2 	preceu\.ph\.qbra	s8,ra
0+007c <[^>]*> 7ce0f813 	shll\.qb	ra,zero,0x7
0+0080 <[^>]*> 7c00f813 	shll\.qb	ra,zero,0x0
0+0084 <[^>]*> 7ce0f813 	shll\.qb	ra,zero,0x7
0+0088 <[^>]*> 7c00f813 	shll\.qb	ra,zero,0x0
0+008c <[^>]*> 7c410093 	shllv\.qb	zero,at,v0
0+0090 <[^>]*> 7de20a13 	shll\.ph	at,v0,0xf
0+0094 <[^>]*> 7c020a13 	shll\.ph	at,v0,0x0
0+0098 <[^>]*> 7de20a13 	shll\.ph	at,v0,0xf
0+009c <[^>]*> 7c020a13 	shll\.ph	at,v0,0x0
0+00a0 <[^>]*> 7c831293 	shllv\.ph	v0,v1,a0
0+00a4 <[^>]*> 7de41b13 	shll_s\.ph	v1,a0,0xf
0+00a8 <[^>]*> 7c041b13 	shll_s\.ph	v1,a0,0x0
0+00ac <[^>]*> 7de41b13 	shll_s\.ph	v1,a0,0xf
0+00b0 <[^>]*> 7c041b13 	shll_s\.ph	v1,a0,0x0
0+00b4 <[^>]*> 7cc52393 	shllv_s\.ph	a0,a1,a2
0+00b8 <[^>]*> 7fe62d13 	shll_s\.w	a1,a2,0x1f
0+00bc <[^>]*> 7c062d13 	shll_s\.w	a1,a2,0x0
0+00c0 <[^>]*> 7fe62d13 	shll_s\.w	a1,a2,0x1f
0+00c4 <[^>]*> 7c062d13 	shll_s\.w	a1,a2,0x0
0+00c8 <[^>]*> 7d073593 	shllv_s\.w	a2,a3,t0
0+00cc <[^>]*> 7ce83853 	shrl\.qb	a3,t0,0x7
0+00d0 <[^>]*> 7c083853 	shrl\.qb	a3,t0,0x0
0+00d4 <[^>]*> 7ce83853 	shrl\.qb	a3,t0,0x7
0+00d8 <[^>]*> 7c083853 	shrl\.qb	a3,t0,0x0
0+00dc <[^>]*> 7d4940d3 	shrlv\.qb	t0,t1,t2
0+00e0 <[^>]*> 7dea4a53 	shra\.ph	t1,t2,0xf
0+00e4 <[^>]*> 7c0a4a53 	shra\.ph	t1,t2,0x0
0+00e8 <[^>]*> 7dea4a53 	shra\.ph	t1,t2,0xf
0+00ec <[^>]*> 7c0a4a53 	shra\.ph	t1,t2,0x0
0+00f0 <[^>]*> 7d8b52d3 	shrav\.ph	t2,t3,t4
0+00f4 <[^>]*> 7dec5b53 	shra_r\.ph	t3,t4,0xf
0+00f8 <[^>]*> 7c0c5b53 	shra_r\.ph	t3,t4,0x0
0+00fc <[^>]*> 7dec5b53 	shra_r\.ph	t3,t4,0xf
0+0100 <[^>]*> 7c0c5b53 	shra_r\.ph	t3,t4,0x0
0+0104 <[^>]*> 7dcd63d3 	shrav_r\.ph	t4,t5,t6
0+0108 <[^>]*> 7fee6d53 	shra_r\.w	t5,t6,0x1f
0+010c <[^>]*> 7c0e6d53 	shra_r\.w	t5,t6,0x0
0+0110 <[^>]*> 7fee6d53 	shra_r\.w	t5,t6,0x1f
0+0114 <[^>]*> 7c0e6d53 	shra_r\.w	t5,t6,0x0
0+0118 <[^>]*> 7e0f75d3 	shrav_r\.w	t6,t7,s0
0+011c <[^>]*> 7e117990 	muleu_s\.ph\.qbl	t7,s0,s1
0+0120 <[^>]*> 7e3281d0 	muleu_s\.ph\.qbr	s0,s1,s2
0+0124 <[^>]*> 7e538fd0 	mulq_rs\.ph	s1,s2,s3
0+0128 <[^>]*> 7e749710 	muleq_s\.w\.phl	s2,s3,s4
0+012c <[^>]*> 7e959f50 	muleq_s\.w\.phr	s3,s4,s5
0+0130 <[^>]*> 7e9500f0 	dpau\.h\.qbl	\$ac0,s4,s5
0+0134 <[^>]*> 7eb609f0 	dpau\.h\.qbr	\$ac1,s5,s6
0+0138 <[^>]*> 7ed712f0 	dpsu\.h\.qbl	\$ac2,s6,s7
0+013c <[^>]*> 7ef81bf0 	dpsu\.h\.qbr	\$ac3,s7,t8
0+0140 <[^>]*> 7f190130 	dpaq_s\.w\.ph	\$ac0,t8,t9
0+0144 <[^>]*> 7f3a0970 	dpsq_s\.w\.ph	\$ac1,t9,k0
0+0148 <[^>]*> 7f5b11b0 	mulsaq_s\.w\.ph	\$ac2,k0,k1
0+014c <[^>]*> 7f7c1b30 	dpaq_sa\.l\.w	\$ac3,k1,gp
0+0150 <[^>]*> 7f9d0370 	dpsq_sa\.l\.w	\$ac0,gp,sp
0+0154 <[^>]*> 7fbe0d30 	maq_s\.w\.phl	\$ac1,sp,s8
0+0158 <[^>]*> 7fdf15b0 	maq_s\.w\.phr	\$ac2,s8,ra
0+015c <[^>]*> 7fe01c30 	maq_sa\.w\.phl	\$ac3,ra,zero
0+0160 <[^>]*> 7c0104b0 	maq_sa\.w\.phr	\$ac0,zero,at
0+0164 <[^>]*> 7c020ed2 	bitrev	at,v0
0+0168 <[^>]*> 7c62000c 	insv	v0,v1
0+016c <[^>]*> 7cff1892 	repl\.qb	v1,0xff
0+0170 <[^>]*> 7c001892 	repl\.qb	v1,0x0
0+0174 <[^>]*> 7cff1892 	repl\.qb	v1,0xff
0+0178 <[^>]*> 7c001892 	repl\.qb	v1,0x0
0+017c <[^>]*> 7c0520d2 	replv\.qb	a0,a1
0+0180 <[^>]*> 7fff2a92 	repl\.ph	a1,0x3ff
0+0184 <[^>]*> 7c002a92 	repl\.ph	a1,0x0
0+0188 <[^>]*> 7fff2a92 	repl\.ph	a1,0x3ff
0+018c <[^>]*> 7c002a92 	repl\.ph	a1,0x0
0+0190 <[^>]*> 7c0732d2 	replv\.ph	a2,a3
0+0194 <[^>]*> 7ce80011 	cmpu\.eq\.qb	a3,t0
0+0198 <[^>]*> 7d090051 	cmpu\.lt\.qb	t0,t1
0+019c <[^>]*> 7d2a0091 	cmpu\.le\.qb	t1,t2
0+01a0 <[^>]*> 7d6c5111 	cmpgu\.eq\.qb	t2,t3,t4
0+01a4 <[^>]*> 7d8d5951 	cmpgu\.lt\.qb	t3,t4,t5
0+01a8 <[^>]*> 7dae6191 	cmpgu\.le\.qb	t4,t5,t6
0+01ac <[^>]*> 7dae0211 	cmp\.eq\.ph	t5,t6
0+01b0 <[^>]*> 7dcf0251 	cmp\.lt\.ph	t6,t7
0+01b4 <[^>]*> 7df00291 	cmp\.le\.ph	t7,s0
0+01b8 <[^>]*> 7e3280d1 	pick\.qb	s0,s1,s2
0+01bc <[^>]*> 7e538ad1 	pick\.ph	s1,s2,s3
0+01c0 <[^>]*> 7e749391 	packrl\.ph	s2,s3,s4
0+01c4 <[^>]*> 7ff30838 	extr\.w	s3,\$ac1,0x1f
0+01c8 <[^>]*> 7c130838 	extr\.w	s3,\$ac1,0x0
0+01cc <[^>]*> 7ff30838 	extr\.w	s3,\$ac1,0x1f
0+01d0 <[^>]*> 7c130838 	extr\.w	s3,\$ac1,0x0
0+01d4 <[^>]*> 7ff41138 	extr_r\.w	s4,\$ac2,0x1f
0+01d8 <[^>]*> 7c141138 	extr_r\.w	s4,\$ac2,0x0
0+01dc <[^>]*> 7ff41138 	extr_r\.w	s4,\$ac2,0x1f
0+01e0 <[^>]*> 7c141138 	extr_r\.w	s4,\$ac2,0x0
0+01e4 <[^>]*> 7ff519b8 	extr_rs\.w	s5,\$ac3,0x1f
0+01e8 <[^>]*> 7c1519b8 	extr_rs\.w	s5,\$ac3,0x0
0+01ec <[^>]*> 7ff519b8 	extr_rs\.w	s5,\$ac3,0x1f
0+01f0 <[^>]*> 7c1519b8 	extr_rs\.w	s5,\$ac3,0x0
0+01f4 <[^>]*> 7ff603b8 	extr_s\.h	s6,\$ac0,0x1f
0+01f8 <[^>]*> 7c1603b8 	extr_s\.h	s6,\$ac0,0x0
0+01fc <[^>]*> 7ff603b8 	extr_s\.h	s6,\$ac0,0x1f
0+0200 <[^>]*> 7c1603b8 	extr_s\.h	s6,\$ac0,0x0
0+0204 <[^>]*> 7f170bf8 	extrv_s\.h	s7,\$ac1,t8
0+0208 <[^>]*> 7f381078 	extrv\.w	t8,\$ac2,t9
0+020c <[^>]*> 7f591978 	extrv_r\.w	t9,\$ac3,k0
0+0210 <[^>]*> 7f7a01f8 	extrv_rs\.w	k0,\$ac0,k1
0+0214 <[^>]*> 7ffb0a38 	extl\.w	k1,\$ac1,0x1f
0+0218 <[^>]*> 7c1b0a38 	extl\.w	k1,\$ac1,0x0
0+021c <[^>]*> 7ffb0a38 	extl\.w	k1,\$ac1,0x1f
0+0220 <[^>]*> 7c1b0a38 	extl\.w	k1,\$ac1,0x0
0+0224 <[^>]*> 7ffc1338 	extl_s\.w	gp,\$ac2,0x1f
0+0228 <[^>]*> 7c1c1338 	extl_s\.w	gp,\$ac2,0x0
0+022c <[^>]*> 7ffc1338 	extl_s\.w	gp,\$ac2,0x1f
0+0230 <[^>]*> 7c1c1338 	extl_s\.w	gp,\$ac2,0x0
0+0234 <[^>]*> 7fdd1a78 	extlv\.w	sp,\$ac3,s8
0+0238 <[^>]*> 7ffe0378 	extlv_s\.w	s8,\$ac0,ra
0+023c <[^>]*> 7fdf08b8 	extp	ra,\$ac1,0x1f
0+0240 <[^>]*> 7fff08b8 	extp	ra,\$ac1,0x20
0+0244 <[^>]*> 7fdf08b8 	extp	ra,\$ac1,0x1f
0+0248 <[^>]*> 7fff08b8 	extp	ra,\$ac1,0x20
0+024c <[^>]*> 7c2010f8 	extpv	zero,\$ac2,at
0+0250 <[^>]*> 7fc11ab8 	extpdp	at,\$ac3,0x1f
0+0254 <[^>]*> 7fe11ab8 	extpdp	at,\$ac3,0x20
0+0258 <[^>]*> 7fc11ab8 	extpdp	at,\$ac3,0x1f
0+025c <[^>]*> 7fe11ab8 	extpdp	at,\$ac3,0x20
0+0260 <[^>]*> 7c6202f8 	extpdpv	v0,\$ac0,v1
0+0264 <[^>]*> 7df00eb8 	shilo	\$ac1,31
0+0268 <[^>]*> 7e000eb8 	shilo	\$ac1,-32
0+026c <[^>]*> 7df00eb8 	shilo	\$ac1,31
0+0270 <[^>]*> 7e000eb8 	shilo	\$ac1,-32
0+0274 <[^>]*> 7c6016f8 	shilov	\$ac2,v1
0+0278 <[^>]*> 7c801ff8 	mthlip	a0,\$ac3
0+027c <[^>]*> 00002810 	mfhi	a1
0+0280 <[^>]*> 00203012 	mflo	a2,\$ac1
0+0284 <[^>]*> 00e01011 	mthi	a3,\$ac2
0+0288 <[^>]*> 01001813 	mtlo	t0,\$ac3
0+028c <[^>]*> 7d3ffcf8 	wrdsp	t1
0+0290 <[^>]*> 7d41fcf8 	wrdsp	t2,0x3f
0+0294 <[^>]*> 7d4004f8 	wrdsp	t2,0x0
0+0298 <[^>]*> 7d41fcf8 	wrdsp	t2,0x3f
0+029c <[^>]*> 7d4004f8 	wrdsp	t2,0x0
0+02a0 <[^>]*> 7fff5cb8 	rddsp	t3
0+02a4 <[^>]*> 7c3f64b8 	rddsp	t4,0x3f
0+02a8 <[^>]*> 7c0064b8 	rddsp	t4,0x0
0+02ac <[^>]*> 7c3f64b8 	rddsp	t4,0x3f
0+02b0 <[^>]*> 7c0064b8 	rddsp	t4,0x0
0+02b4 <[^>]*> 7dee698a 	lbux	t5,t6\(t7\)
0+02b8 <[^>]*> 7e0f710a 	lhx	t6,t7\(s0\)
0+02bc <[^>]*> 7e30780a 	lwx	t7,s0\(s1\)
0+02c0 <[^>]*> 041cff4f 	bposge32	0+0000 <text_label>
0+02c4 <[^>]*> 00000000 	nop
	...