opcodes:
	* arm-dis.c (thumb_opcodes): Change "cpy" to "mov", "neg" to "rsbs #0".
	Delete comment about semantics of empty string, no longer true.
	Disassemble all instructions that update the PSR flags with an S
	suffix. Delete special case for add[s] lo, lo, #0 ("mov").
	Consolidate conditional branch patterns using %T.  Delete
	duplicate ldr/str/ldrb/strb entries.  Delete all entries for the
	E800..FFFF range, now handled via thumb32_opcodes, and add
	explanatory comment in their place.
	(arm_conditional): 0xF is no longer a defined conditional code.
	(thumb32_opcodes, print_insn_thumb32): New.
	(print_insn_thumb): Rename print_insn_thumb16.  Remove special
	processing for BL/BLX(1).
	(print_insn): Rearrange bi-endian logic for clarity.  Distinguish
	16- and 32-bit Thumb instructions here.  Leave bytes_per_chunk at
	2 for 32-bit Thumb.

ld/testsuite:
	* ld-arm/mixed-app.d: Adjust expected output.
gas/testsuite:
	* gas/arm/tcompat.d, gas/arm/thumbv6.d: Adjust expected output.