Index: bfd/ChangeLog from Alexandre Oliva * elfxx-mips.c (mips_elf_calculate_relocation): Decay GOT_PAGE/GOT_OFST referencing overridable symbol to GOT_DISP/addend. (_bfd_mips_elf_check_relocs): Handle GOT_PAGE referencing global symbol as GOT_DISP. Index: bfd/elfxx-mips.c =================================================================== RCS file: /cvs/uberbaum/bfd/elfxx-mips.c,v retrieving revision 1.48 diff -u -p -r1.48 elfxx-mips.c --- bfd/elfxx-mips.c 1 Apr 2003 23:44:45 -0000 1.48 +++ bfd/elfxx-mips.c 8 Apr 2003 10:02:10 -0000 @@ -3196,6 +3196,13 @@ mips_elf_calculate_relocation (abfd, inp and we're going to need it, get it now. */ switch (r_type) { + case R_MIPS_GOT_PAGE: + /* If we didn't create a dynamic index for this symbol, it can + be regarded as local. */ + if (local_p || ! h || h->root.dynindx < 0) + break; + /* Fall through. */ + case R_MIPS_CALL16: case R_MIPS_GOT16: case R_MIPS_GOT_DISP: @@ -3206,7 +3213,11 @@ mips_elf_calculate_relocation (abfd, inp /* Find the index into the GOT where this value is located. */ if (!local_p) { - BFD_ASSERT (addend == 0); + /* GOT_PAGE may take a non-zero addend, that is ignored in a + GOT_PAGE relocation that decays to GOT_DISP because the + symbol turns out to be global. The addend is then added + as GOT_OFST. */ + BFD_ASSERT (addend == 0 || r_type == R_MIPS_GOT_PAGE); g = mips_elf_global_got_index (elf_hash_table (info)->dynobj, input_bfd, (struct elf_link_hash_entry *) h); @@ -3220,7 +3231,7 @@ mips_elf_calculate_relocation (abfd, inp We must initialize this entry in the GOT. */ bfd *tmpbfd = elf_hash_table (info)->dynobj; asection *sgot = mips_elf_got_section (tmpbfd, FALSE); - MIPS_ELF_PUT_WORD (tmpbfd, symbol + addend, sgot->contents + g); + MIPS_ELF_PUT_WORD (tmpbfd, symbol, sgot->contents + g); } } else if (r_type == R_MIPS_GOT16 || r_type == R_MIPS_CALL16) @@ -3439,6 +3450,7 @@ mips_elf_calculate_relocation (abfd, inp /* Fall through. */ case R_MIPS_GOT_DISP: + got_disp: value = g; overflowed_p = mips_elf_overflow_p (value, 16); break; @@ -3470,6 +3482,11 @@ mips_elf_calculate_relocation (abfd, inp break; case R_MIPS_GOT_PAGE: + /* GOT_PAGE relocations that reference non-local symbols decay + to GOT_DISP. The corresponding GOT_OFST relocation decays to + 0. */ + if (! (local_p || ! h || h->root.dynindx < 0)) + goto got_disp; value = mips_elf_got_page (abfd, input_bfd, info, symbol + addend, NULL); if (value == MINUS_ONE) return bfd_reloc_outofrange; @@ -3479,7 +3496,10 @@ mips_elf_calculate_relocation (abfd, inp break; case R_MIPS_GOT_OFST: - mips_elf_got_page (abfd, input_bfd, info, symbol + addend, &value); + if (local_p || ! h || h->root.dynindx < 0) + mips_elf_got_page (abfd, input_bfd, info, symbol + addend, &value); + else + value = addend; overflowed_p = mips_elf_overflow_p (value, 16); break; @@ -5311,6 +5331,31 @@ _bfd_mips_elf_check_relocs (abfd, info, h->type = STT_FUNC; } break; + + case R_MIPS_GOT_PAGE: + /* If this is a global, overridable symbol, GOT_PAGE will + decay to GOT_DISP, so we'll need a GOT entry for it. */ + if (h == NULL) + break; + else + { + struct mips_elf_link_hash_entry *hmips = + (struct mips_elf_link_hash_entry *) h; + + while (hmips->root.root.type == bfd_link_hash_indirect + || hmips->root.root.type == bfd_link_hash_warning) + hmips = (struct mips_elf_link_hash_entry *) + hmips->root.root.u.i.link; + + if ((hmips->root.root.type == bfd_link_hash_defined + || hmips->root.root.type == bfd_link_hash_defweak) + && hmips->root.root.u.def.section + && ! (info->shared && ! info->symbolic + && ! (hmips->root.elf_link_hash_flags + & ELF_LINK_FORCED_LOCAL))) + break; + } + /* Fall through. */ case R_MIPS_GOT16: case R_MIPS_GOT_HI16: Index: gas/ChangeLog from Alexandre Oliva * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): New. * config/tc-mips.c: Use signed add for n32 address arithmetic. (append_insn): When filling delay slots with instructions that have fixups that tc_gen_reloc might consider modifyable in variant frags, start a new frag. (load_address): Generate GOT_DISP with of without offset depending on whether symbol is local. For -xgot, use GOT_PAGE/GOT_OFST or GOT_HI16/GOT_LO16. (macro) : Likewise. : In NewABI, use CALL16 or GOT_DISP for small got, CALL_HI16/CALL_LO16 or GOT_PAGE/GOT_OFST for big got. : In NewABI with small got, always use GOT_PAGE/GOT_OFST, with the latter in the load/store instruction. With big got, use GOT_HI16/GOT_LO16 or GOT_PAGE/GOT_OFST. (tc_gen_reloc): Adjust variant frags with GOT_DISP in NewABI. Add tc_frag_data.tc_fr_offset to addends. Decay CALL16, GOT_OFST and GOT_DISP to GOT_DISP in NewABI. (md_convert_frag): Use memmove for safe copying of overlapping regions. Index: gas/testsuite/ChangeLog from Alexandre Oliva * gas/mips/elf-rel-got-n32.d, gas/mips/elf-rel-got-n32.s, gas/mips/elf-rel-got-n64.d, gas/mips/elf-rel-got-n64.s, gas/mips/elf-rel-xgot-n32.d, gas/mips/elf-rel-xgot-n64.d: New. * gas/mips/mips.exp: Test them. Index: ld/testsuite/ChangeLog from Alexandre Oliva * ld-mips-elf/elf-rel-got-n32.d, ld-mips-elf/elf-rel-got-n64.d, ld-mips-elf/elf-rel-xgot-n32.d, ld-mips-elf/elf-rel-xgot-n64.d: New. * ld-mips-elf/mips-elf.exp (hasn32): Define as condition for new tests to run. Index: gas/config/tc-mips.c =================================================================== RCS file: /cvs/uberbaum/gas/config/tc-mips.c,v retrieving revision 1.200 diff -u -p -r1.200 tc-mips.c --- gas/config/tc-mips.c 6 Apr 2003 03:16:20 -0000 1.200 +++ gas/config/tc-mips.c 8 Apr 2003 10:02:27 -0000 @@ -1631,6 +1631,7 @@ append_insn (place, ip, address_expr, re char *f; fixS *fixp[3]; int nops = 0; + bfd_boolean force_new_frag = FALSE; /* Mark instruction labels in mips16 mode. */ mips16_mark_labels (); @@ -2606,6 +2607,18 @@ append_insn (place, ip, address_expr, re prev_insn_fixp[2]->fx_frag = frag_now; prev_insn_fixp[2]->fx_where = f - frag_now->fr_literal; } + if (prev_insn_fixp[0] && HAVE_NEWABI + && prev_insn_frag != frag_now + && (prev_insn_fixp[0]->fx_r_type + == BFD_RELOC_MIPS_GOT_DISP + || (prev_insn_fixp[0]->fx_r_type + == BFD_RELOC_MIPS_CALL16))) + { + /* To avoid confusion in tc_gen_reloc, we must + ensure that this does not become a variant + frag. */ + force_new_frag = TRUE; + } if (fixp[0]) { fixp[0]->fx_frag = prev_insn_frag; @@ -2747,6 +2760,15 @@ append_insn (place, ip, address_expr, re /* We just output an insn, so the next one doesn't have a label. */ mips_clear_insn_labels (); + + /* We must ensure that the frag to which an instruction that was + moved from a non-variant frag doesn't become a variant frag, + otherwise tc_gen_reloc may get confused. */ + if (force_new_frag) + { + frag_wane (frag_now); + frag_new (0); + } } /* This function forgets that there was any previous instruction or @@ -3395,7 +3417,8 @@ macro_build_ldst_constoffset (place, cou if (place != NULL) place += 4; macro_build (place, counter, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, AT, breg); if (place != NULL) place += 4; @@ -3883,7 +3906,8 @@ load_address (counter, reg, ep, used_at) { frag_grow (20); macro_build ((char *) NULL, counter, ep, - HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", "t,r,j", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "addi" : "addiu" : "daddiu", "t,r,j", reg, mips_gp_register, (int) BFD_RELOC_GPREL16); p = frag_var (rs_machine_dependent, 8, 0, RELAX_ENCODE (4, 8, 0, 4, 0, @@ -3894,7 +3918,8 @@ load_address (counter, reg, ep, used_at) if (p != NULL) p += 4; macro_build (p, counter, ep, - HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "addi" : "addiu" : "daddiu", "t,r,j", reg, reg, (int) BFD_RELOC_LO16); } } @@ -3908,20 +3933,54 @@ load_address (counter, reg, ep, used_at) lw $reg,($gp) (BFD_RELOC_MIPS_GOT16) nop addiu $reg,$reg, (BFD_RELOC_LO16) + If there is a constant, it must be added in after. + If we have NewABI, we want - lw $reg,($gp) (BFD_RELOC_MIPS_GOT_DISP) - If there is a constant, it must be added in after. */ - ex.X_add_number = ep->X_add_number; - ep->X_add_number = 0; - frag_grow (20); + lw $reg,($gp) (BFD_RELOC_MIPS_GOT_DISP) + unless we're referencing a global symbol with a non-zero + offset, in which case cst must be added separately. */ if (HAVE_NEWABI) { - macro_build ((char *) NULL, counter, ep, + frag_grow (12); + + if (ep->X_add_number) + { + frag_now->tc_frag_data.tc_fr_offset = + ex.X_add_number = ep->X_add_number; + ep->X_add_number = 0; + macro_build ((char *) NULL, counter, ep, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", reg, + (int) BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); + if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) + as_bad (_("PIC code offset overflow (max 16 signed bits)")); + ex.X_op = O_constant; + macro_build ((char *) NULL, counter, &ex, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", reg, reg, (int) BFD_RELOC_LO16); + p = frag_var (rs_machine_dependent, 8, 0, + RELAX_ENCODE (8, 4, 0, 0, 0, + mips_opts.warn_about_macros), + ep->X_add_symbol, 0, (char *) NULL); + ep->X_add_number = ex.X_add_number; + } + + macro_build (p, counter, ep, HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); + + if (! p) + { + /* To avoid confusion in tc_gen_reloc, we must ensure + that this does not become a variant frag. */ + frag_wane (frag_now); + frag_new (0); + } } else { + ex.X_add_number = ep->X_add_number; + ep->X_add_number = 0; + frag_grow (20); macro_build ((char *) NULL, counter, ep, HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT16, mips_gp_register); @@ -3932,16 +3991,16 @@ load_address (counter, reg, ep, used_at) macro_build (p, counter, ep, HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", "t,r,j", reg, reg, (int) BFD_RELOC_LO16); - } - if (ex.X_add_number != 0) - { - if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) - as_bad (_("PIC code offset overflow (max 16 signed bits)")); - ex.X_op = O_constant; - macro_build ((char *) NULL, counter, &ex, - HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", - "t,r,j", reg, reg, (int) BFD_RELOC_LO16); + if (ex.X_add_number != 0) + { + if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) + as_bad (_("PIC code offset overflow (max 16 signed bits)")); + ex.X_op = O_constant; + macro_build ((char *) NULL, counter, &ex, + HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", + "t,r,j", reg, reg, (int) BFD_RELOC_LO16); + } } } else if (mips_pic == SVR4_PIC) @@ -3954,27 +4013,58 @@ load_address (counter, reg, ep, used_at) lui $reg, (BFD_RELOC_MIPS_GOT_HI16) addu $reg,$reg,$gp lw $reg,($reg) (BFD_RELOC_MIPS_GOT_LO16) - Otherwise, for a reference to a local symbol, we want + + Otherwise, for a reference to a local symbol in old ABI, we want lw $reg,($gp) (BFD_RELOC_MIPS_GOT16) nop addiu $reg,$reg, (BFD_RELOC_LO16) - If we have NewABI, we want + If there is a constant, it must be added in after. + + In the NewABI, for local symbols, with or without offsets, we want: lw $reg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) addiu $reg,$reg, (BFD_RELOC_MIPS_GOT_OFST) - If there is a constant, it must be added in after. */ - ex.X_add_number = ep->X_add_number; - ep->X_add_number = 0; + */ if (HAVE_NEWABI) { + frag_grow (24); + + frag_now->tc_frag_data.tc_fr_offset = + ex.X_add_number = ep->X_add_number; + ep->X_add_number = 0; + macro_build ((char *) NULL, counter, ep, "lui", "t,u", reg, + (int) BFD_RELOC_MIPS_GOT_HI16); + macro_build ((char *) NULL, counter, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", "d,v,t", reg, + reg, mips_gp_register); macro_build ((char *) NULL, counter, ep, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT_LO16, reg); + if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) + as_bad (_("PIC code offset overflow (max 16 signed bits)")); + else if (ex.X_add_number) + { + ex.X_op = O_constant; + macro_build ((char *) NULL, counter, &ex, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", reg, reg, (int) BFD_RELOC_LO16); + } + + ep->X_add_number = ex.X_add_number; + p = frag_var (rs_machine_dependent, 8, 0, + RELAX_ENCODE (ex.X_add_number ? 16 : 12, 8, 0, 4, 0, + mips_opts.warn_about_macros), + ep->X_add_symbol, 0, (char *) NULL); + macro_build (p, counter, ep, HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); - macro_build (p, counter, ep, - HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", "t,r,j", + macro_build (p + 4, counter, ep, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", "t,r,j", reg, reg, (int) BFD_RELOC_MIPS_GOT_OFST); } else { + ex.X_add_number = ep->X_add_number; + ep->X_add_number = 0; if (reg_needs_delay (mips_gp_register)) off = 4; else @@ -4010,16 +4100,16 @@ load_address (counter, reg, ep, used_at) macro_build (p, counter, ep, HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", "t,r,j", reg, reg, (int) BFD_RELOC_LO16); - } - if (ex.X_add_number != 0) - { - if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) - as_bad (_("PIC code offset overflow (max 16 signed bits)")); - ex.X_op = O_constant; - macro_build ((char *) NULL, counter, &ex, - HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", - "t,r,j", reg, reg, (int) BFD_RELOC_LO16); + if (ex.X_add_number != 0) + { + if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) + as_bad (_("PIC code offset overflow (max 16 signed bits)")); + ex.X_op = O_constant; + macro_build ((char *) NULL, counter, &ex, + HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", + "t,r,j", reg, reg, (int) BFD_RELOC_LO16); + } } } else if (mips_pic == EMBEDDED_PIC) @@ -4800,7 +4890,8 @@ macro (ip) && offset_expr.X_add_number < 0x8000) { macro_build ((char *) NULL, &icnt, &offset_expr, - (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu", + (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : + HAVE_NEWABI ? "addi" : "addiu", "t,r,j", treg, sreg, (int) BFD_RELOC_LO16); return; } @@ -4943,7 +5034,8 @@ macro (ip) && ! nopic_need_relax (offset_expr.X_add_symbol, 1)) { frag_grow (20); - macro_build ((char *) NULL, &icnt, &offset_expr, "addiu", + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_NEWABI ? "addi" : "addiu", "t,r,j", tempreg, mips_gp_register, (int) BFD_RELOC_GPREL16); p = frag_var (rs_machine_dependent, 8, 0, @@ -4954,11 +5046,12 @@ macro (ip) macro_build_lui (p, &icnt, &offset_expr, tempreg); if (p != NULL) p += 4; - macro_build (p, &icnt, &offset_expr, "addiu", + macro_build (p, &icnt, &offset_expr, + HAVE_NEWABI ? "addi" : "addiu", "t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16); } } - else if (mips_pic == SVR4_PIC && ! mips_big_got) + else if (mips_pic == SVR4_PIC && ! mips_big_got && ! HAVE_NEWABI) { int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT16; @@ -4990,22 +5083,13 @@ macro (ip) For a local symbol, we want the same instruction sequence, but we output a BFD_RELOC_LO16 reloc on the addiu instruction. - - For NewABI, we want for local or external data addresses - lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_DISP) - For a local function symbol, we want - lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) - nop - addiu $tempreg,$tempreg, (BFD_RELOC_MIPS_GOT_OFST) */ expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; frag_grow (32); - if (expr1.X_add_number == 0 && tempreg == PIC_CALL_REG) + if (offset_expr.X_add_number == 0 && tempreg == PIC_CALL_REG) lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16; - else if (HAVE_NEWABI) - lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_DISP; macro_build ((char *) NULL, &icnt, &offset_expr, HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", tempreg, lw_reloc_type, mips_gp_register); @@ -5099,7 +5183,137 @@ macro (ip) used_at = 1; } } - else if (mips_pic == SVR4_PIC) + else if (mips_pic == SVR4_PIC && ! mips_big_got && HAVE_NEWABI) + { + char *p = NULL; + int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_DISP; + int adj = 0; + + /* If this is a reference to an external, and there is no + constant, or local symbol (*), with or without a + constant, we want + lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_DISP) + or if tempreg is PIC_CALL_REG + lw $tempreg,($gp) (BFD_RELOC_MIPS_CALL16) + + If we have a small constant, and this is a reference to + an external symbol, we want + lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_DISP) + addiu $tempreg,$tempreg, + + If we have a large constant, and this is a reference to + an external symbol, we want + lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_DISP) + lui $at, + addiu $at,$at, + addu $tempreg,$tempreg,$at + + (*) Other assemblers seem to prefer GOT_PAGE/GOT_OFST for + local symbols, even though it introduces an additional + instruction. */ + + frag_grow (28); + if (offset_expr.X_add_number == 0 && tempreg == PIC_CALL_REG) + lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16; + if (offset_expr.X_add_number) + { + frag_now->tc_frag_data.tc_fr_offset = + expr1.X_add_number = offset_expr.X_add_number; + offset_expr.X_add_number = 0; + + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, lw_reloc_type, + mips_gp_register); + + if (expr1.X_add_number >= -0x8000 + && expr1.X_add_number < 0x8000) + { + macro_build ((char *) NULL, &icnt, &expr1, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", tempreg, tempreg, + (int) BFD_RELOC_LO16); + p = frag_var (rs_machine_dependent, 4, 0, + RELAX_ENCODE (8, 4, 0, 0, 0, 0), + offset_expr.X_add_symbol, 0, NULL); + } + else if (IS_SEXT_32BIT_NUM (expr1.X_add_number)) + { + int dreg; + + /* If we are going to add in a base register, and the + target register and the base register are the same, + then we are using AT as a temporary register. Since + we want to load the constant into AT, we add our + current AT (from the global offset table) and the + register into the register now, and pretend we were + not using a base register. */ + if (breg != treg) + dreg = tempreg; + else + { + assert (tempreg == AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", treg, AT, breg); + dreg = treg; + adj = 4; + } + + macro_build_lui ((char *) NULL, &icnt, &expr1, AT); + macro_build ((char *) NULL, &icnt, &expr1, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", AT, AT, (int) BFD_RELOC_LO16); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", dreg, dreg, AT); + + p = frag_var (rs_machine_dependent, 4 + adj, 0, + RELAX_ENCODE (16 + adj, 4 + adj, + 0, 0, 0, 0), + offset_expr.X_add_symbol, 0, NULL); + + used_at = 1; + } + else + as_bad (_("PIC code offset overflow (max 32 signed bits)")); + + offset_expr.X_add_number = expr1.X_add_number; + + macro_build (p, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT_DISP, + mips_gp_register); + if (adj) + { + macro_build (p + 4, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", treg, tempreg, breg); + breg = 0; + tempreg = treg; + } + } + else + { + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, lw_reloc_type, + mips_gp_register); + if (lw_reloc_type != BFD_RELOC_MIPS_GOT_DISP) + p = frag_var (rs_machine_dependent, 0, 0, + RELAX_ENCODE (0, 0, -4, 0, 0, 0), + offset_expr.X_add_symbol, 0, NULL); + } + + if (! p) + { + /* To avoid confusion in tc_gen_reloc, we must ensure + that this does not become a variant frag. */ + frag_wane (frag_now); + frag_new (0); + } + } + else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI) { int gpdel; char *p; @@ -5146,10 +5360,7 @@ macro (ip) lui $at, addiu $at,$at, (BFD_RELOC_LO16) addu $tempreg,$tempreg,$at - - For NewABI, we want for local data addresses - lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_DISP) - */ + */ expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; @@ -5267,25 +5478,18 @@ macro (ip) if (gpdel > 0) { /* This is needed because this instruction uses $gp, but - the first instruction on the main stream does not. */ + the first instruction on the main stream does not. */ macro_build (p, &icnt, (expressionS *) NULL, "nop", ""); p += 4; } - if (HAVE_NEWABI) - local_reloc_type = (int) BFD_RELOC_MIPS_GOT_DISP; macro_build (p, &icnt, &offset_expr, HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", tempreg, local_reloc_type, mips_gp_register); p += 4; - if (expr1.X_add_number == 0 && HAVE_NEWABI) - { - /* BFD_RELOC_MIPS_GOT_DISP is sufficient for newabi */ - } - else - if (expr1.X_add_number >= -0x8000 + if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { macro_build (p, &icnt, (expressionS *) NULL, "nop", ""); @@ -5294,17 +5498,17 @@ macro (ip) HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", "t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16); /* FIXME: If add_number is 0, and there was no base - register, the external symbol case ended with a load, - so if the symbol turns out to not be external, and - the next instruction uses tempreg, an unnecessary nop - will be inserted. */ + register, the external symbol case ended with a load, + so if the symbol turns out to not be external, and + the next instruction uses tempreg, an unnecessary nop + will be inserted. */ } else { if (breg == treg) { /* We must add in the base register now, as in the - external symbol case. */ + external symbol case. */ assert (tempreg == AT); macro_build (p, &icnt, (expressionS *) NULL, "nop", ""); p += 4; @@ -5314,7 +5518,7 @@ macro (ip) p += 4; tempreg = treg; /* We set breg to 0 because we have arranged to add - it in in both cases. */ + it in in both cases. */ breg = 0; } @@ -5330,6 +5534,146 @@ macro (ip) p += 4; } } + else if (mips_pic == SVR4_PIC && HAVE_NEWABI) + { + char *p = NULL; + int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16; + int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_LO16; + int adj = 0; + + /* This is the large GOT case. If this is a reference to an + external symbol, and there is no constant, we want + lui $tempreg, (BFD_RELOC_MIPS_GOT_HI16) + add $tempreg,$tempreg,$gp + lw $tempreg,($tempreg) (BFD_RELOC_MIPS_GOT_LO16) + or if tempreg is PIC_CALL_REG + lui $tempreg, (BFD_RELOC_MIPS_CALL_HI16) + add $tempreg,$tempreg,$gp + lw $tempreg,($tempreg) (BFD_RELOC_MIPS_CALL_LO16) + + If we have a small constant, and this is a reference to + an external symbol, we want + lui $tempreg, (BFD_RELOC_MIPS_GOT_HI16) + add $tempreg,$tempreg,$gp + lw $tempreg,($tempreg) (BFD_RELOC_MIPS_GOT_LO16) + addi $tempreg,$tempreg, + + If we have a large constant, and this is a reference to + an external symbol, we want + lui $tempreg, (BFD_RELOC_MIPS_GOT_HI16) + addu $tempreg,$tempreg,$gp + lw $tempreg,($tempreg) (BFD_RELOC_MIPS_GOT_LO16) + lui $at, + addi $at,$at, + add $tempreg,$tempreg,$at + + If we have NewABI, and we know it's a local symbol, we want + lw $reg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) + addiu $reg,$reg, (BFD_RELOC_MIPS_GOT_OFST) + otherwise we have to resort to GOT_HI16/GOT_LO16. */ + + frag_grow (40); + + frag_now->tc_frag_data.tc_fr_offset = + expr1.X_add_number = offset_expr.X_add_number; + offset_expr.X_add_number = 0; + + if (expr1.X_add_number == 0 && tempreg == PIC_CALL_REG) + { + lui_reloc_type = (int) BFD_RELOC_MIPS_CALL_HI16; + lw_reloc_type = (int) BFD_RELOC_MIPS_CALL_LO16; + } + macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u", + tempreg, lui_reloc_type); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", tempreg, tempreg, mips_gp_register); + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, lw_reloc_type, tempreg); + + if (expr1.X_add_number == 0) + { + p = frag_var (rs_machine_dependent, 8, 0, + RELAX_ENCODE (12, 8, 0, 4, 0, + mips_opts.warn_about_macros), + offset_expr.X_add_symbol, 0, NULL); + } + else if (expr1.X_add_number >= -0x8000 + && expr1.X_add_number < 0x8000) + { + macro_build ((char *) NULL, &icnt, &expr1, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", tempreg, tempreg, + (int) BFD_RELOC_LO16); + p = frag_var (rs_machine_dependent, 8, 0, + RELAX_ENCODE (16, 8, 0, 4, 0, + mips_opts.warn_about_macros), + offset_expr.X_add_symbol, 0, NULL); + } + else if (IS_SEXT_32BIT_NUM (expr1.X_add_number)) + { + int dreg; + + /* If we are going to add in a base register, and the + target register and the base register are the same, + then we are using AT as a temporary register. Since + we want to load the constant into AT, we add our + current AT (from the global offset table) and the + register into the register now, and pretend we were + not using a base register. */ + if (breg != treg) + dreg = tempreg; + else + { + assert (tempreg == AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", treg, AT, breg); + dreg = treg; + adj = 4; + } + + /* Set mips_optimize around the lui instruction to avoid + inserting an unnecessary nop after the lw. */ + macro_build_lui ((char *) NULL, &icnt, &expr1, AT); + macro_build ((char *) NULL, &icnt, &expr1, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", AT, AT, (int) BFD_RELOC_LO16); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", dreg, dreg, AT); + + p = frag_var (rs_machine_dependent, 8 + adj, 0, + RELAX_ENCODE (24 + adj, 8 + adj, + 0, 4, 0, + (breg == 0 + ? mips_opts.warn_about_macros + : 0)), + offset_expr.X_add_symbol, 0, NULL); + + used_at = 1; + } + else + as_bad (_("PIC code offset overflow (max 32 signed bits)")); + + offset_expr.X_add_number = expr1.X_add_number; + macro_build (p, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", + tempreg, + (int) BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); + macro_build (p + 4, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", "t,r,j", + tempreg, tempreg, (int) BFD_RELOC_MIPS_GOT_OFST); + if (adj) + { + macro_build (p + 8, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", treg, tempreg, breg); + breg = 0; + tempreg = treg; + } + } else if (mips_pic == EMBEDDED_PIC) { /* We use @@ -5347,9 +5691,10 @@ macro (ip) char *s; if (mips_pic == EMBEDDED_PIC || mips_pic == NO_PIC) - s = (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu"; + s = (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : + HAVE_NEWABI ? "add" : "addu"; else - s = HAVE_64BIT_ADDRESSES ? "daddu" : "addu"; + s = HAVE_64BIT_ADDRESSES ? "daddu" : HAVE_NEWABI ? "add" : "addu"; macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, "d,v,t", treg, tempreg, breg); @@ -5448,16 +5793,52 @@ macro (ip) jalr $ra,$25 nop lw $gp,cprestore($sp) - For NewABI, we want - lw $25,($gp) (BFD_RELOC_MIPS_GOT_DISP) - jalr $ra,$25 (BFD_RELOC_MIPS_JALR) - */ + + For NewABI, we use the same CALL16 or CALL_HI16/CALL_LO16 + sequences above, minus nops, unless the symbol is local, + which enables us to use GOT_PAGE/GOT_OFST (big got) or + GOT_DISP. */ if (HAVE_NEWABI) { - macro_build ((char *) NULL, &icnt, &offset_expr, - HAVE_32BIT_ADDRESSES ? "lw" : "ld", - "t,o(b)", PIC_CALL_REG, - (int) BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); + if (! mips_big_got) + { + frag_grow (4); + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", PIC_CALL_REG, + (int) BFD_RELOC_MIPS_CALL16, + mips_gp_register); + frag_var (rs_machine_dependent, 0, 0, + RELAX_ENCODE (0, 0, -4, 0, 0, 0), + offset_expr.X_add_symbol, 0, NULL); + } + else + { + frag_grow (20); + macro_build ((char *) NULL, &icnt, &offset_expr, "lui", + "t,u", PIC_CALL_REG, + (int) BFD_RELOC_MIPS_CALL_HI16); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", PIC_CALL_REG, PIC_CALL_REG, + mips_gp_register); + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", PIC_CALL_REG, + (int) BFD_RELOC_MIPS_CALL_LO16, PIC_CALL_REG); + p = frag_var (rs_machine_dependent, 8, 0, + RELAX_ENCODE (12, 8, 0, 4, 0, 0), + offset_expr.X_add_symbol, 0, NULL); + macro_build (p, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", "t,o(b)", + tempreg, (int) BFD_RELOC_MIPS_GOT_PAGE, + mips_gp_register); + macro_build (p + 4, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "addi" : "daddiu", + "t,r,j", tempreg, tempreg, + (int) BFD_RELOC_MIPS_GOT_OFST); + } + macro_build_jalr (icnt, &offset_expr); } else @@ -5762,7 +6143,7 @@ macro (ip) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, ((bfd_arch_bits_per_address (stdoutput) == 32 || ! ISA_HAS_64BIT_REGS (mips_opts.isa)) - ? "addu" : "daddu"), + ? HAVE_NEWABI ? "add" : "addu" : "daddu"), "d,v,t", tempreg, tempreg, breg); macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, treg, (int) BFD_RELOC_PCREL_LO16, tempreg); @@ -5935,7 +6316,8 @@ macro (ip) { frag_grow (28); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", tempreg, breg, mips_gp_register); macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, treg, (int) BFD_RELOC_GPREL16, tempreg); @@ -5947,7 +6329,8 @@ macro (ip) if (p != NULL) p += 4; macro_build (p, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", tempreg, tempreg, breg); if (p != NULL) p += 4; @@ -5969,8 +6352,11 @@ macro (ip) nop addiu $tempreg,$tempreg, (BFD_RELOC_LO16) $treg,0($tempreg) - If we have NewABI, we want - lw $reg,($gp) (BFD_RELOC_MIPS_GOT_DISP) + + For NewABI, we want + lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) + $treg,($tempreg) (BFD_RELOC_MIPS_GOT_OFST) + If there is a base register, we add it to $tempreg before the . If there is a constant, we stick it in the instruction. We don't handle constants larger than @@ -5978,10 +6364,26 @@ macro (ip) (actually, we could handle them for the subset of cases in which we are not using $at). */ assert (offset_expr.X_op == O_symbol); + if (HAVE_NEWABI) + { + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, BFD_RELOC_MIPS_GOT_PAGE, + mips_gp_register); + if (breg != 0) + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", tempreg, tempreg, breg); + macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt, treg, + (int) BFD_RELOC_MIPS_GOT_OFST, tempreg); + + if (! used_at) + return; + + break; + } expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; - if (HAVE_NEWABI) - lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_DISP; if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); @@ -6003,7 +6405,7 @@ macro (ip) macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg, (int) BFD_RELOC_LO16, tempreg); } - else if (mips_pic == SVR4_PIC) + else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI) { int gpdel; char *p; @@ -6023,41 +6425,13 @@ macro (ip) instruction. We don't handle constants larger than 16 bits, because we have no way to load the upper 16 bits (actually, we could handle them for the subset of cases - in which we are not using $at). - - For NewABI, we want - lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) - addiu $tempreg,$tempreg, (BFD_RELOC_MIPS_GOT_OFST) - $treg,0($tempreg) - */ + in which we are not using $at). */ assert (offset_expr.X_op == O_symbol); expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); - if (HAVE_NEWABI) - { - macro_build ((char *) NULL, &icnt, &offset_expr, - HAVE_32BIT_ADDRESSES ? "lw" : "ld", - "t,o(b)", tempreg, BFD_RELOC_MIPS_GOT_PAGE, - mips_gp_register); - macro_build ((char *) NULL, &icnt, &offset_expr, - HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu", - "t,r,j", tempreg, tempreg, - BFD_RELOC_MIPS_GOT_OFST); - if (breg != 0) - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", - "d,v,t", tempreg, tempreg, breg); - macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg, - (int) BFD_RELOC_LO16, tempreg); - - if (! used_at) - return; - - break; - } if (reg_needs_delay (mips_gp_register)) gpdel = 4; else @@ -6097,6 +6471,60 @@ macro (ip) macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg, (int) BFD_RELOC_LO16, tempreg); } + else if (mips_pic == SVR4_PIC && HAVE_NEWABI) + { + char *p; + int bregsz = breg != 0 ? 4 : 0; + + /* If this is a reference to an external symbol, we want + lui $tempreg, (BFD_RELOC_MIPS_GOT_HI16) + add $tempreg,$tempreg,$gp + lw $tempreg,($tempreg) (BFD_RELOC_MIPS_GOT_LO16) + $treg,($tempreg) + Otherwise, for local symbols, we want: + lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) + $treg,($tempreg) (BFD_RELOC_MIPS_GOT_OFST) */ + assert (offset_expr.X_op == O_symbol); + frag_now->tc_frag_data.tc_fr_offset = + expr1.X_add_number = offset_expr.X_add_number; + offset_expr.X_add_number = 0; + if (expr1.X_add_number < -0x8000 + || expr1.X_add_number >= 0x8000) + as_bad (_("PIC code offset overflow (max 16 signed bits)")); + frag_grow (36); + macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u", + tempreg, (int) BFD_RELOC_MIPS_GOT_HI16); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", tempreg, tempreg, mips_gp_register); + macro_build ((char *) NULL, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT_LO16, + tempreg); + if (breg != 0) + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", tempreg, tempreg, breg); + macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg, + (int) BFD_RELOC_LO16, tempreg); + + offset_expr.X_add_number = expr1.X_add_number; + p = frag_var (rs_machine_dependent, 12 + bregsz, 0, + RELAX_ENCODE (16 + bregsz, 8 + bregsz, + 0, 4 + bregsz, 0, 0), + offset_expr.X_add_symbol, 0, NULL); + macro_build (p, &icnt, &offset_expr, + HAVE_32BIT_ADDRESSES ? "lw" : "ld", + "t,o(b)", tempreg, + (int) BFD_RELOC_MIPS_GOT_PAGE, + mips_gp_register); + if (breg != 0) + macro_build (p + 4, &icnt, (expressionS *) NULL, + HAVE_32BIT_ADDRESSES ? "add" : "daddu", + "d,v,t", tempreg, tempreg, breg); + macro_build (p + 4 + bregsz, &icnt, &offset_expr, s, fmt, treg, + (int) BFD_RELOC_MIPS_GOT_OFST, tempreg); + } else if (mips_pic == EMBEDDED_PIC) { /* If there is no base register, we want @@ -6488,7 +6916,8 @@ macro (ip) { frag_grow (36); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, breg, mips_gp_register); tempreg = AT; off = 4; @@ -6543,7 +6972,8 @@ macro (ip) if (breg != 0) { macro_build (p, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, breg, AT); if (p != NULL) p += 4; @@ -6595,7 +7025,8 @@ macro (ip) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", ""); if (breg != 0) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ macro_build ((char *) NULL, &icnt, &expr1, s, fmt, @@ -6655,7 +7086,8 @@ macro (ip) macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u", AT, (int) BFD_RELOC_MIPS_GOT_HI16); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, AT, mips_gp_register); macro_build ((char *) NULL, &icnt, &offset_expr, HAVE_32BIT_ADDRESSES ? "lw" : "ld", @@ -6663,7 +7095,8 @@ macro (ip) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", ""); if (breg != 0) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ macro_build ((char *) NULL, &icnt, &expr1, s, fmt, @@ -6701,7 +7134,8 @@ macro (ip) if (breg != 0) { macro_build (p, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, breg, AT); p += 4; } @@ -7626,7 +8060,8 @@ macro2 (ip) load_address (&icnt, AT, &offset_expr, &used_at); if (breg != 0) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, AT, breg); if (! target_big_endian) expr1.X_add_number = off; @@ -7648,7 +8083,8 @@ macro2 (ip) load_address (&icnt, AT, &offset_expr, &used_at); if (breg != 0) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, AT, breg); if (target_big_endian) expr1.X_add_number = 0; @@ -7722,7 +8158,8 @@ macro2 (ip) load_address (&icnt, AT, &offset_expr, &used_at); if (breg != 0) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, AT, breg); if (! target_big_endian) expr1.X_add_number = off; @@ -7743,7 +8180,8 @@ macro2 (ip) load_address (&icnt, AT, &offset_expr, &used_at); if (breg != 0) macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI + ? "add" : "addu" : "daddu", "d,v,t", AT, AT, breg); if (! target_big_endian) expr1.X_add_number = 0; @@ -12342,7 +12780,7 @@ s_cpsetup (ignore) 0, NULL, 0, 0, BFD_RELOC_LO16); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_64BIT_ADDRESSES ? "daddu" : "addu", "d,v,t", + HAVE_64BIT_ADDRESSES ? "daddu" : "add", "d,v,t", mips_gp_register, mips_gp_register, reg1); demand_empty_rest_of_line (); @@ -12561,7 +12999,7 @@ s_cpadd (ignore) /* Add $gp to the register named as an argument. */ reg = tc_get_register (0); macro_build ((char *) NULL, &icnt, (expressionS *) NULL, - HAVE_32BIT_ADDRESSES ? "addu" : "daddu", + HAVE_32BIT_ADDRESSES ? HAVE_NEWABI ? "add" : "addu" : "daddu", "d,v,t", reg, reg, mips_gp_register); demand_empty_rest_of_line (); @@ -13319,6 +13757,8 @@ tc_gen_reloc (section, fixp) if (fixp->fx_frag->fr_opcode != NULL && ((fixp->fx_r_type == BFD_RELOC_GPREL16 && ! HAVE_NEWABI) + || (fixp->fx_r_type == BFD_RELOC_MIPS_GOT_DISP + && HAVE_NEWABI) || fixp->fx_r_type == BFD_RELOC_MIPS_GOT16 || fixp->fx_r_type == BFD_RELOC_MIPS_CALL16 || fixp->fx_r_type == BFD_RELOC_MIPS_GOT_HI16 @@ -13352,6 +13792,7 @@ tc_gen_reloc (section, fixp) fixp->fx_where = fixp->fx_frag->fr_opcode - fixp->fx_frag->fr_literal; reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; + reloc->addend += fixp->fx_frag->tc_frag_data.tc_fr_offset; reloc2 = retval[1] = (arelent *) xmalloc (sizeof (arelent)); retval[2] = NULL; reloc2->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); @@ -13359,7 +13800,8 @@ tc_gen_reloc (section, fixp) reloc2->address = (reloc->address + (RELAX_RELOC2 (fixp->fx_frag->fr_subtype) - RELAX_RELOC1 (fixp->fx_frag->fr_subtype))); - reloc2->addend = fixp->fx_addnumber; + reloc2->addend = fixp->fx_addnumber + + fixp->fx_frag->tc_frag_data.tc_fr_offset; reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_LO16); assert (reloc2->howto != NULL); @@ -13388,12 +13830,8 @@ tc_gen_reloc (section, fixp) break; case BFD_RELOC_MIPS_GOT_LO16: case BFD_RELOC_MIPS_CALL_LO16: - fixp->fx_r_type = BFD_RELOC_MIPS_GOT16; - break; - case BFD_RELOC_MIPS_CALL16: if (HAVE_NEWABI) { - /* BFD_RELOC_MIPS_GOT16;*/ fixp->fx_r_type = BFD_RELOC_MIPS_GOT_PAGE; reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MIPS_GOT_OFST); @@ -13401,17 +13839,26 @@ tc_gen_reloc (section, fixp) else fixp->fx_r_type = BFD_RELOC_MIPS_GOT16; break; + case BFD_RELOC_MIPS_CALL16: + case BFD_RELOC_MIPS_GOT_OFST: + case BFD_RELOC_MIPS_GOT_DISP: + if (HAVE_NEWABI) + { + /* It may seem nonsensical to relax GOT_DISP to + GOT_DISP, but we're actually turning a GOT_DISP + without offset into a GOT_DISP with an offset, + getting rid of the separate addition, which we can + do when the symbol is found to be local. */ + fixp->fx_r_type = BFD_RELOC_MIPS_GOT_DISP; + retval[1] = NULL; + } + else + fixp->fx_r_type = BFD_RELOC_MIPS_GOT16; + break; } } else abort (); - - /* newabi uses R_MIPS_GOT_DISP for local symbols */ - if (HAVE_NEWABI && fixp->fx_r_type == BFD_RELOC_MIPS_GOT_LO16) - { - fixp->fx_r_type = BFD_RELOC_MIPS_GOT_DISP; - retval[1] = NULL; - } } /* Since the old MIPS ELF ABI uses Rel instead of Rela, encode the vtable @@ -13850,7 +14297,7 @@ md_convert_frag (abfd, asec, fragp) fixptr = fragp->fr_literal + fragp->fr_fix; if (new > 0) - memcpy (fixptr - old, fixptr, new); + memmove (fixptr - old, fixptr, new); fragp->fr_fix += new - old; } Index: gas/config/tc-mips.h =================================================================== RCS file: /cvs/uberbaum/gas/config/tc-mips.h,v retrieving revision 1.24 diff -u -p -r1.24 tc-mips.h --- gas/config/tc-mips.h 12 Mar 2003 23:07:38 -0000 1.24 +++ gas/config/tc-mips.h 8 Apr 2003 10:02:27 -0000 @@ -193,4 +193,9 @@ extern enum dwarf2_format mips_dwarf2_fo #define DWARF2_ADDR_SIZE(bfd) \ (DWARF2_FORMAT () == dwarf2_format_32bit ? 4 : 8) +typedef struct { + offsetT tc_fr_offset; +} tc_frag_data_type; +#define TC_FRAG_TYPE tc_frag_data_type + #endif /* TC_MIPS */ Index: gas/testsuite/gas/mips/elf-rel-got-n32.d =================================================================== RCS file: gas/testsuite/gas/mips/elf-rel-got-n32.d diff -N gas/testsuite/gas/mips/elf-rel-got-n32.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ gas/testsuite/gas/mips/elf-rel-got-n32.d 8 Apr 2003 10:02:27 -0000 @@ -0,0 +1,388 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ELF got reloc n32 +#as: -n32 -KPIC + +.*: +file format elf32-n.*mips.* + +Disassembly of section \.text: +00000000 8f850000 lw a1,0\(gp\) + 0: R_MIPS_GOT_DISP dg1 +00000004 8f850000 lw a1,0\(gp\) + 4: R_MIPS_GOT_DISP dg1 +00000008 20a5000c addi a1,a1,12 +0000000c 8f850000 lw a1,0\(gp\) + c: R_MIPS_GOT_DISP dg1 +00000010 3c010002 lui at,0x2 +00000014 2021e240 addi at,at,-7616 +00000018 00a12820 add a1,a1,at +0000001c 8f850000 lw a1,0\(gp\) + 1c: R_MIPS_GOT_DISP dg1 +00000020 00b12820 add a1,a1,s1 +00000024 8f850000 lw a1,0\(gp\) + 24: R_MIPS_GOT_DISP dg1 +00000028 20a5000c addi a1,a1,12 +0000002c 00b12820 add a1,a1,s1 +00000030 8f850000 lw a1,0\(gp\) + 30: R_MIPS_GOT_DISP dg1 +00000034 3c010002 lui at,0x2 +00000038 2021e240 addi at,at,-7616 +0000003c 00a12820 add a1,a1,at +00000040 00b12820 add a1,a1,s1 +00000044 8f850000 lw a1,0\(gp\) + 44: R_MIPS_GOT_PAGE dg1 +00000048 8ca50000 lw a1,0\(a1\) + 48: R_MIPS_GOT_OFST dg1 +0000004c 8f850000 lw a1,0\(gp\) + 4c: R_MIPS_GOT_PAGE dg1\+0xc +00000050 8ca50000 lw a1,0\(a1\) + 50: R_MIPS_GOT_OFST dg1\+0xc +00000054 8f850000 lw a1,0\(gp\) + 54: R_MIPS_GOT_PAGE dg1 +00000058 00b12820 add a1,a1,s1 +0000005c 8ca50000 lw a1,0\(a1\) + 5c: R_MIPS_GOT_OFST dg1 +00000060 8f850000 lw a1,0\(gp\) + 60: R_MIPS_GOT_PAGE dg1\+0xc +00000064 00b12820 add a1,a1,s1 +00000068 8ca50000 lw a1,0\(a1\) + 68: R_MIPS_GOT_OFST dg1\+0xc +0000006c 8f810000 lw at,0\(gp\) + 6c: R_MIPS_GOT_PAGE dg1\+0x22 +00000070 00250820 add at,at,a1 +00000074 8c250000 lw a1,0\(at\) + 74: R_MIPS_GOT_OFST dg1\+0x22 +00000078 8f810000 lw at,0\(gp\) + 78: R_MIPS_GOT_PAGE dg1\+0x38 +0000007c 00250820 add at,at,a1 +00000080 ac250000 sw a1,0\(at\) + 80: R_MIPS_GOT_OFST dg1\+0x38 +00000084 8f810000 lw at,0\(gp\) + 84: R_MIPS_GOT_DISP dg1 +00000088 88250000 lwl a1,0\(at\) +0000008c 98250003 lwr a1,3\(at\) +00000090 8f810000 lw at,0\(gp\) + 90: R_MIPS_GOT_DISP dg1 +00000094 2021000c addi at,at,12 +00000098 88250000 lwl a1,0\(at\) +0000009c 98250003 lwr a1,3\(at\) +000000a0 8f810000 lw at,0\(gp\) + a0: R_MIPS_GOT_DISP dg1 +000000a4 00310820 add at,at,s1 +000000a8 88250000 lwl a1,0\(at\) +000000ac 98250003 lwr a1,3\(at\) +000000b0 8f810000 lw at,0\(gp\) + b0: R_MIPS_GOT_DISP dg1 +000000b4 2021000c addi at,at,12 +000000b8 00310820 add at,at,s1 +000000bc 88250000 lwl a1,0\(at\) +000000c0 98250003 lwr a1,3\(at\) +000000c4 8f810000 lw at,0\(gp\) + c4: R_MIPS_GOT_DISP dg1 +000000c8 20210022 addi at,at,34 +000000cc 00250820 add at,at,a1 +000000d0 88250000 lwl a1,0\(at\) +000000d4 98250003 lwr a1,3\(at\) +000000d8 8f810000 lw at,0\(gp\) + d8: R_MIPS_GOT_DISP dg1 +000000dc 20210038 addi at,at,56 +000000e0 00250820 add at,at,a1 +000000e4 a8250000 swl a1,0\(at\) +000000e8 b8250003 swr a1,3\(at\) +000000ec 8f850000 lw a1,0\(gp\) + ec: R_MIPS_GOT_DISP \.data\+0x3c +000000f0 8f850000 lw a1,0\(gp\) + f0: R_MIPS_GOT_DISP \.data\+0x48 +000000f4 8f850000 lw a1,0\(gp\) + f4: R_MIPS_GOT_DISP \.data\+0x1e27c +000000f8 8f850000 lw a1,0\(gp\) + f8: R_MIPS_GOT_DISP \.data\+0x3c +000000fc 00b12820 add a1,a1,s1 +00000100 8f850000 lw a1,0\(gp\) + 100: R_MIPS_GOT_DISP \.data\+0x48 +00000104 00b12820 add a1,a1,s1 +00000108 8f850000 lw a1,0\(gp\) + 108: R_MIPS_GOT_DISP \.data\+0x1e27c +0000010c 00b12820 add a1,a1,s1 +00000110 8f850000 lw a1,0\(gp\) + 110: R_MIPS_GOT_PAGE \.data\+0x3c +00000114 8ca50000 lw a1,0\(a1\) + 114: R_MIPS_GOT_OFST \.data\+0x3c +00000118 8f850000 lw a1,0\(gp\) + 118: R_MIPS_GOT_PAGE \.data\+0x48 +0000011c 8ca50000 lw a1,0\(a1\) + 11c: R_MIPS_GOT_OFST \.data\+0x48 +00000120 8f850000 lw a1,0\(gp\) + 120: R_MIPS_GOT_PAGE \.data\+0x3c +00000124 00b12820 add a1,a1,s1 +00000128 8ca50000 lw a1,0\(a1\) + 128: R_MIPS_GOT_OFST \.data\+0x3c +0000012c 8f850000 lw a1,0\(gp\) + 12c: R_MIPS_GOT_PAGE \.data\+0x48 +00000130 00b12820 add a1,a1,s1 +00000134 8ca50000 lw a1,0\(a1\) + 134: R_MIPS_GOT_OFST \.data\+0x48 +00000138 8f810000 lw at,0\(gp\) + 138: R_MIPS_GOT_PAGE \.data\+0x5e +0000013c 00250820 add at,at,a1 +00000140 8c250000 lw a1,0\(at\) + 140: R_MIPS_GOT_OFST \.data\+0x5e +00000144 8f810000 lw at,0\(gp\) + 144: R_MIPS_GOT_PAGE \.data\+0x74 +00000148 00250820 add at,at,a1 +0000014c ac250000 sw a1,0\(at\) + 14c: R_MIPS_GOT_OFST \.data\+0x74 +00000150 8f810000 lw at,0\(gp\) + 150: R_MIPS_GOT_DISP \.data\+0x3c +00000154 88250000 lwl a1,0\(at\) +00000158 98250003 lwr a1,3\(at\) +0000015c 8f810000 lw at,0\(gp\) + 15c: R_MIPS_GOT_DISP \.data\+0x48 +00000160 88250000 lwl a1,0\(at\) +00000164 98250003 lwr a1,3\(at\) +00000168 8f810000 lw at,0\(gp\) + 168: R_MIPS_GOT_DISP \.data\+0x3c +0000016c 00310820 add at,at,s1 +00000170 88250000 lwl a1,0\(at\) +00000174 98250003 lwr a1,3\(at\) +00000178 8f810000 lw at,0\(gp\) + 178: R_MIPS_GOT_DISP \.data\+0x48 +0000017c 00310820 add at,at,s1 +00000180 88250000 lwl a1,0\(at\) +00000184 98250003 lwr a1,3\(at\) +00000188 8f810000 lw at,0\(gp\) + 188: R_MIPS_GOT_DISP \.data\+0x5e +0000018c 00250820 add at,at,a1 +00000190 88250000 lwl a1,0\(at\) +00000194 98250003 lwr a1,3\(at\) +00000198 8f810000 lw at,0\(gp\) + 198: R_MIPS_GOT_DISP \.data\+0x74 +0000019c 00250820 add at,at,a1 +000001a0 a8250000 swl a1,0\(at\) +000001a4 b8250003 swr a1,3\(at\) +000001a8 8f850000 lw a1,0\(gp\) + 1a8: R_MIPS_GOT_DISP fn +000001ac 8f850000 lw a1,0\(gp\) + 1ac: R_MIPS_GOT_DISP \.text +000001b0 8f990000 lw t9,0\(gp\) + 1b0: R_MIPS_CALL16 fn +000001b4 8f990000 lw t9,0\(gp\) + 1b4: R_MIPS_GOT_DISP \.text +000001b8 8f990000 lw t9,0\(gp\) + 1b8: R_MIPS_CALL16 fn +000001bc 0320f809 jalr t9 + 1bc: R_MIPS_JALR fn +000001c0 00000000 nop +000001c4 8f990000 lw t9,0\(gp\) + 1c4: R_MIPS_GOT_DISP \.text +000001c8 0320f809 jalr t9 + 1c8: R_MIPS_JALR \.text +000001cc 00000000 nop +000001d0 8f850000 lw a1,0\(gp\) + 1d0: R_MIPS_GOT_DISP dg2 +000001d4 8f850000 lw a1,0\(gp\) + 1d4: R_MIPS_GOT_DISP dg2 +000001d8 20a5000c addi a1,a1,12 +000001dc 8f850000 lw a1,0\(gp\) + 1dc: R_MIPS_GOT_DISP dg2 +000001e0 3c010002 lui at,0x2 +000001e4 2021e240 addi at,at,-7616 +000001e8 00a12820 add a1,a1,at +000001ec 8f850000 lw a1,0\(gp\) + 1ec: R_MIPS_GOT_DISP dg2 +000001f0 00b12820 add a1,a1,s1 +000001f4 8f850000 lw a1,0\(gp\) + 1f4: R_MIPS_GOT_DISP dg2 +000001f8 20a5000c addi a1,a1,12 +000001fc 00b12820 add a1,a1,s1 +00000200 8f850000 lw a1,0\(gp\) + 200: R_MIPS_GOT_DISP dg2 +00000204 3c010002 lui at,0x2 +00000208 2021e240 addi at,at,-7616 +0000020c 00a12820 add a1,a1,at +00000210 00b12820 add a1,a1,s1 +00000214 8f850000 lw a1,0\(gp\) + 214: R_MIPS_GOT_PAGE dg2 +00000218 8ca50000 lw a1,0\(a1\) + 218: R_MIPS_GOT_OFST dg2 +0000021c 8f850000 lw a1,0\(gp\) + 21c: R_MIPS_GOT_PAGE dg2\+0xc +00000220 8ca50000 lw a1,0\(a1\) + 220: R_MIPS_GOT_OFST dg2\+0xc +00000224 8f850000 lw a1,0\(gp\) + 224: R_MIPS_GOT_PAGE dg2 +00000228 00b12820 add a1,a1,s1 +0000022c 8ca50000 lw a1,0\(a1\) + 22c: R_MIPS_GOT_OFST dg2 +00000230 8f850000 lw a1,0\(gp\) + 230: R_MIPS_GOT_PAGE dg2\+0xc +00000234 00b12820 add a1,a1,s1 +00000238 8ca50000 lw a1,0\(a1\) + 238: R_MIPS_GOT_OFST dg2\+0xc +0000023c 8f810000 lw at,0\(gp\) + 23c: R_MIPS_GOT_PAGE dg2\+0x22 +00000240 00250820 add at,at,a1 +00000244 8c250000 lw a1,0\(at\) + 244: R_MIPS_GOT_OFST dg2\+0x22 +00000248 8f810000 lw at,0\(gp\) + 248: R_MIPS_GOT_PAGE dg2\+0x38 +0000024c 00250820 add at,at,a1 +00000250 ac250000 sw a1,0\(at\) + 250: R_MIPS_GOT_OFST dg2\+0x38 +00000254 8f810000 lw at,0\(gp\) + 254: R_MIPS_GOT_DISP dg2 +00000258 88250000 lwl a1,0\(at\) +0000025c 98250003 lwr a1,3\(at\) +00000260 8f810000 lw at,0\(gp\) + 260: R_MIPS_GOT_DISP dg2 +00000264 2021000c addi at,at,12 +00000268 88250000 lwl a1,0\(at\) +0000026c 98250003 lwr a1,3\(at\) +00000270 8f810000 lw at,0\(gp\) + 270: R_MIPS_GOT_DISP dg2 +00000274 00310820 add at,at,s1 +00000278 88250000 lwl a1,0\(at\) +0000027c 98250003 lwr a1,3\(at\) +00000280 8f810000 lw at,0\(gp\) + 280: R_MIPS_GOT_DISP dg2 +00000284 2021000c addi at,at,12 +00000288 00310820 add at,at,s1 +0000028c 88250000 lwl a1,0\(at\) +00000290 98250003 lwr a1,3\(at\) +00000294 8f810000 lw at,0\(gp\) + 294: R_MIPS_GOT_DISP dg2 +00000298 20210022 addi at,at,34 +0000029c 00250820 add at,at,a1 +000002a0 88250000 lwl a1,0\(at\) +000002a4 98250003 lwr a1,3\(at\) +000002a8 8f810000 lw at,0\(gp\) + 2a8: R_MIPS_GOT_DISP dg2 +000002ac 20210038 addi at,at,56 +000002b0 00250820 add at,at,a1 +000002b4 a8250000 swl a1,0\(at\) +000002b8 b8250003 swr a1,3\(at\) +000002bc 8f850000 lw a1,0\(gp\) + 2bc: R_MIPS_GOT_DISP \.data\+0xb4 +000002c0 8f850000 lw a1,0\(gp\) + 2c0: R_MIPS_GOT_DISP \.data\+0xc0 +000002c4 8f850000 lw a1,0\(gp\) + 2c4: R_MIPS_GOT_DISP \.data\+0x1e2f4 +000002c8 8f850000 lw a1,0\(gp\) + 2c8: R_MIPS_GOT_DISP \.data\+0xb4 +000002cc 00b12820 add a1,a1,s1 +000002d0 8f850000 lw a1,0\(gp\) + 2d0: R_MIPS_GOT_DISP \.data\+0xc0 +000002d4 00b12820 add a1,a1,s1 +000002d8 8f850000 lw a1,0\(gp\) + 2d8: R_MIPS_GOT_DISP \.data\+0x1e2f4 +000002dc 00b12820 add a1,a1,s1 +000002e0 8f850000 lw a1,0\(gp\) + 2e0: R_MIPS_GOT_PAGE \.data\+0xb4 +000002e4 8ca50000 lw a1,0\(a1\) + 2e4: R_MIPS_GOT_OFST \.data\+0xb4 +000002e8 8f850000 lw a1,0\(gp\) + 2e8: R_MIPS_GOT_PAGE \.data\+0xc0 +000002ec 8ca50000 lw a1,0\(a1\) + 2ec: R_MIPS_GOT_OFST \.data\+0xc0 +000002f0 8f850000 lw a1,0\(gp\) + 2f0: R_MIPS_GOT_PAGE \.data\+0xb4 +000002f4 00b12820 add a1,a1,s1 +000002f8 8ca50000 lw a1,0\(a1\) + 2f8: R_MIPS_GOT_OFST \.data\+0xb4 +000002fc 8f850000 lw a1,0\(gp\) + 2fc: R_MIPS_GOT_PAGE \.data\+0xc0 +00000300 00b12820 add a1,a1,s1 +00000304 8ca50000 lw a1,0\(a1\) + 304: R_MIPS_GOT_OFST \.data\+0xc0 +00000308 8f810000 lw at,0\(gp\) + 308: R_MIPS_GOT_PAGE \.data\+0xd6 +0000030c 00250820 add at,at,a1 +00000310 8c250000 lw a1,0\(at\) + 310: R_MIPS_GOT_OFST \.data\+0xd6 +00000314 8f810000 lw at,0\(gp\) + 314: R_MIPS_GOT_PAGE \.data\+0xec +00000318 00250820 add at,at,a1 +0000031c ac250000 sw a1,0\(at\) + 31c: R_MIPS_GOT_OFST \.data\+0xec +00000320 8f810000 lw at,0\(gp\) + 320: R_MIPS_GOT_DISP \.data\+0xb4 +00000324 88250000 lwl a1,0\(at\) +00000328 98250003 lwr a1,3\(at\) +0000032c 8f810000 lw at,0\(gp\) + 32c: R_MIPS_GOT_DISP \.data\+0xc0 +00000330 88250000 lwl a1,0\(at\) +00000334 98250003 lwr a1,3\(at\) +00000338 8f810000 lw at,0\(gp\) + 338: R_MIPS_GOT_DISP \.data\+0xb4 +0000033c 00310820 add at,at,s1 +00000340 88250000 lwl a1,0\(at\) +00000344 98250003 lwr a1,3\(at\) +00000348 8f810000 lw at,0\(gp\) + 348: R_MIPS_GOT_DISP \.data\+0xc0 +0000034c 00310820 add at,at,s1 +00000350 88250000 lwl a1,0\(at\) +00000354 98250003 lwr a1,3\(at\) +00000358 8f810000 lw at,0\(gp\) + 358: R_MIPS_GOT_DISP \.data\+0xd6 +0000035c 00250820 add at,at,a1 +00000360 88250000 lwl a1,0\(at\) +00000364 98250003 lwr a1,3\(at\) +00000368 8f810000 lw at,0\(gp\) + 368: R_MIPS_GOT_DISP \.data\+0xec +0000036c 00250820 add at,at,a1 +00000370 a8250000 swl a1,0\(at\) +00000374 b8250003 swr a1,3\(at\) +00000378 8f850000 lw a1,0\(gp\) + 378: R_MIPS_GOT_DISP fn2 +0000037c 8f850000 lw a1,0\(gp\) + 37c: R_MIPS_GOT_DISP \.text\+0x404 +00000380 8f990000 lw t9,0\(gp\) + 380: R_MIPS_CALL16 fn2 +00000384 8f990000 lw t9,0\(gp\) + 384: R_MIPS_GOT_DISP \.text\+0x404 +00000388 8f990000 lw t9,0\(gp\) + 388: R_MIPS_CALL16 fn2 +0000038c 0320f809 jalr t9 + 38c: R_MIPS_JALR fn2 +00000390 00000000 nop +00000394 8f990000 lw t9,0\(gp\) + 394: R_MIPS_GOT_DISP \.text\+0x404 +00000398 0320f809 jalr t9 + 398: R_MIPS_JALR \.text\+0x404 +0000039c 00000000 nop +000003a0 1000ff17 b 00000000 +000003a4 8f850000 lw a1,0\(gp\) + 3a4: R_MIPS_GOT_DISP dg1 +000003a8 8f850000 lw a1,0\(gp\) + 3a8: R_MIPS_GOT_PAGE dg2 +000003ac 10000015 b 00000404 +000003b0 8ca50000 lw a1,0\(a1\) + 3b0: R_MIPS_GOT_OFST dg2 +000003b4 1000ff12 b 00000000 +000003b8 8f850000 lw a1,0\(gp\) + 3b8: R_MIPS_GOT_DISP \.data\+0x3c +000003bc 8f850000 lw a1,0\(gp\) + 3bc: R_MIPS_GOT_DISP \.data\+0xc0 +000003c0 10000010 b 00000404 +000003c4 00000000 nop +000003c8 8f850000 lw a1,0\(gp\) + 3c8: R_MIPS_GOT_DISP \.data\+0x1e27c +000003cc 1000ff0c b 00000000 +000003d0 00000000 nop +000003d4 8f850000 lw a1,0\(gp\) + 3d4: R_MIPS_GOT_PAGE \.data\+0xb4 +000003d8 1000000a b 00000404 +000003dc 8ca50000 lw a1,0\(a1\) + 3dc: R_MIPS_GOT_OFST \.data\+0xb4 +000003e0 8f850000 lw a1,0\(gp\) + 3e0: R_MIPS_GOT_PAGE \.data\+0x48 +000003e4 1000ff06 b 00000000 +000003e8 8ca50000 lw a1,0\(a1\) + 3e8: R_MIPS_GOT_OFST \.data\+0x48 +000003ec 8f810000 lw at,0\(gp\) + 3ec: R_MIPS_GOT_PAGE \.data\+0xd6 +000003f0 00250820 add at,at,a1 +000003f4 10000003 b 00000404 +000003f8 8c250000 lw a1,0\(at\) + 3f8: R_MIPS_GOT_OFST \.data\+0xd6 + \.\.\. + \.\.\. Index: gas/testsuite/gas/mips/elf-rel-got-n32.s =================================================================== RCS file: gas/testsuite/gas/mips/elf-rel-got-n32.s diff -N gas/testsuite/gas/mips/elf-rel-got-n32.s --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ gas/testsuite/gas/mips/elf-rel-got-n32.s 8 Apr 2003 10:02:27 -0000 @@ -0,0 +1,162 @@ +# MIPS ELF GOT reloc n32 + + .data + .align 2 +sp1: + .space 60 + .globl dg1 +dg1: +dl1: + .space 60 + + + .text + + .globl fn + .ent fn + .type fn,@function +fn: +.Lfn: + la $5,dg1+0 + la $5,dg1+12 + la $5,dg1+123456 + la $5,dg1+0($17) + la $5,dg1+12($17) + la $5,dg1+123456($17) + + lw $5,dg1+0 + lw $5,dg1+12 + lw $5,dg1+0($17) + lw $5,dg1+12($17) + lw $5,dg1+34($5) + sw $5,dg1+56($5) + + ulw $5,dg1+0 + ulw $5,dg1+12 + ulw $5,dg1+0($17) + ulw $5,dg1+12($17) + ulw $5,dg1+34($5) + usw $5,dg1+56($5) + + la $5,dl1+0 + la $5,dl1+12 + la $5,dl1+123456 + la $5,dl1+0($17) + la $5,dl1+12($17) + la $5,dl1+123456($17) + + lw $5,dl1+0 + lw $5,dl1+12 + lw $5,dl1+0($17) + lw $5,dl1+12($17) + lw $5,dl1+34($5) + sw $5,dl1+56($5) + + ulw $5,dl1+0 + ulw $5,dl1+12 + ulw $5,dl1+0($17) + ulw $5,dl1+12($17) + ulw $5,dl1+34($5) + usw $5,dl1+56($5) + + la $5,fn + la $5,.Lfn + la $25,fn + la $25,.Lfn + jal fn + jal .Lfn + + + la $5,dg2+0 + la $5,dg2+12 + la $5,dg2+123456 + la $5,dg2+0($17) + la $5,dg2+12($17) + la $5,dg2+123456($17) + + lw $5,dg2+0 + lw $5,dg2+12 + lw $5,dg2+0($17) + lw $5,dg2+12($17) + lw $5,dg2+34($5) + sw $5,dg2+56($5) + + ulw $5,dg2+0 + ulw $5,dg2+12 + ulw $5,dg2+0($17) + ulw $5,dg2+12($17) + ulw $5,dg2+34($5) + usw $5,dg2+56($5) + + la $5,dl2+0 + la $5,dl2+12 + la $5,dl2+123456 + la $5,dl2+0($17) + la $5,dl2+12($17) + la $5,dl2+123456($17) + + lw $5,dl2+0 + lw $5,dl2+12 + lw $5,dl2+0($17) + lw $5,dl2+12($17) + lw $5,dl2+34($5) + sw $5,dl2+56($5) + + ulw $5,dl2+0 + ulw $5,dl2+12 + ulw $5,dl2+0($17) + ulw $5,dl2+12($17) + ulw $5,dl2+34($5) + usw $5,dl2+56($5) + + la $5,fn2 + la $5,.Lfn2 + la $25,fn2 + la $25,.Lfn2 + jal fn2 + jal .Lfn2 + +# Check that filling delay slots doesn't break our relocations. + + la $5,dg1 + b .Lfn + lw $5,dg2 + b .Lfn2 + + la $5,dl1 + b .Lfn + la $5,dl2+12 + b .Lfn2 + la $5,dl1+123456 + b .Lfn + lw $5,dl2 + b .Lfn2 + lw $5,dl1+12 + b .Lfn + lw $5,dl2+34($5) + b .Lfn2 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 + + .end fn + + .globl fn2 + .ent fn2 + .type fn2,@function +fn2: +.Lfn2: + .end fn2 + + .globl __start +__start: + + .data + .align 2 +sp2: + .space 60 + .globl dg2 +dg2: +dl2: + .space 60 + Index: gas/testsuite/gas/mips/elf-rel-got-n64.d =================================================================== RCS file: gas/testsuite/gas/mips/elf-rel-got-n64.d diff -N gas/testsuite/gas/mips/elf-rel-got-n64.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ gas/testsuite/gas/mips/elf-rel-got-n64.d 8 Apr 2003 10:02:27 -0000 @@ -0,0 +1,636 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ELF got reloc n64 +#as: -64 -KPIC + +.*: +file format elf64-.*mips.* + +Disassembly of section \.text: +0000000000000000 df850000 ld a1,0\(gp\) + 0: R_MIPS_GOT_DISP dg1 + 0: R_MIPS_NONE \*ABS\* + 0: R_MIPS_NONE \*ABS\* +0000000000000004 df850000 ld a1,0\(gp\) + 4: R_MIPS_GOT_DISP dg1 + 4: R_MIPS_NONE \*ABS\* + 4: R_MIPS_NONE \*ABS\* +0000000000000008 64a5000c daddiu a1,a1,12 +000000000000000c df850000 ld a1,0\(gp\) + c: R_MIPS_GOT_DISP dg1 + c: R_MIPS_NONE \*ABS\* + c: R_MIPS_NONE \*ABS\* +0000000000000010 3c010002 lui at,0x2 +0000000000000014 6421e240 daddiu at,at,-7616 +0000000000000018 00a1282d daddu a1,a1,at +000000000000001c df850000 ld a1,0\(gp\) + 1c: R_MIPS_GOT_DISP dg1 + 1c: R_MIPS_NONE \*ABS\* + 1c: R_MIPS_NONE \*ABS\* +0000000000000020 00b1282d daddu a1,a1,s1 +0000000000000024 df850000 ld a1,0\(gp\) + 24: R_MIPS_GOT_DISP dg1 + 24: R_MIPS_NONE \*ABS\* + 24: R_MIPS_NONE \*ABS\* +0000000000000028 64a5000c daddiu a1,a1,12 +000000000000002c 00b1282d daddu a1,a1,s1 +0000000000000030 df850000 ld a1,0\(gp\) + 30: R_MIPS_GOT_DISP dg1 + 30: R_MIPS_NONE \*ABS\* + 30: R_MIPS_NONE \*ABS\* +0000000000000034 3c010002 lui at,0x2 +0000000000000038 6421e240 daddiu at,at,-7616 +000000000000003c 00a1282d daddu a1,a1,at +0000000000000040 00b1282d daddu a1,a1,s1 +0000000000000044 df850000 ld a1,0\(gp\) + 44: R_MIPS_GOT_PAGE dg1 + 44: R_MIPS_NONE \*ABS\* + 44: R_MIPS_NONE \*ABS\* +0000000000000048 dca50000 ld a1,0\(a1\) + 48: R_MIPS_GOT_OFST dg1 + 48: R_MIPS_NONE \*ABS\* + 48: R_MIPS_NONE \*ABS\* +000000000000004c df850000 ld a1,0\(gp\) + 4c: R_MIPS_GOT_PAGE dg1\+0xc + 4c: R_MIPS_NONE \*ABS\*\+0xc + 4c: R_MIPS_NONE \*ABS\*\+0xc +0000000000000050 dca50000 ld a1,0\(a1\) + 50: R_MIPS_GOT_OFST dg1\+0xc + 50: R_MIPS_NONE \*ABS\*\+0xc + 50: R_MIPS_NONE \*ABS\*\+0xc +0000000000000054 df850000 ld a1,0\(gp\) + 54: R_MIPS_GOT_PAGE dg1 + 54: R_MIPS_NONE \*ABS\* + 54: R_MIPS_NONE \*ABS\* +0000000000000058 00b1282d daddu a1,a1,s1 +000000000000005c dca50000 ld a1,0\(a1\) + 5c: R_MIPS_GOT_OFST dg1 + 5c: R_MIPS_NONE \*ABS\* + 5c: R_MIPS_NONE \*ABS\* +0000000000000060 df850000 ld a1,0\(gp\) + 60: R_MIPS_GOT_PAGE dg1\+0xc + 60: R_MIPS_NONE \*ABS\*\+0xc + 60: R_MIPS_NONE \*ABS\*\+0xc +0000000000000064 00b1282d daddu a1,a1,s1 +0000000000000068 dca50000 ld a1,0\(a1\) + 68: R_MIPS_GOT_OFST dg1\+0xc + 68: R_MIPS_NONE \*ABS\*\+0xc + 68: R_MIPS_NONE \*ABS\*\+0xc +000000000000006c df810000 ld at,0\(gp\) + 6c: R_MIPS_GOT_PAGE dg1\+0x22 + 6c: R_MIPS_NONE \*ABS\*\+0x22 + 6c: R_MIPS_NONE \*ABS\*\+0x22 +0000000000000070 0025082d daddu at,at,a1 +0000000000000074 dc250000 ld a1,0\(at\) + 74: R_MIPS_GOT_OFST dg1\+0x22 + 74: R_MIPS_NONE \*ABS\*\+0x22 + 74: R_MIPS_NONE \*ABS\*\+0x22 +0000000000000078 df810000 ld at,0\(gp\) + 78: R_MIPS_GOT_PAGE dg1\+0x38 + 78: R_MIPS_NONE \*ABS\*\+0x38 + 78: R_MIPS_NONE \*ABS\*\+0x38 +000000000000007c 0025082d daddu at,at,a1 +0000000000000080 fc250000 sd a1,0\(at\) + 80: R_MIPS_GOT_OFST dg1\+0x38 + 80: R_MIPS_NONE \*ABS\*\+0x38 + 80: R_MIPS_NONE \*ABS\*\+0x38 +0000000000000084 df810000 ld at,0\(gp\) + 84: R_MIPS_GOT_DISP dg1 + 84: R_MIPS_NONE \*ABS\* + 84: R_MIPS_NONE \*ABS\* +0000000000000088 88250000 lwl a1,0\(at\) +000000000000008c 98250003 lwr a1,3\(at\) +0000000000000090 df810000 ld at,0\(gp\) + 90: R_MIPS_GOT_DISP dg1 + 90: R_MIPS_NONE \*ABS\* + 90: R_MIPS_NONE \*ABS\* +0000000000000094 6421000c daddiu at,at,12 +0000000000000098 88250000 lwl a1,0\(at\) +000000000000009c 98250003 lwr a1,3\(at\) +00000000000000a0 df810000 ld at,0\(gp\) + a0: R_MIPS_GOT_DISP dg1 + a0: R_MIPS_NONE \*ABS\* + a0: R_MIPS_NONE \*ABS\* +00000000000000a4 0031082d daddu at,at,s1 +00000000000000a8 88250000 lwl a1,0\(at\) +00000000000000ac 98250003 lwr a1,3\(at\) +00000000000000b0 df810000 ld at,0\(gp\) + b0: R_MIPS_GOT_DISP dg1 + b0: R_MIPS_NONE \*ABS\* + b0: R_MIPS_NONE \*ABS\* +00000000000000b4 6421000c daddiu at,at,12 +00000000000000b8 0031082d daddu at,at,s1 +00000000000000bc 88250000 lwl a1,0\(at\) +00000000000000c0 98250003 lwr a1,3\(at\) +00000000000000c4 df810000 ld at,0\(gp\) + c4: R_MIPS_GOT_DISP dg1 + c4: R_MIPS_NONE \*ABS\* + c4: R_MIPS_NONE \*ABS\* +00000000000000c8 64210022 daddiu at,at,34 +00000000000000cc 0025082d daddu at,at,a1 +00000000000000d0 88250000 lwl a1,0\(at\) +00000000000000d4 98250003 lwr a1,3\(at\) +00000000000000d8 df810000 ld at,0\(gp\) + d8: R_MIPS_GOT_DISP dg1 + d8: R_MIPS_NONE \*ABS\* + d8: R_MIPS_NONE \*ABS\* +00000000000000dc 64210038 daddiu at,at,56 +00000000000000e0 0025082d daddu at,at,a1 +00000000000000e4 a8250000 swl a1,0\(at\) +00000000000000e8 b8250003 swr a1,3\(at\) +00000000000000ec df850000 ld a1,0\(gp\) + ec: R_MIPS_GOT_DISP \.data\+0x3c + ec: R_MIPS_NONE \*ABS\*\+0x3c + ec: R_MIPS_NONE \*ABS\*\+0x3c +00000000000000f0 df850000 ld a1,0\(gp\) + f0: R_MIPS_GOT_DISP \.data\+0x48 + f0: R_MIPS_NONE \*ABS\*\+0x48 + f0: R_MIPS_NONE \*ABS\*\+0x48 +00000000000000f4 df850000 ld a1,0\(gp\) + f4: R_MIPS_GOT_DISP \.data\+0x1e27c + f4: R_MIPS_NONE \*ABS\*\+0x1e27c + f4: R_MIPS_NONE \*ABS\*\+0x1e27c +00000000000000f8 df850000 ld a1,0\(gp\) + f8: R_MIPS_GOT_DISP \.data\+0x3c + f8: R_MIPS_NONE \*ABS\*\+0x3c + f8: R_MIPS_NONE \*ABS\*\+0x3c +00000000000000fc 00b1282d daddu a1,a1,s1 +0000000000000100 df850000 ld a1,0\(gp\) + 100: R_MIPS_GOT_DISP \.data\+0x48 + 100: R_MIPS_NONE \*ABS\*\+0x48 + 100: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000104 00b1282d daddu a1,a1,s1 +0000000000000108 df850000 ld a1,0\(gp\) + 108: R_MIPS_GOT_DISP \.data\+0x1e27c + 108: R_MIPS_NONE \*ABS\*\+0x1e27c + 108: R_MIPS_NONE \*ABS\*\+0x1e27c +000000000000010c 00b1282d daddu a1,a1,s1 +0000000000000110 df850000 ld a1,0\(gp\) + 110: R_MIPS_GOT_PAGE \.data\+0x3c + 110: R_MIPS_NONE \*ABS\*\+0x3c + 110: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000114 dca50000 ld a1,0\(a1\) + 114: R_MIPS_GOT_OFST \.data\+0x3c + 114: R_MIPS_NONE \*ABS\*\+0x3c + 114: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000118 df850000 ld a1,0\(gp\) + 118: R_MIPS_GOT_PAGE \.data\+0x48 + 118: R_MIPS_NONE \*ABS\*\+0x48 + 118: R_MIPS_NONE \*ABS\*\+0x48 +000000000000011c dca50000 ld a1,0\(a1\) + 11c: R_MIPS_GOT_OFST \.data\+0x48 + 11c: R_MIPS_NONE \*ABS\*\+0x48 + 11c: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000120 df850000 ld a1,0\(gp\) + 120: R_MIPS_GOT_PAGE \.data\+0x3c + 120: R_MIPS_NONE \*ABS\*\+0x3c + 120: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000124 00b1282d daddu a1,a1,s1 +0000000000000128 dca50000 ld a1,0\(a1\) + 128: R_MIPS_GOT_OFST \.data\+0x3c + 128: R_MIPS_NONE \*ABS\*\+0x3c + 128: R_MIPS_NONE \*ABS\*\+0x3c +000000000000012c df850000 ld a1,0\(gp\) + 12c: R_MIPS_GOT_PAGE \.data\+0x48 + 12c: R_MIPS_NONE \*ABS\*\+0x48 + 12c: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000130 00b1282d daddu a1,a1,s1 +0000000000000134 dca50000 ld a1,0\(a1\) + 134: R_MIPS_GOT_OFST \.data\+0x48 + 134: R_MIPS_NONE \*ABS\*\+0x48 + 134: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000138 df810000 ld at,0\(gp\) + 138: R_MIPS_GOT_PAGE \.data\+0x5e + 138: R_MIPS_NONE \*ABS\*\+0x5e + 138: R_MIPS_NONE \*ABS\*\+0x5e +000000000000013c 0025082d daddu at,at,a1 +0000000000000140 dc250000 ld a1,0\(at\) + 140: R_MIPS_GOT_OFST \.data\+0x5e + 140: R_MIPS_NONE \*ABS\*\+0x5e + 140: R_MIPS_NONE \*ABS\*\+0x5e +0000000000000144 df810000 ld at,0\(gp\) + 144: R_MIPS_GOT_PAGE \.data\+0x74 + 144: R_MIPS_NONE \*ABS\*\+0x74 + 144: R_MIPS_NONE \*ABS\*\+0x74 +0000000000000148 0025082d daddu at,at,a1 +000000000000014c fc250000 sd a1,0\(at\) + 14c: R_MIPS_GOT_OFST \.data\+0x74 + 14c: R_MIPS_NONE \*ABS\*\+0x74 + 14c: R_MIPS_NONE \*ABS\*\+0x74 +0000000000000150 df810000 ld at,0\(gp\) + 150: R_MIPS_GOT_DISP \.data\+0x3c + 150: R_MIPS_NONE \*ABS\*\+0x3c + 150: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000154 88250000 lwl a1,0\(at\) +0000000000000158 98250003 lwr a1,3\(at\) +000000000000015c df810000 ld at,0\(gp\) + 15c: R_MIPS_GOT_DISP \.data\+0x48 + 15c: R_MIPS_NONE \*ABS\*\+0x48 + 15c: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000160 88250000 lwl a1,0\(at\) +0000000000000164 98250003 lwr a1,3\(at\) +0000000000000168 df810000 ld at,0\(gp\) + 168: R_MIPS_GOT_DISP \.data\+0x3c + 168: R_MIPS_NONE \*ABS\*\+0x3c + 168: R_MIPS_NONE \*ABS\*\+0x3c +000000000000016c 0031082d daddu at,at,s1 +0000000000000170 88250000 lwl a1,0\(at\) +0000000000000174 98250003 lwr a1,3\(at\) +0000000000000178 df810000 ld at,0\(gp\) + 178: R_MIPS_GOT_DISP \.data\+0x48 + 178: R_MIPS_NONE \*ABS\*\+0x48 + 178: R_MIPS_NONE \*ABS\*\+0x48 +000000000000017c 0031082d daddu at,at,s1 +0000000000000180 88250000 lwl a1,0\(at\) +0000000000000184 98250003 lwr a1,3\(at\) +0000000000000188 df810000 ld at,0\(gp\) + 188: R_MIPS_GOT_DISP \.data\+0x5e + 188: R_MIPS_NONE \*ABS\*\+0x5e + 188: R_MIPS_NONE \*ABS\*\+0x5e +000000000000018c 0025082d daddu at,at,a1 +0000000000000190 88250000 lwl a1,0\(at\) +0000000000000194 98250003 lwr a1,3\(at\) +0000000000000198 df810000 ld at,0\(gp\) + 198: R_MIPS_GOT_DISP \.data\+0x74 + 198: R_MIPS_NONE \*ABS\*\+0x74 + 198: R_MIPS_NONE \*ABS\*\+0x74 +000000000000019c 0025082d daddu at,at,a1 +00000000000001a0 a8250000 swl a1,0\(at\) +00000000000001a4 b8250003 swr a1,3\(at\) +00000000000001a8 df850000 ld a1,0\(gp\) + 1a8: R_MIPS_GOT_DISP fn + 1a8: R_MIPS_NONE \*ABS\* + 1a8: R_MIPS_NONE \*ABS\* +00000000000001ac df850000 ld a1,0\(gp\) + 1ac: R_MIPS_GOT_DISP \.text + 1ac: R_MIPS_NONE \*ABS\* + 1ac: R_MIPS_NONE \*ABS\* +00000000000001b0 df990000 ld t9,0\(gp\) + 1b0: R_MIPS_CALL16 fn + 1b0: R_MIPS_NONE \*ABS\* + 1b0: R_MIPS_NONE \*ABS\* +00000000000001b4 df990000 ld t9,0\(gp\) + 1b4: R_MIPS_GOT_DISP \.text + 1b4: R_MIPS_NONE \*ABS\* + 1b4: R_MIPS_NONE \*ABS\* +00000000000001b8 df990000 ld t9,0\(gp\) + 1b8: R_MIPS_CALL16 fn + 1b8: R_MIPS_NONE \*ABS\* + 1b8: R_MIPS_NONE \*ABS\* +00000000000001bc 0320f809 jalr t9 + 1bc: R_MIPS_JALR fn + 1bc: R_MIPS_NONE \*ABS\* + 1bc: R_MIPS_NONE \*ABS\* +00000000000001c0 00000000 nop +00000000000001c4 df990000 ld t9,0\(gp\) + 1c4: R_MIPS_GOT_DISP \.text + 1c4: R_MIPS_NONE \*ABS\* + 1c4: R_MIPS_NONE \*ABS\* +00000000000001c8 0320f809 jalr t9 + 1c8: R_MIPS_JALR \.text + 1c8: R_MIPS_NONE \*ABS\* + 1c8: R_MIPS_NONE \*ABS\* +00000000000001cc 00000000 nop +00000000000001d0 df850000 ld a1,0\(gp\) + 1d0: R_MIPS_GOT_DISP dg2 + 1d0: R_MIPS_NONE \*ABS\* + 1d0: R_MIPS_NONE \*ABS\* +00000000000001d4 df850000 ld a1,0\(gp\) + 1d4: R_MIPS_GOT_DISP dg2 + 1d4: R_MIPS_NONE \*ABS\* + 1d4: R_MIPS_NONE \*ABS\* +00000000000001d8 64a5000c daddiu a1,a1,12 +00000000000001dc df850000 ld a1,0\(gp\) + 1dc: R_MIPS_GOT_DISP dg2 + 1dc: R_MIPS_NONE \*ABS\* + 1dc: R_MIPS_NONE \*ABS\* +00000000000001e0 3c010002 lui at,0x2 +00000000000001e4 6421e240 daddiu at,at,-7616 +00000000000001e8 00a1282d daddu a1,a1,at +00000000000001ec df850000 ld a1,0\(gp\) + 1ec: R_MIPS_GOT_DISP dg2 + 1ec: R_MIPS_NONE \*ABS\* + 1ec: R_MIPS_NONE \*ABS\* +00000000000001f0 00b1282d daddu a1,a1,s1 +00000000000001f4 df850000 ld a1,0\(gp\) + 1f4: R_MIPS_GOT_DISP dg2 + 1f4: R_MIPS_NONE \*ABS\* + 1f4: R_MIPS_NONE \*ABS\* +00000000000001f8 64a5000c daddiu a1,a1,12 +00000000000001fc 00b1282d daddu a1,a1,s1 +0000000000000200 df850000 ld a1,0\(gp\) + 200: R_MIPS_GOT_DISP dg2 + 200: R_MIPS_NONE \*ABS\* + 200: R_MIPS_NONE \*ABS\* +0000000000000204 3c010002 lui at,0x2 +0000000000000208 6421e240 daddiu at,at,-7616 +000000000000020c 00a1282d daddu a1,a1,at +0000000000000210 00b1282d daddu a1,a1,s1 +0000000000000214 df850000 ld a1,0\(gp\) + 214: R_MIPS_GOT_PAGE dg2 + 214: R_MIPS_NONE \*ABS\* + 214: R_MIPS_NONE \*ABS\* +0000000000000218 dca50000 ld a1,0\(a1\) + 218: R_MIPS_GOT_OFST dg2 + 218: R_MIPS_NONE \*ABS\* + 218: R_MIPS_NONE \*ABS\* +000000000000021c df850000 ld a1,0\(gp\) + 21c: R_MIPS_GOT_PAGE dg2\+0xc + 21c: R_MIPS_NONE \*ABS\*\+0xc + 21c: R_MIPS_NONE \*ABS\*\+0xc +0000000000000220 dca50000 ld a1,0\(a1\) + 220: R_MIPS_GOT_OFST dg2\+0xc + 220: R_MIPS_NONE \*ABS\*\+0xc + 220: R_MIPS_NONE \*ABS\*\+0xc +0000000000000224 df850000 ld a1,0\(gp\) + 224: R_MIPS_GOT_PAGE dg2 + 224: R_MIPS_NONE \*ABS\* + 224: R_MIPS_NONE \*ABS\* +0000000000000228 00b1282d daddu a1,a1,s1 +000000000000022c dca50000 ld a1,0\(a1\) + 22c: R_MIPS_GOT_OFST dg2 + 22c: R_MIPS_NONE \*ABS\* + 22c: R_MIPS_NONE \*ABS\* +0000000000000230 df850000 ld a1,0\(gp\) + 230: R_MIPS_GOT_PAGE dg2\+0xc + 230: R_MIPS_NONE \*ABS\*\+0xc + 230: R_MIPS_NONE \*ABS\*\+0xc +0000000000000234 00b1282d daddu a1,a1,s1 +0000000000000238 dca50000 ld a1,0\(a1\) + 238: R_MIPS_GOT_OFST dg2\+0xc + 238: R_MIPS_NONE \*ABS\*\+0xc + 238: R_MIPS_NONE \*ABS\*\+0xc +000000000000023c df810000 ld at,0\(gp\) + 23c: R_MIPS_GOT_PAGE dg2\+0x22 + 23c: R_MIPS_NONE \*ABS\*\+0x22 + 23c: R_MIPS_NONE \*ABS\*\+0x22 +0000000000000240 0025082d daddu at,at,a1 +0000000000000244 dc250000 ld a1,0\(at\) + 244: R_MIPS_GOT_OFST dg2\+0x22 + 244: R_MIPS_NONE \*ABS\*\+0x22 + 244: R_MIPS_NONE \*ABS\*\+0x22 +0000000000000248 df810000 ld at,0\(gp\) + 248: R_MIPS_GOT_PAGE dg2\+0x38 + 248: R_MIPS_NONE \*ABS\*\+0x38 + 248: R_MIPS_NONE \*ABS\*\+0x38 +000000000000024c 0025082d daddu at,at,a1 +0000000000000250 fc250000 sd a1,0\(at\) + 250: R_MIPS_GOT_OFST dg2\+0x38 + 250: R_MIPS_NONE \*ABS\*\+0x38 + 250: R_MIPS_NONE \*ABS\*\+0x38 +0000000000000254 df810000 ld at,0\(gp\) + 254: R_MIPS_GOT_DISP dg2 + 254: R_MIPS_NONE \*ABS\* + 254: R_MIPS_NONE \*ABS\* +0000000000000258 88250000 lwl a1,0\(at\) +000000000000025c 98250003 lwr a1,3\(at\) +0000000000000260 df810000 ld at,0\(gp\) + 260: R_MIPS_GOT_DISP dg2 + 260: R_MIPS_NONE \*ABS\* + 260: R_MIPS_NONE \*ABS\* +0000000000000264 6421000c daddiu at,at,12 +0000000000000268 88250000 lwl a1,0\(at\) +000000000000026c 98250003 lwr a1,3\(at\) +0000000000000270 df810000 ld at,0\(gp\) + 270: R_MIPS_GOT_DISP dg2 + 270: R_MIPS_NONE \*ABS\* + 270: R_MIPS_NONE \*ABS\* +0000000000000274 0031082d daddu at,at,s1 +0000000000000278 88250000 lwl a1,0\(at\) +000000000000027c 98250003 lwr a1,3\(at\) +0000000000000280 df810000 ld at,0\(gp\) + 280: R_MIPS_GOT_DISP dg2 + 280: R_MIPS_NONE \*ABS\* + 280: R_MIPS_NONE \*ABS\* +0000000000000284 6421000c daddiu at,at,12 +0000000000000288 0031082d daddu at,at,s1 +000000000000028c 88250000 lwl a1,0\(at\) +0000000000000290 98250003 lwr a1,3\(at\) +0000000000000294 df810000 ld at,0\(gp\) + 294: R_MIPS_GOT_DISP dg2 + 294: R_MIPS_NONE \*ABS\* + 294: R_MIPS_NONE \*ABS\* +0000000000000298 64210022 daddiu at,at,34 +000000000000029c 0025082d daddu at,at,a1 +00000000000002a0 88250000 lwl a1,0\(at\) +00000000000002a4 98250003 lwr a1,3\(at\) +00000000000002a8 df810000 ld at,0\(gp\) + 2a8: R_MIPS_GOT_DISP dg2 + 2a8: R_MIPS_NONE \*ABS\* + 2a8: R_MIPS_NONE \*ABS\* +00000000000002ac 64210038 daddiu at,at,56 +00000000000002b0 0025082d daddu at,at,a1 +00000000000002b4 a8250000 swl a1,0\(at\) +00000000000002b8 b8250003 swr a1,3\(at\) +00000000000002bc df850000 ld a1,0\(gp\) + 2bc: R_MIPS_GOT_DISP \.data\+0xb4 + 2bc: R_MIPS_NONE \*ABS\*\+0xb4 + 2bc: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000002c0 df850000 ld a1,0\(gp\) + 2c0: R_MIPS_GOT_DISP \.data\+0xc0 + 2c0: R_MIPS_NONE \*ABS\*\+0xc0 + 2c0: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000002c4 df850000 ld a1,0\(gp\) + 2c4: R_MIPS_GOT_DISP \.data\+0x1e2f4 + 2c4: R_MIPS_NONE \*ABS\*\+0x1e2f4 + 2c4: R_MIPS_NONE \*ABS\*\+0x1e2f4 +00000000000002c8 df850000 ld a1,0\(gp\) + 2c8: R_MIPS_GOT_DISP \.data\+0xb4 + 2c8: R_MIPS_NONE \*ABS\*\+0xb4 + 2c8: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000002cc 00b1282d daddu a1,a1,s1 +00000000000002d0 df850000 ld a1,0\(gp\) + 2d0: R_MIPS_GOT_DISP \.data\+0xc0 + 2d0: R_MIPS_NONE \*ABS\*\+0xc0 + 2d0: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000002d4 00b1282d daddu a1,a1,s1 +00000000000002d8 df850000 ld a1,0\(gp\) + 2d8: R_MIPS_GOT_DISP \.data\+0x1e2f4 + 2d8: R_MIPS_NONE \*ABS\*\+0x1e2f4 + 2d8: R_MIPS_NONE \*ABS\*\+0x1e2f4 +00000000000002dc 00b1282d daddu a1,a1,s1 +00000000000002e0 df850000 ld a1,0\(gp\) + 2e0: R_MIPS_GOT_PAGE \.data\+0xb4 + 2e0: R_MIPS_NONE \*ABS\*\+0xb4 + 2e0: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000002e4 dca50000 ld a1,0\(a1\) + 2e4: R_MIPS_GOT_OFST \.data\+0xb4 + 2e4: R_MIPS_NONE \*ABS\*\+0xb4 + 2e4: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000002e8 df850000 ld a1,0\(gp\) + 2e8: R_MIPS_GOT_PAGE \.data\+0xc0 + 2e8: R_MIPS_NONE \*ABS\*\+0xc0 + 2e8: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000002ec dca50000 ld a1,0\(a1\) + 2ec: R_MIPS_GOT_OFST \.data\+0xc0 + 2ec: R_MIPS_NONE \*ABS\*\+0xc0 + 2ec: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000002f0 df850000 ld a1,0\(gp\) + 2f0: R_MIPS_GOT_PAGE \.data\+0xb4 + 2f0: R_MIPS_NONE \*ABS\*\+0xb4 + 2f0: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000002f4 00b1282d daddu a1,a1,s1 +00000000000002f8 dca50000 ld a1,0\(a1\) + 2f8: R_MIPS_GOT_OFST \.data\+0xb4 + 2f8: R_MIPS_NONE \*ABS\*\+0xb4 + 2f8: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000002fc df850000 ld a1,0\(gp\) + 2fc: R_MIPS_GOT_PAGE \.data\+0xc0 + 2fc: R_MIPS_NONE \*ABS\*\+0xc0 + 2fc: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000300 00b1282d daddu a1,a1,s1 +0000000000000304 dca50000 ld a1,0\(a1\) + 304: R_MIPS_GOT_OFST \.data\+0xc0 + 304: R_MIPS_NONE \*ABS\*\+0xc0 + 304: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000308 df810000 ld at,0\(gp\) + 308: R_MIPS_GOT_PAGE \.data\+0xd6 + 308: R_MIPS_NONE \*ABS\*\+0xd6 + 308: R_MIPS_NONE \*ABS\*\+0xd6 +000000000000030c 0025082d daddu at,at,a1 +0000000000000310 dc250000 ld a1,0\(at\) + 310: R_MIPS_GOT_OFST \.data\+0xd6 + 310: R_MIPS_NONE \*ABS\*\+0xd6 + 310: R_MIPS_NONE \*ABS\*\+0xd6 +0000000000000314 df810000 ld at,0\(gp\) + 314: R_MIPS_GOT_PAGE \.data\+0xec + 314: R_MIPS_NONE \*ABS\*\+0xec + 314: R_MIPS_NONE \*ABS\*\+0xec +0000000000000318 0025082d daddu at,at,a1 +000000000000031c fc250000 sd a1,0\(at\) + 31c: R_MIPS_GOT_OFST \.data\+0xec + 31c: R_MIPS_NONE \*ABS\*\+0xec + 31c: R_MIPS_NONE \*ABS\*\+0xec +0000000000000320 df810000 ld at,0\(gp\) + 320: R_MIPS_GOT_DISP \.data\+0xb4 + 320: R_MIPS_NONE \*ABS\*\+0xb4 + 320: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000324 88250000 lwl a1,0\(at\) +0000000000000328 98250003 lwr a1,3\(at\) +000000000000032c df810000 ld at,0\(gp\) + 32c: R_MIPS_GOT_DISP \.data\+0xc0 + 32c: R_MIPS_NONE \*ABS\*\+0xc0 + 32c: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000330 88250000 lwl a1,0\(at\) +0000000000000334 98250003 lwr a1,3\(at\) +0000000000000338 df810000 ld at,0\(gp\) + 338: R_MIPS_GOT_DISP \.data\+0xb4 + 338: R_MIPS_NONE \*ABS\*\+0xb4 + 338: R_MIPS_NONE \*ABS\*\+0xb4 +000000000000033c 0031082d daddu at,at,s1 +0000000000000340 88250000 lwl a1,0\(at\) +0000000000000344 98250003 lwr a1,3\(at\) +0000000000000348 df810000 ld at,0\(gp\) + 348: R_MIPS_GOT_DISP \.data\+0xc0 + 348: R_MIPS_NONE \*ABS\*\+0xc0 + 348: R_MIPS_NONE \*ABS\*\+0xc0 +000000000000034c 0031082d daddu at,at,s1 +0000000000000350 88250000 lwl a1,0\(at\) +0000000000000354 98250003 lwr a1,3\(at\) +0000000000000358 df810000 ld at,0\(gp\) + 358: R_MIPS_GOT_DISP \.data\+0xd6 + 358: R_MIPS_NONE \*ABS\*\+0xd6 + 358: R_MIPS_NONE \*ABS\*\+0xd6 +000000000000035c 0025082d daddu at,at,a1 +0000000000000360 88250000 lwl a1,0\(at\) +0000000000000364 98250003 lwr a1,3\(at\) +0000000000000368 df810000 ld at,0\(gp\) + 368: R_MIPS_GOT_DISP \.data\+0xec + 368: R_MIPS_NONE \*ABS\*\+0xec + 368: R_MIPS_NONE \*ABS\*\+0xec +000000000000036c 0025082d daddu at,at,a1 +0000000000000370 a8250000 swl a1,0\(at\) +0000000000000374 b8250003 swr a1,3\(at\) +0000000000000378 df850000 ld a1,0\(gp\) + 378: R_MIPS_GOT_DISP fn2 + 378: R_MIPS_NONE \*ABS\* + 378: R_MIPS_NONE \*ABS\* +000000000000037c df850000 ld a1,0\(gp\) + 37c: R_MIPS_GOT_DISP \.text\+0x404 + 37c: R_MIPS_NONE \*ABS\*\+0x404 + 37c: R_MIPS_NONE \*ABS\*\+0x404 +0000000000000380 df990000 ld t9,0\(gp\) + 380: R_MIPS_CALL16 fn2 + 380: R_MIPS_NONE \*ABS\* + 380: R_MIPS_NONE \*ABS\* +0000000000000384 df990000 ld t9,0\(gp\) + 384: R_MIPS_GOT_DISP \.text\+0x404 + 384: R_MIPS_NONE \*ABS\*\+0x404 + 384: R_MIPS_NONE \*ABS\*\+0x404 +0000000000000388 df990000 ld t9,0\(gp\) + 388: R_MIPS_CALL16 fn2 + 388: R_MIPS_NONE \*ABS\* + 388: R_MIPS_NONE \*ABS\* +000000000000038c 0320f809 jalr t9 + 38c: R_MIPS_JALR fn2 + 38c: R_MIPS_NONE \*ABS\* + 38c: R_MIPS_NONE \*ABS\* +0000000000000390 00000000 nop +0000000000000394 df990000 ld t9,0\(gp\) + 394: R_MIPS_GOT_DISP \.text\+0x404 + 394: R_MIPS_NONE \*ABS\*\+0x404 + 394: R_MIPS_NONE \*ABS\*\+0x404 +0000000000000398 0320f809 jalr t9 + 398: R_MIPS_JALR \.text\+0x404 + 398: R_MIPS_NONE \*ABS\*\+0x404 + 398: R_MIPS_NONE \*ABS\*\+0x404 +000000000000039c 00000000 nop +00000000000003a0 1000ff17 b 0000000000000000 +00000000000003a4 df850000 ld a1,0\(gp\) + 3a4: R_MIPS_GOT_DISP dg1 + 3a4: R_MIPS_NONE \*ABS\* + 3a4: R_MIPS_NONE \*ABS\* +00000000000003a8 df850000 ld a1,0\(gp\) + 3a8: R_MIPS_GOT_PAGE dg2 + 3a8: R_MIPS_NONE \*ABS\* + 3a8: R_MIPS_NONE \*ABS\* +00000000000003ac 10000015 b 0000000000000404 +00000000000003b0 dca50000 ld a1,0\(a1\) + 3b0: R_MIPS_GOT_OFST dg2 + 3b0: R_MIPS_NONE \*ABS\* + 3b0: R_MIPS_NONE \*ABS\* +00000000000003b4 1000ff12 b 0000000000000000 +00000000000003b8 df850000 ld a1,0\(gp\) + 3b8: R_MIPS_GOT_DISP \.data\+0x3c + 3b8: R_MIPS_NONE \*ABS\*\+0x3c + 3b8: R_MIPS_NONE \*ABS\*\+0x3c +00000000000003bc df850000 ld a1,0\(gp\) + 3bc: R_MIPS_GOT_DISP \.data\+0xc0 + 3bc: R_MIPS_NONE \*ABS\*\+0xc0 + 3bc: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000003c0 10000010 b 0000000000000404 +00000000000003c4 00000000 nop +00000000000003c8 df850000 ld a1,0\(gp\) + 3c8: R_MIPS_GOT_DISP \.data\+0x1e27c + 3c8: R_MIPS_NONE \*ABS\*\+0x1e27c + 3c8: R_MIPS_NONE \*ABS\*\+0x1e27c +00000000000003cc 1000ff0c b 0000000000000000 +00000000000003d0 00000000 nop +00000000000003d4 df850000 ld a1,0\(gp\) + 3d4: R_MIPS_GOT_PAGE \.data\+0xb4 + 3d4: R_MIPS_NONE \*ABS\*\+0xb4 + 3d4: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000003d8 1000000a b 0000000000000404 +00000000000003dc dca50000 ld a1,0\(a1\) + 3dc: R_MIPS_GOT_OFST \.data\+0xb4 + 3dc: R_MIPS_NONE \*ABS\*\+0xb4 + 3dc: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000003e0 df850000 ld a1,0\(gp\) + 3e0: R_MIPS_GOT_PAGE \.data\+0x48 + 3e0: R_MIPS_NONE \*ABS\*\+0x48 + 3e0: R_MIPS_NONE \*ABS\*\+0x48 +00000000000003e4 1000ff06 b 0000000000000000 +00000000000003e8 dca50000 ld a1,0\(a1\) + 3e8: R_MIPS_GOT_OFST \.data\+0x48 + 3e8: R_MIPS_NONE \*ABS\*\+0x48 + 3e8: R_MIPS_NONE \*ABS\*\+0x48 +00000000000003ec df810000 ld at,0\(gp\) + 3ec: R_MIPS_GOT_PAGE \.data\+0xd6 + 3ec: R_MIPS_NONE \*ABS\*\+0xd6 + 3ec: R_MIPS_NONE \*ABS\*\+0xd6 +00000000000003f0 0025082d daddu at,at,a1 +00000000000003f4 10000003 b 0000000000000404 +00000000000003f8 dc250000 ld a1,0\(at\) + 3f8: R_MIPS_GOT_OFST \.data\+0xd6 + 3f8: R_MIPS_NONE \*ABS\*\+0xd6 + 3f8: R_MIPS_NONE \*ABS\*\+0xd6 + \.\.\. + \.\.\. Index: gas/testsuite/gas/mips/elf-rel-got-n64.s =================================================================== RCS file: gas/testsuite/gas/mips/elf-rel-got-n64.s diff -N gas/testsuite/gas/mips/elf-rel-got-n64.s --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ gas/testsuite/gas/mips/elf-rel-got-n64.s 8 Apr 2003 10:02:27 -0000 @@ -0,0 +1,162 @@ +# MIPS ELF GOT reloc n64 + + .data + .align 3 +sp1: + .space 60 + .globl dg1 +dg1: +dl1: + .space 60 + + + .text + + .globl fn + .ent fn + .type fn,@function +fn: +.Lfn: + dla $5,dg1+0 + dla $5,dg1+12 + dla $5,dg1+123456 + dla $5,dg1+0($17) + dla $5,dg1+12($17) + dla $5,dg1+123456($17) + + ld $5,dg1+0 + ld $5,dg1+12 + ld $5,dg1+0($17) + ld $5,dg1+12($17) + ld $5,dg1+34($5) + sd $5,dg1+56($5) + + ulw $5,dg1+0 + ulw $5,dg1+12 + ulw $5,dg1+0($17) + ulw $5,dg1+12($17) + ulw $5,dg1+34($5) + usw $5,dg1+56($5) + + dla $5,dl1+0 + dla $5,dl1+12 + dla $5,dl1+123456 + dla $5,dl1+0($17) + dla $5,dl1+12($17) + dla $5,dl1+123456($17) + + ld $5,dl1+0 + ld $5,dl1+12 + ld $5,dl1+0($17) + ld $5,dl1+12($17) + ld $5,dl1+34($5) + sd $5,dl1+56($5) + + ulw $5,dl1+0 + ulw $5,dl1+12 + ulw $5,dl1+0($17) + ulw $5,dl1+12($17) + ulw $5,dl1+34($5) + usw $5,dl1+56($5) + + dla $5,fn + dla $5,.Lfn + dla $25,fn + dla $25,.Lfn + jal fn + jal .Lfn + + + dla $5,dg2+0 + dla $5,dg2+12 + dla $5,dg2+123456 + dla $5,dg2+0($17) + dla $5,dg2+12($17) + dla $5,dg2+123456($17) + + ld $5,dg2+0 + ld $5,dg2+12 + ld $5,dg2+0($17) + ld $5,dg2+12($17) + ld $5,dg2+34($5) + sd $5,dg2+56($5) + + ulw $5,dg2+0 + ulw $5,dg2+12 + ulw $5,dg2+0($17) + ulw $5,dg2+12($17) + ulw $5,dg2+34($5) + usw $5,dg2+56($5) + + dla $5,dl2+0 + dla $5,dl2+12 + dla $5,dl2+123456 + dla $5,dl2+0($17) + dla $5,dl2+12($17) + dla $5,dl2+123456($17) + + ld $5,dl2+0 + ld $5,dl2+12 + ld $5,dl2+0($17) + ld $5,dl2+12($17) + ld $5,dl2+34($5) + sd $5,dl2+56($5) + + ulw $5,dl2+0 + ulw $5,dl2+12 + ulw $5,dl2+0($17) + ulw $5,dl2+12($17) + ulw $5,dl2+34($5) + usw $5,dl2+56($5) + + dla $5,fn2 + dla $5,.Lfn2 + dla $25,fn2 + dla $25,.Lfn2 + jal fn2 + jal .Lfn2 + +# Check that filling delay slots doesn't break our relocations. + + dla $5,dg1 + b .Lfn + ld $5,dg2 + b .Lfn2 + + dla $5,dl1 + b .Lfn + dla $5,dl2+12 + b .Lfn2 + dla $5,dl1+123456 + b .Lfn + + ld $5,dl2 + b .Lfn2 + ld $5,dl1+12 + b .Lfn + ld $5,dl2+34($5) + b .Lfn2 + +# Force at least 8 (non-deddlay-slot) zero bytes, to make 'objdump' print ... + .space 8 + + .end fn + + .globl fn2 + .ent fn2 + .type fn2,@function +fn2: +.Lfn2: + .end fn2 + + .globl __start +__start: + + .data + .align 3 +sp2: + .space 60 + .globl dg2 +dg2: +dl2: + .space 60 Index: gas/testsuite/gas/mips/elf-rel-xgot-n32.d =================================================================== RCS file: gas/testsuite/gas/mips/elf-rel-xgot-n32.d diff -N gas/testsuite/gas/mips/elf-rel-xgot-n32.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ gas/testsuite/gas/mips/elf-rel-xgot-n32.d 8 Apr 2003 10:02:28 -0000 @@ -0,0 +1,579 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ELF xgot reloc n32 +#as: -n32 -KPIC -xgot +#source: elf-rel-got-n32.s + +.*: +file format elf32-n.*mips.* + +Disassembly of section \.text: +00000000 3c050000 lui a1,0x0 + 0: R_MIPS_GOT_HI16 dg1 +00000004 00bc2820 add a1,a1,gp +00000008 8ca50000 lw a1,0\(a1\) + 8: R_MIPS_GOT_LO16 dg1 +0000000c 3c050000 lui a1,0x0 + c: R_MIPS_GOT_HI16 dg1 +00000010 00bc2820 add a1,a1,gp +00000014 8ca50000 lw a1,0\(a1\) + 14: R_MIPS_GOT_LO16 dg1 +00000018 20a5000c addi a1,a1,12 +0000001c 3c050000 lui a1,0x0 + 1c: R_MIPS_GOT_HI16 dg1 +00000020 00bc2820 add a1,a1,gp +00000024 8ca50000 lw a1,0\(a1\) + 24: R_MIPS_GOT_LO16 dg1 +00000028 3c010002 lui at,0x2 +0000002c 2021e240 addi at,at,-7616 +00000030 00a12820 add a1,a1,at +00000034 3c050000 lui a1,0x0 + 34: R_MIPS_GOT_HI16 dg1 +00000038 00bc2820 add a1,a1,gp +0000003c 8ca50000 lw a1,0\(a1\) + 3c: R_MIPS_GOT_LO16 dg1 +00000040 00b12820 add a1,a1,s1 +00000044 3c050000 lui a1,0x0 + 44: R_MIPS_GOT_HI16 dg1 +00000048 00bc2820 add a1,a1,gp +0000004c 8ca50000 lw a1,0\(a1\) + 4c: R_MIPS_GOT_LO16 dg1 +00000050 20a5000c addi a1,a1,12 +00000054 00b12820 add a1,a1,s1 +00000058 3c050000 lui a1,0x0 + 58: R_MIPS_GOT_HI16 dg1 +0000005c 00bc2820 add a1,a1,gp +00000060 8ca50000 lw a1,0\(a1\) + 60: R_MIPS_GOT_LO16 dg1 +00000064 3c010002 lui at,0x2 +00000068 2021e240 addi at,at,-7616 +0000006c 00a12820 add a1,a1,at +00000070 00b12820 add a1,a1,s1 +00000074 3c050000 lui a1,0x0 + 74: R_MIPS_GOT_HI16 dg1 +00000078 00bc2820 add a1,a1,gp +0000007c 8ca50000 lw a1,0\(a1\) + 7c: R_MIPS_GOT_LO16 dg1 +00000080 8ca50000 lw a1,0\(a1\) +00000084 3c050000 lui a1,0x0 + 84: R_MIPS_GOT_HI16 dg1 +00000088 00bc2820 add a1,a1,gp +0000008c 8ca50000 lw a1,0\(a1\) + 8c: R_MIPS_GOT_LO16 dg1 +00000090 8ca5000c lw a1,12\(a1\) +00000094 3c050000 lui a1,0x0 + 94: R_MIPS_GOT_HI16 dg1 +00000098 00bc2820 add a1,a1,gp +0000009c 8ca50000 lw a1,0\(a1\) + 9c: R_MIPS_GOT_LO16 dg1 +000000a0 00b12820 add a1,a1,s1 +000000a4 8ca50000 lw a1,0\(a1\) +000000a8 3c050000 lui a1,0x0 + a8: R_MIPS_GOT_HI16 dg1 +000000ac 00bc2820 add a1,a1,gp +000000b0 8ca50000 lw a1,0\(a1\) + b0: R_MIPS_GOT_LO16 dg1 +000000b4 00b12820 add a1,a1,s1 +000000b8 8ca5000c lw a1,12\(a1\) +000000bc 3c010000 lui at,0x0 + bc: R_MIPS_GOT_HI16 dg1 +000000c0 003c0820 add at,at,gp +000000c4 8c210000 lw at,0\(at\) + c4: R_MIPS_GOT_LO16 dg1 +000000c8 00250820 add at,at,a1 +000000cc 8c250022 lw a1,34\(at\) +000000d0 3c010000 lui at,0x0 + d0: R_MIPS_GOT_HI16 dg1 +000000d4 003c0820 add at,at,gp +000000d8 8c210000 lw at,0\(at\) + d8: R_MIPS_GOT_LO16 dg1 +000000dc 00250820 add at,at,a1 +000000e0 ac250038 sw a1,56\(at\) +000000e4 3c010000 lui at,0x0 + e4: R_MIPS_GOT_HI16 dg1 +000000e8 003c0820 add at,at,gp +000000ec 8c210000 lw at,0\(at\) + ec: R_MIPS_GOT_LO16 dg1 +000000f0 88250000 lwl a1,0\(at\) +000000f4 98250003 lwr a1,3\(at\) +000000f8 3c010000 lui at,0x0 + f8: R_MIPS_GOT_HI16 dg1 +000000fc 003c0820 add at,at,gp +00000100 8c210000 lw at,0\(at\) + 100: R_MIPS_GOT_LO16 dg1 +00000104 2021000c addi at,at,12 +00000108 88250000 lwl a1,0\(at\) +0000010c 98250003 lwr a1,3\(at\) +00000110 3c010000 lui at,0x0 + 110: R_MIPS_GOT_HI16 dg1 +00000114 003c0820 add at,at,gp +00000118 8c210000 lw at,0\(at\) + 118: R_MIPS_GOT_LO16 dg1 +0000011c 00310820 add at,at,s1 +00000120 88250000 lwl a1,0\(at\) +00000124 98250003 lwr a1,3\(at\) +00000128 3c010000 lui at,0x0 + 128: R_MIPS_GOT_HI16 dg1 +0000012c 003c0820 add at,at,gp +00000130 8c210000 lw at,0\(at\) + 130: R_MIPS_GOT_LO16 dg1 +00000134 2021000c addi at,at,12 +00000138 00310820 add at,at,s1 +0000013c 88250000 lwl a1,0\(at\) +00000140 98250003 lwr a1,3\(at\) +00000144 3c010000 lui at,0x0 + 144: R_MIPS_GOT_HI16 dg1 +00000148 003c0820 add at,at,gp +0000014c 8c210000 lw at,0\(at\) + 14c: R_MIPS_GOT_LO16 dg1 +00000150 20210022 addi at,at,34 +00000154 00250820 add at,at,a1 +00000158 88250000 lwl a1,0\(at\) +0000015c 98250003 lwr a1,3\(at\) +00000160 3c010000 lui at,0x0 + 160: R_MIPS_GOT_HI16 dg1 +00000164 003c0820 add at,at,gp +00000168 8c210000 lw at,0\(at\) + 168: R_MIPS_GOT_LO16 dg1 +0000016c 20210038 addi at,at,56 +00000170 00250820 add at,at,a1 +00000174 a8250000 swl a1,0\(at\) +00000178 b8250003 swr a1,3\(at\) +0000017c 8f850000 lw a1,0\(gp\) + 17c: R_MIPS_GOT_PAGE \.data\+0x3c +00000180 20a50000 addi a1,a1,0 + 180: R_MIPS_GOT_OFST \.data\+0x3c +00000184 8f850000 lw a1,0\(gp\) + 184: R_MIPS_GOT_PAGE \.data\+0x48 +00000188 20a50000 addi a1,a1,0 + 188: R_MIPS_GOT_OFST \.data\+0x48 +0000018c 8f850000 lw a1,0\(gp\) + 18c: R_MIPS_GOT_PAGE \.data\+0x1e27c +00000190 20a50000 addi a1,a1,0 + 190: R_MIPS_GOT_OFST \.data\+0x1e27c +00000194 8f850000 lw a1,0\(gp\) + 194: R_MIPS_GOT_PAGE \.data\+0x3c +00000198 20a50000 addi a1,a1,0 + 198: R_MIPS_GOT_OFST \.data\+0x3c +0000019c 00b12820 add a1,a1,s1 +000001a0 8f850000 lw a1,0\(gp\) + 1a0: R_MIPS_GOT_PAGE \.data\+0x48 +000001a4 20a50000 addi a1,a1,0 + 1a4: R_MIPS_GOT_OFST \.data\+0x48 +000001a8 00b12820 add a1,a1,s1 +000001ac 8f850000 lw a1,0\(gp\) + 1ac: R_MIPS_GOT_PAGE \.data\+0x1e27c +000001b0 20a50000 addi a1,a1,0 + 1b0: R_MIPS_GOT_OFST \.data\+0x1e27c +000001b4 00b12820 add a1,a1,s1 +000001b8 8f850000 lw a1,0\(gp\) + 1b8: R_MIPS_GOT_PAGE \.data\+0x3c +000001bc 8ca50000 lw a1,0\(a1\) + 1bc: R_MIPS_GOT_OFST \.data\+0x3c +000001c0 8f850000 lw a1,0\(gp\) + 1c0: R_MIPS_GOT_PAGE \.data\+0x48 +000001c4 8ca50000 lw a1,0\(a1\) + 1c4: R_MIPS_GOT_OFST \.data\+0x48 +000001c8 8f850000 lw a1,0\(gp\) + 1c8: R_MIPS_GOT_PAGE \.data\+0x3c +000001cc 00b12820 add a1,a1,s1 +000001d0 8ca50000 lw a1,0\(a1\) + 1d0: R_MIPS_GOT_OFST \.data\+0x3c +000001d4 8f850000 lw a1,0\(gp\) + 1d4: R_MIPS_GOT_PAGE \.data\+0x48 +000001d8 00b12820 add a1,a1,s1 +000001dc 8ca50000 lw a1,0\(a1\) + 1dc: R_MIPS_GOT_OFST \.data\+0x48 +000001e0 8f810000 lw at,0\(gp\) + 1e0: R_MIPS_GOT_PAGE \.data\+0x5e +000001e4 00250820 add at,at,a1 +000001e8 8c250000 lw a1,0\(at\) + 1e8: R_MIPS_GOT_OFST \.data\+0x5e +000001ec 8f810000 lw at,0\(gp\) + 1ec: R_MIPS_GOT_PAGE \.data\+0x74 +000001f0 00250820 add at,at,a1 +000001f4 ac250000 sw a1,0\(at\) + 1f4: R_MIPS_GOT_OFST \.data\+0x74 +000001f8 8f810000 lw at,0\(gp\) + 1f8: R_MIPS_GOT_PAGE \.data\+0x3c +000001fc 20210000 addi at,at,0 + 1fc: R_MIPS_GOT_OFST \.data\+0x3c +00000200 88250000 lwl a1,0\(at\) +00000204 98250003 lwr a1,3\(at\) +00000208 8f810000 lw at,0\(gp\) + 208: R_MIPS_GOT_PAGE \.data\+0x48 +0000020c 20210000 addi at,at,0 + 20c: R_MIPS_GOT_OFST \.data\+0x48 +00000210 88250000 lwl a1,0\(at\) +00000214 98250003 lwr a1,3\(at\) +00000218 8f810000 lw at,0\(gp\) + 218: R_MIPS_GOT_PAGE \.data\+0x3c +0000021c 20210000 addi at,at,0 + 21c: R_MIPS_GOT_OFST \.data\+0x3c +00000220 00310820 add at,at,s1 +00000224 88250000 lwl a1,0\(at\) +00000228 98250003 lwr a1,3\(at\) +0000022c 8f810000 lw at,0\(gp\) + 22c: R_MIPS_GOT_PAGE \.data\+0x48 +00000230 20210000 addi at,at,0 + 230: R_MIPS_GOT_OFST \.data\+0x48 +00000234 00310820 add at,at,s1 +00000238 88250000 lwl a1,0\(at\) +0000023c 98250003 lwr a1,3\(at\) +00000240 8f810000 lw at,0\(gp\) + 240: R_MIPS_GOT_PAGE \.data\+0x5e +00000244 20210000 addi at,at,0 + 244: R_MIPS_GOT_OFST \.data\+0x5e +00000248 00250820 add at,at,a1 +0000024c 88250000 lwl a1,0\(at\) +00000250 98250003 lwr a1,3\(at\) +00000254 8f810000 lw at,0\(gp\) + 254: R_MIPS_GOT_PAGE \.data\+0x74 +00000258 20210000 addi at,at,0 + 258: R_MIPS_GOT_OFST \.data\+0x74 +0000025c 00250820 add at,at,a1 +00000260 a8250000 swl a1,0\(at\) +00000264 b8250003 swr a1,3\(at\) +00000268 3c050000 lui a1,0x0 + 268: R_MIPS_GOT_HI16 fn +0000026c 00bc2820 add a1,a1,gp +00000270 8ca50000 lw a1,0\(a1\) + 270: R_MIPS_GOT_LO16 fn +00000274 8f850000 lw a1,0\(gp\) + 274: R_MIPS_GOT_PAGE \.text +00000278 20a50000 addi a1,a1,0 + 278: R_MIPS_GOT_OFST \.text +0000027c 3c190000 lui t9,0x0 + 27c: R_MIPS_CALL_HI16 fn +00000280 033cc820 add t9,t9,gp +00000284 8f390000 lw t9,0\(t9\) + 284: R_MIPS_CALL_LO16 fn +00000288 8f990000 lw t9,0\(gp\) + 288: R_MIPS_GOT_PAGE \.text +0000028c 23390000 addi t9,t9,0 + 28c: R_MIPS_GOT_OFST \.text +00000290 3c190000 lui t9,0x0 + 290: R_MIPS_CALL_HI16 fn +00000294 033cc820 add t9,t9,gp +00000298 8f390000 lw t9,0\(t9\) + 298: R_MIPS_CALL_LO16 fn +0000029c 0320f809 jalr t9 + 29c: R_MIPS_JALR fn +000002a0 00000000 nop +000002a4 8f990000 lw t9,0\(gp\) + 2a4: R_MIPS_GOT_PAGE \.text +000002a8 23390000 addi t9,t9,0 + 2a8: R_MIPS_GOT_OFST \.text +000002ac 0320f809 jalr t9 + 2ac: R_MIPS_JALR \.text +000002b0 00000000 nop +000002b4 3c050000 lui a1,0x0 + 2b4: R_MIPS_GOT_HI16 dg2 +000002b8 00bc2820 add a1,a1,gp +000002bc 8ca50000 lw a1,0\(a1\) + 2bc: R_MIPS_GOT_LO16 dg2 +000002c0 3c050000 lui a1,0x0 + 2c0: R_MIPS_GOT_HI16 dg2 +000002c4 00bc2820 add a1,a1,gp +000002c8 8ca50000 lw a1,0\(a1\) + 2c8: R_MIPS_GOT_LO16 dg2 +000002cc 20a5000c addi a1,a1,12 +000002d0 3c050000 lui a1,0x0 + 2d0: R_MIPS_GOT_HI16 dg2 +000002d4 00bc2820 add a1,a1,gp +000002d8 8ca50000 lw a1,0\(a1\) + 2d8: R_MIPS_GOT_LO16 dg2 +000002dc 3c010002 lui at,0x2 +000002e0 2021e240 addi at,at,-7616 +000002e4 00a12820 add a1,a1,at +000002e8 3c050000 lui a1,0x0 + 2e8: R_MIPS_GOT_HI16 dg2 +000002ec 00bc2820 add a1,a1,gp +000002f0 8ca50000 lw a1,0\(a1\) + 2f0: R_MIPS_GOT_LO16 dg2 +000002f4 00b12820 add a1,a1,s1 +000002f8 3c050000 lui a1,0x0 + 2f8: R_MIPS_GOT_HI16 dg2 +000002fc 00bc2820 add a1,a1,gp +00000300 8ca50000 lw a1,0\(a1\) + 300: R_MIPS_GOT_LO16 dg2 +00000304 20a5000c addi a1,a1,12 +00000308 00b12820 add a1,a1,s1 +0000030c 3c050000 lui a1,0x0 + 30c: R_MIPS_GOT_HI16 dg2 +00000310 00bc2820 add a1,a1,gp +00000314 8ca50000 lw a1,0\(a1\) + 314: R_MIPS_GOT_LO16 dg2 +00000318 3c010002 lui at,0x2 +0000031c 2021e240 addi at,at,-7616 +00000320 00a12820 add a1,a1,at +00000324 00b12820 add a1,a1,s1 +00000328 3c050000 lui a1,0x0 + 328: R_MIPS_GOT_HI16 dg2 +0000032c 00bc2820 add a1,a1,gp +00000330 8ca50000 lw a1,0\(a1\) + 330: R_MIPS_GOT_LO16 dg2 +00000334 8ca50000 lw a1,0\(a1\) +00000338 3c050000 lui a1,0x0 + 338: R_MIPS_GOT_HI16 dg2 +0000033c 00bc2820 add a1,a1,gp +00000340 8ca50000 lw a1,0\(a1\) + 340: R_MIPS_GOT_LO16 dg2 +00000344 8ca5000c lw a1,12\(a1\) +00000348 3c050000 lui a1,0x0 + 348: R_MIPS_GOT_HI16 dg2 +0000034c 00bc2820 add a1,a1,gp +00000350 8ca50000 lw a1,0\(a1\) + 350: R_MIPS_GOT_LO16 dg2 +00000354 00b12820 add a1,a1,s1 +00000358 8ca50000 lw a1,0\(a1\) +0000035c 3c050000 lui a1,0x0 + 35c: R_MIPS_GOT_HI16 dg2 +00000360 00bc2820 add a1,a1,gp +00000364 8ca50000 lw a1,0\(a1\) + 364: R_MIPS_GOT_LO16 dg2 +00000368 00b12820 add a1,a1,s1 +0000036c 8ca5000c lw a1,12\(a1\) +00000370 3c010000 lui at,0x0 + 370: R_MIPS_GOT_HI16 dg2 +00000374 003c0820 add at,at,gp +00000378 8c210000 lw at,0\(at\) + 378: R_MIPS_GOT_LO16 dg2 +0000037c 00250820 add at,at,a1 +00000380 8c250022 lw a1,34\(at\) +00000384 3c010000 lui at,0x0 + 384: R_MIPS_GOT_HI16 dg2 +00000388 003c0820 add at,at,gp +0000038c 8c210000 lw at,0\(at\) + 38c: R_MIPS_GOT_LO16 dg2 +00000390 00250820 add at,at,a1 +00000394 ac250038 sw a1,56\(at\) +00000398 3c010000 lui at,0x0 + 398: R_MIPS_GOT_HI16 dg2 +0000039c 003c0820 add at,at,gp +000003a0 8c210000 lw at,0\(at\) + 3a0: R_MIPS_GOT_LO16 dg2 +000003a4 88250000 lwl a1,0\(at\) +000003a8 98250003 lwr a1,3\(at\) +000003ac 3c010000 lui at,0x0 + 3ac: R_MIPS_GOT_HI16 dg2 +000003b0 003c0820 add at,at,gp +000003b4 8c210000 lw at,0\(at\) + 3b4: R_MIPS_GOT_LO16 dg2 +000003b8 2021000c addi at,at,12 +000003bc 88250000 lwl a1,0\(at\) +000003c0 98250003 lwr a1,3\(at\) +000003c4 3c010000 lui at,0x0 + 3c4: R_MIPS_GOT_HI16 dg2 +000003c8 003c0820 add at,at,gp +000003cc 8c210000 lw at,0\(at\) + 3cc: R_MIPS_GOT_LO16 dg2 +000003d0 00310820 add at,at,s1 +000003d4 88250000 lwl a1,0\(at\) +000003d8 98250003 lwr a1,3\(at\) +000003dc 3c010000 lui at,0x0 + 3dc: R_MIPS_GOT_HI16 dg2 +000003e0 003c0820 add at,at,gp +000003e4 8c210000 lw at,0\(at\) + 3e4: R_MIPS_GOT_LO16 dg2 +000003e8 2021000c addi at,at,12 +000003ec 00310820 add at,at,s1 +000003f0 88250000 lwl a1,0\(at\) +000003f4 98250003 lwr a1,3\(at\) +000003f8 3c010000 lui at,0x0 + 3f8: R_MIPS_GOT_HI16 dg2 +000003fc 003c0820 add at,at,gp +00000400 8c210000 lw at,0\(at\) + 400: R_MIPS_GOT_LO16 dg2 +00000404 20210022 addi at,at,34 +00000408 00250820 add at,at,a1 +0000040c 88250000 lwl a1,0\(at\) +00000410 98250003 lwr a1,3\(at\) +00000414 3c010000 lui at,0x0 + 414: R_MIPS_GOT_HI16 dg2 +00000418 003c0820 add at,at,gp +0000041c 8c210000 lw at,0\(at\) + 41c: R_MIPS_GOT_LO16 dg2 +00000420 20210038 addi at,at,56 +00000424 00250820 add at,at,a1 +00000428 a8250000 swl a1,0\(at\) +0000042c b8250003 swr a1,3\(at\) +00000430 8f850000 lw a1,0\(gp\) + 430: R_MIPS_GOT_PAGE \.data\+0xb4 +00000434 20a50000 addi a1,a1,0 + 434: R_MIPS_GOT_OFST \.data\+0xb4 +00000438 8f850000 lw a1,0\(gp\) + 438: R_MIPS_GOT_PAGE \.data\+0xc0 +0000043c 20a50000 addi a1,a1,0 + 43c: R_MIPS_GOT_OFST \.data\+0xc0 +00000440 8f850000 lw a1,0\(gp\) + 440: R_MIPS_GOT_PAGE \.data\+0x1e2f4 +00000444 20a50000 addi a1,a1,0 + 444: R_MIPS_GOT_OFST \.data\+0x1e2f4 +00000448 8f850000 lw a1,0\(gp\) + 448: R_MIPS_GOT_PAGE \.data\+0xb4 +0000044c 20a50000 addi a1,a1,0 + 44c: R_MIPS_GOT_OFST \.data\+0xb4 +00000450 00b12820 add a1,a1,s1 +00000454 8f850000 lw a1,0\(gp\) + 454: R_MIPS_GOT_PAGE \.data\+0xc0 +00000458 20a50000 addi a1,a1,0 + 458: R_MIPS_GOT_OFST \.data\+0xc0 +0000045c 00b12820 add a1,a1,s1 +00000460 8f850000 lw a1,0\(gp\) + 460: R_MIPS_GOT_PAGE \.data\+0x1e2f4 +00000464 20a50000 addi a1,a1,0 + 464: R_MIPS_GOT_OFST \.data\+0x1e2f4 +00000468 00b12820 add a1,a1,s1 +0000046c 8f850000 lw a1,0\(gp\) + 46c: R_MIPS_GOT_PAGE \.data\+0xb4 +00000470 8ca50000 lw a1,0\(a1\) + 470: R_MIPS_GOT_OFST \.data\+0xb4 +00000474 8f850000 lw a1,0\(gp\) + 474: R_MIPS_GOT_PAGE \.data\+0xc0 +00000478 8ca50000 lw a1,0\(a1\) + 478: R_MIPS_GOT_OFST \.data\+0xc0 +0000047c 8f850000 lw a1,0\(gp\) + 47c: R_MIPS_GOT_PAGE \.data\+0xb4 +00000480 00b12820 add a1,a1,s1 +00000484 8ca50000 lw a1,0\(a1\) + 484: R_MIPS_GOT_OFST \.data\+0xb4 +00000488 8f850000 lw a1,0\(gp\) + 488: R_MIPS_GOT_PAGE \.data\+0xc0 +0000048c 00b12820 add a1,a1,s1 +00000490 8ca50000 lw a1,0\(a1\) + 490: R_MIPS_GOT_OFST \.data\+0xc0 +00000494 8f810000 lw at,0\(gp\) + 494: R_MIPS_GOT_PAGE \.data\+0xb4 +00000498 00250820 add at,at,a1 +0000049c 8c250000 lw a1,0\(at\) + 49c: R_MIPS_GOT_OFST \.data\+0xb4 +000004a0 8f810000 lw at,0\(gp\) + 4a0: R_MIPS_GOT_PAGE \.data\+0xec +000004a4 00250820 add at,at,a1 +000004a8 ac250000 sw a1,0\(at\) + 4a8: R_MIPS_GOT_OFST \.data\+0xec +000004ac 8f810000 lw at,0\(gp\) + 4ac: R_MIPS_GOT_PAGE \.data\+0xb4 +000004b0 20210000 addi at,at,0 + 4b0: R_MIPS_GOT_OFST \.data\+0xb4 +000004b4 88250000 lwl a1,0\(at\) +000004b8 98250003 lwr a1,3\(at\) +000004bc 8f810000 lw at,0\(gp\) + 4bc: R_MIPS_GOT_PAGE \.data\+0xc0 +000004c0 20210000 addi at,at,0 + 4c0: R_MIPS_GOT_OFST \.data\+0xc0 +000004c4 88250000 lwl a1,0\(at\) +000004c8 98250003 lwr a1,3\(at\) +000004cc 8f810000 lw at,0\(gp\) + 4cc: R_MIPS_GOT_PAGE \.data\+0xb4 +000004d0 20210000 addi at,at,0 + 4d0: R_MIPS_GOT_OFST \.data\+0xb4 +000004d4 00310820 add at,at,s1 +000004d8 88250000 lwl a1,0\(at\) +000004dc 98250003 lwr a1,3\(at\) +000004e0 8f810000 lw at,0\(gp\) + 4e0: R_MIPS_GOT_PAGE \.data\+0xc0 +000004e4 20210000 addi at,at,0 + 4e4: R_MIPS_GOT_OFST \.data\+0xc0 +000004e8 00310820 add at,at,s1 +000004ec 88250000 lwl a1,0\(at\) +000004f0 98250003 lwr a1,3\(at\) +000004f4 8f810000 lw at,0\(gp\) + 4f4: R_MIPS_GOT_PAGE \.data\+0xd6 +000004f8 20210000 addi at,at,0 + 4f8: R_MIPS_GOT_OFST \.data\+0xd6 +000004fc 00250820 add at,at,a1 +00000500 88250000 lwl a1,0\(at\) +00000504 98250003 lwr a1,3\(at\) +00000508 8f810000 lw at,0\(gp\) + 508: R_MIPS_GOT_PAGE \.data\+0xec +0000050c 20210000 addi at,at,0 + 50c: R_MIPS_GOT_OFST \.data\+0xec +00000510 00250820 add at,at,a1 +00000514 a8250000 swl a1,0\(at\) +00000518 b8250003 swr a1,3\(at\) +0000051c 3c050000 lui a1,0x0 + 51c: R_MIPS_GOT_HI16 fn2 +00000520 00bc2820 add a1,a1,gp +00000524 8ca50000 lw a1,0\(a1\) + 524: R_MIPS_GOT_LO16 fn2 +00000528 8f850000 lw a1,0\(gp\) + 528: R_MIPS_GOT_PAGE \.text\+0x600 +0000052c 20a50000 addi a1,a1,0 + 52c: R_MIPS_GOT_OFST \.text\+0x600 +00000530 3c190000 lui t9,0x0 + 530: R_MIPS_CALL_HI16 fn2 +00000534 033cc820 add t9,t9,gp +00000538 8f390000 lw t9,0\(t9\) + 538: R_MIPS_CALL_LO16 fn2 +0000053c 8f990000 lw t9,0\(gp\) + 53c: R_MIPS_GOT_PAGE \.text\+0x600 +00000540 23390000 addi t9,t9,0 + 540: R_MIPS_GOT_OFST \.text\+0x600 +00000544 3c190000 lui t9,0x0 + 544: R_MIPS_CALL_HI16 fn2 +00000548 033cc820 add t9,t9,gp +0000054c 8f390000 lw t9,0\(t9\) + 54c: R_MIPS_CALL_LO16 fn2 +00000550 0320f809 jalr t9 + 550: R_MIPS_JALR fn2 +00000554 00000000 nop +00000558 8f990000 lw t9,0\(gp\) + 558: R_MIPS_GOT_PAGE \.text\+0x600 +0000055c 23390000 addi t9,t9,0 + 55c: R_MIPS_GOT_OFST \.text\+0x600 +00000560 0320f809 jalr t9 + 560: R_MIPS_JALR \.text\+0x600 +00000564 00000000 nop +00000568 3c050000 lui a1,0x0 + 568: R_MIPS_GOT_HI16 dg1 +0000056c 00bc2820 add a1,a1,gp +00000570 8ca50000 lw a1,0\(a1\) + 570: R_MIPS_GOT_LO16 dg1 +00000574 1000fea2 b 00000000 +00000578 00000000 nop +0000057c 3c050000 lui a1,0x0 + 57c: R_MIPS_GOT_HI16 dg2 +00000580 00bc2820 add a1,a1,gp +00000584 8ca50000 lw a1,0\(a1\) + 584: R_MIPS_GOT_LO16 dg2 +00000588 8ca50000 lw a1,0\(a1\) +0000058c 1000001c b 00000600 +00000590 00000000 nop +00000594 8f850000 lw a1,0\(gp\) + 594: R_MIPS_GOT_PAGE \.data\+0x3c +00000598 20a50000 addi a1,a1,0 + 598: R_MIPS_GOT_OFST \.data\+0x3c +0000059c 1000fe98 b 00000000 +000005a0 00000000 nop +000005a4 8f850000 lw a1,0\(gp\) + 5a4: R_MIPS_GOT_PAGE \.data\+0xc0 +000005a8 20a50000 addi a1,a1,0 + 5a8: R_MIPS_GOT_OFST \.data\+0xc0 +000005ac 10000014 b 00000600 +000005b0 00000000 nop +000005b4 8f850000 lw a1,0\(gp\) + 5b4: R_MIPS_GOT_PAGE \.data\+0x1e27c +000005b8 20a50000 addi a1,a1,0 + 5b8: R_MIPS_GOT_OFST \.data\+0x1e27c +000005bc 1000fe90 b 00000000 +000005c0 00000000 nop +000005c4 8f850000 lw a1,0\(gp\) + 5c4: R_MIPS_GOT_PAGE \.data\+0xb4 +000005c8 8ca50000 lw a1,0\(a1\) + 5c8: R_MIPS_GOT_OFST \.data\+0xb4 +000005cc 1000000c b 00000600 +000005d0 00000000 nop +000005d4 8f850000 lw a1,0\(gp\) + 5d4: R_MIPS_GOT_PAGE \.data\+0x48 +000005d8 8ca50000 lw a1,0\(a1\) + 5d8: R_MIPS_GOT_OFST \.data\+0x48 +000005dc 1000fe88 b 00000000 +000005e0 00000000 nop +000005e4 8f810000 lw at,0\(gp\) + 5e4: R_MIPS_GOT_PAGE \.data\+0xd6 +000005e8 00250820 add at,at,a1 +000005ec 8c250000 lw a1,0\(at\) + 5ec: R_MIPS_GOT_OFST \.data\+0xd6 +000005f0 10000003 b 00000600 +000005f4 00000000 nop + \.\.\. Index: gas/testsuite/gas/mips/elf-rel-xgot-n64.d =================================================================== RCS file: gas/testsuite/gas/mips/elf-rel-xgot-n64.d diff -N gas/testsuite/gas/mips/elf-rel-xgot-n64.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ gas/testsuite/gas/mips/elf-rel-xgot-n64.d 8 Apr 2003 10:02:28 -0000 @@ -0,0 +1,955 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ELF xgot reloc n64 +#as: -64 -KPIC -xgot +#source: elf-rel-got-n64.s + +.*: +file format elf64-.*mips.* + +Disassembly of section \.text: +0000000000000000 3c050000 lui a1,0x0 + 0: R_MIPS_GOT_HI16 dg1 + 0: R_MIPS_NONE \*ABS\* + 0: R_MIPS_NONE \*ABS\* +0000000000000004 00bc282d daddu a1,a1,gp +0000000000000008 dca50000 ld a1,0\(a1\) + 8: R_MIPS_GOT_LO16 dg1 + 8: R_MIPS_NONE \*ABS\* + 8: R_MIPS_NONE \*ABS\* +000000000000000c 3c050000 lui a1,0x0 + c: R_MIPS_GOT_HI16 dg1 + c: R_MIPS_NONE \*ABS\* + c: R_MIPS_NONE \*ABS\* +0000000000000010 00bc282d daddu a1,a1,gp +0000000000000014 dca50000 ld a1,0\(a1\) + 14: R_MIPS_GOT_LO16 dg1 + 14: R_MIPS_NONE \*ABS\* + 14: R_MIPS_NONE \*ABS\* +0000000000000018 64a5000c daddiu a1,a1,12 +000000000000001c 3c050000 lui a1,0x0 + 1c: R_MIPS_GOT_HI16 dg1 + 1c: R_MIPS_NONE \*ABS\* + 1c: R_MIPS_NONE \*ABS\* +0000000000000020 00bc282d daddu a1,a1,gp +0000000000000024 dca50000 ld a1,0\(a1\) + 24: R_MIPS_GOT_LO16 dg1 + 24: R_MIPS_NONE \*ABS\* + 24: R_MIPS_NONE \*ABS\* +0000000000000028 3c010002 lui at,0x2 +000000000000002c 6421e240 daddiu at,at,-7616 +0000000000000030 00a1282d daddu a1,a1,at +0000000000000034 3c050000 lui a1,0x0 + 34: R_MIPS_GOT_HI16 dg1 + 34: R_MIPS_NONE \*ABS\* + 34: R_MIPS_NONE \*ABS\* +0000000000000038 00bc282d daddu a1,a1,gp +000000000000003c dca50000 ld a1,0\(a1\) + 3c: R_MIPS_GOT_LO16 dg1 + 3c: R_MIPS_NONE \*ABS\* + 3c: R_MIPS_NONE \*ABS\* +0000000000000040 00b1282d daddu a1,a1,s1 +0000000000000044 3c050000 lui a1,0x0 + 44: R_MIPS_GOT_HI16 dg1 + 44: R_MIPS_NONE \*ABS\* + 44: R_MIPS_NONE \*ABS\* +0000000000000048 00bc282d daddu a1,a1,gp +000000000000004c dca50000 ld a1,0\(a1\) + 4c: R_MIPS_GOT_LO16 dg1 + 4c: R_MIPS_NONE \*ABS\* + 4c: R_MIPS_NONE \*ABS\* +0000000000000050 64a5000c daddiu a1,a1,12 +0000000000000054 00b1282d daddu a1,a1,s1 +0000000000000058 3c050000 lui a1,0x0 + 58: R_MIPS_GOT_HI16 dg1 + 58: R_MIPS_NONE \*ABS\* + 58: R_MIPS_NONE \*ABS\* +000000000000005c 00bc282d daddu a1,a1,gp +0000000000000060 dca50000 ld a1,0\(a1\) + 60: R_MIPS_GOT_LO16 dg1 + 60: R_MIPS_NONE \*ABS\* + 60: R_MIPS_NONE \*ABS\* +0000000000000064 3c010002 lui at,0x2 +0000000000000068 6421e240 daddiu at,at,-7616 +000000000000006c 00a1282d daddu a1,a1,at +0000000000000070 00b1282d daddu a1,a1,s1 +0000000000000074 3c050000 lui a1,0x0 + 74: R_MIPS_GOT_HI16 dg1 + 74: R_MIPS_NONE \*ABS\* + 74: R_MIPS_NONE \*ABS\* +0000000000000078 00bc282d daddu a1,a1,gp +000000000000007c dca50000 ld a1,0\(a1\) + 7c: R_MIPS_GOT_LO16 dg1 + 7c: R_MIPS_NONE \*ABS\* + 7c: R_MIPS_NONE \*ABS\* +0000000000000080 dca50000 ld a1,0\(a1\) +0000000000000084 3c050000 lui a1,0x0 + 84: R_MIPS_GOT_HI16 dg1 + 84: R_MIPS_NONE \*ABS\* + 84: R_MIPS_NONE \*ABS\* +0000000000000088 00bc282d daddu a1,a1,gp +000000000000008c dca50000 ld a1,0\(a1\) + 8c: R_MIPS_GOT_LO16 dg1 + 8c: R_MIPS_NONE \*ABS\* + 8c: R_MIPS_NONE \*ABS\* +0000000000000090 dca5000c ld a1,12\(a1\) +0000000000000094 3c050000 lui a1,0x0 + 94: R_MIPS_GOT_HI16 dg1 + 94: R_MIPS_NONE \*ABS\* + 94: R_MIPS_NONE \*ABS\* +0000000000000098 00bc282d daddu a1,a1,gp +000000000000009c dca50000 ld a1,0\(a1\) + 9c: R_MIPS_GOT_LO16 dg1 + 9c: R_MIPS_NONE \*ABS\* + 9c: R_MIPS_NONE \*ABS\* +00000000000000a0 00b1282d daddu a1,a1,s1 +00000000000000a4 dca50000 ld a1,0\(a1\) +00000000000000a8 3c050000 lui a1,0x0 + a8: R_MIPS_GOT_HI16 dg1 + a8: R_MIPS_NONE \*ABS\* + a8: R_MIPS_NONE \*ABS\* +00000000000000ac 00bc282d daddu a1,a1,gp +00000000000000b0 dca50000 ld a1,0\(a1\) + b0: R_MIPS_GOT_LO16 dg1 + b0: R_MIPS_NONE \*ABS\* + b0: R_MIPS_NONE \*ABS\* +00000000000000b4 00b1282d daddu a1,a1,s1 +00000000000000b8 dca5000c ld a1,12\(a1\) +00000000000000bc 3c010000 lui at,0x0 + bc: R_MIPS_GOT_HI16 dg1 + bc: R_MIPS_NONE \*ABS\* + bc: R_MIPS_NONE \*ABS\* +00000000000000c0 003c082d daddu at,at,gp +00000000000000c4 dc210000 ld at,0\(at\) + c4: R_MIPS_GOT_LO16 dg1 + c4: R_MIPS_NONE \*ABS\* + c4: R_MIPS_NONE \*ABS\* +00000000000000c8 0025082d daddu at,at,a1 +00000000000000cc dc250022 ld a1,34\(at\) +00000000000000d0 3c010000 lui at,0x0 + d0: R_MIPS_GOT_HI16 dg1 + d0: R_MIPS_NONE \*ABS\* + d0: R_MIPS_NONE \*ABS\* +00000000000000d4 003c082d daddu at,at,gp +00000000000000d8 dc210000 ld at,0\(at\) + d8: R_MIPS_GOT_LO16 dg1 + d8: R_MIPS_NONE \*ABS\* + d8: R_MIPS_NONE \*ABS\* +00000000000000dc 0025082d daddu at,at,a1 +00000000000000e0 fc250038 sd a1,56\(at\) +00000000000000e4 3c010000 lui at,0x0 + e4: R_MIPS_GOT_HI16 dg1 + e4: R_MIPS_NONE \*ABS\* + e4: R_MIPS_NONE \*ABS\* +00000000000000e8 003c082d daddu at,at,gp +00000000000000ec dc210000 ld at,0\(at\) + ec: R_MIPS_GOT_LO16 dg1 + ec: R_MIPS_NONE \*ABS\* + ec: R_MIPS_NONE \*ABS\* +00000000000000f0 88250000 lwl a1,0\(at\) +00000000000000f4 98250003 lwr a1,3\(at\) +00000000000000f8 3c010000 lui at,0x0 + f8: R_MIPS_GOT_HI16 dg1 + f8: R_MIPS_NONE \*ABS\* + f8: R_MIPS_NONE \*ABS\* +00000000000000fc 003c082d daddu at,at,gp +0000000000000100 dc210000 ld at,0\(at\) + 100: R_MIPS_GOT_LO16 dg1 + 100: R_MIPS_NONE \*ABS\* + 100: R_MIPS_NONE \*ABS\* +0000000000000104 6421000c daddiu at,at,12 +0000000000000108 88250000 lwl a1,0\(at\) +000000000000010c 98250003 lwr a1,3\(at\) +0000000000000110 3c010000 lui at,0x0 + 110: R_MIPS_GOT_HI16 dg1 + 110: R_MIPS_NONE \*ABS\* + 110: R_MIPS_NONE \*ABS\* +0000000000000114 003c082d daddu at,at,gp +0000000000000118 dc210000 ld at,0\(at\) + 118: R_MIPS_GOT_LO16 dg1 + 118: R_MIPS_NONE \*ABS\* + 118: R_MIPS_NONE \*ABS\* +000000000000011c 0031082d daddu at,at,s1 +0000000000000120 88250000 lwl a1,0\(at\) +0000000000000124 98250003 lwr a1,3\(at\) +0000000000000128 3c010000 lui at,0x0 + 128: R_MIPS_GOT_HI16 dg1 + 128: R_MIPS_NONE \*ABS\* + 128: R_MIPS_NONE \*ABS\* +000000000000012c 003c082d daddu at,at,gp +0000000000000130 dc210000 ld at,0\(at\) + 130: R_MIPS_GOT_LO16 dg1 + 130: R_MIPS_NONE \*ABS\* + 130: R_MIPS_NONE \*ABS\* +0000000000000134 6421000c daddiu at,at,12 +0000000000000138 0031082d daddu at,at,s1 +000000000000013c 88250000 lwl a1,0\(at\) +0000000000000140 98250003 lwr a1,3\(at\) +0000000000000144 3c010000 lui at,0x0 + 144: R_MIPS_GOT_HI16 dg1 + 144: R_MIPS_NONE \*ABS\* + 144: R_MIPS_NONE \*ABS\* +0000000000000148 003c082d daddu at,at,gp +000000000000014c dc210000 ld at,0\(at\) + 14c: R_MIPS_GOT_LO16 dg1 + 14c: R_MIPS_NONE \*ABS\* + 14c: R_MIPS_NONE \*ABS\* +0000000000000150 64210022 daddiu at,at,34 +0000000000000154 0025082d daddu at,at,a1 +0000000000000158 88250000 lwl a1,0\(at\) +000000000000015c 98250003 lwr a1,3\(at\) +0000000000000160 3c010000 lui at,0x0 + 160: R_MIPS_GOT_HI16 dg1 + 160: R_MIPS_NONE \*ABS\* + 160: R_MIPS_NONE \*ABS\* +0000000000000164 003c082d daddu at,at,gp +0000000000000168 dc210000 ld at,0\(at\) + 168: R_MIPS_GOT_LO16 dg1 + 168: R_MIPS_NONE \*ABS\* + 168: R_MIPS_NONE \*ABS\* +000000000000016c 64210038 daddiu at,at,56 +0000000000000170 0025082d daddu at,at,a1 +0000000000000174 a8250000 swl a1,0\(at\) +0000000000000178 b8250003 swr a1,3\(at\) +000000000000017c df850000 ld a1,0\(gp\) + 17c: R_MIPS_GOT_PAGE \.data\+0x3c + 17c: R_MIPS_NONE \*ABS\*\+0x3c + 17c: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000180 64a50000 daddiu a1,a1,0 + 180: R_MIPS_GOT_OFST \.data\+0x3c + 180: R_MIPS_NONE \*ABS\*\+0x3c + 180: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000184 df850000 ld a1,0\(gp\) + 184: R_MIPS_GOT_PAGE \.data\+0x48 + 184: R_MIPS_NONE \*ABS\*\+0x48 + 184: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000188 64a50000 daddiu a1,a1,0 + 188: R_MIPS_GOT_OFST \.data\+0x48 + 188: R_MIPS_NONE \*ABS\*\+0x48 + 188: R_MIPS_NONE \*ABS\*\+0x48 +000000000000018c df850000 ld a1,0\(gp\) + 18c: R_MIPS_GOT_PAGE \.data\+0x1e27c + 18c: R_MIPS_NONE \*ABS\*\+0x1e27c + 18c: R_MIPS_NONE \*ABS\*\+0x1e27c +0000000000000190 64a50000 daddiu a1,a1,0 + 190: R_MIPS_GOT_OFST \.data\+0x1e27c + 190: R_MIPS_NONE \*ABS\*\+0x1e27c + 190: R_MIPS_NONE \*ABS\*\+0x1e27c +0000000000000194 df850000 ld a1,0\(gp\) + 194: R_MIPS_GOT_PAGE \.data\+0x3c + 194: R_MIPS_NONE \*ABS\*\+0x3c + 194: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000198 64a50000 daddiu a1,a1,0 + 198: R_MIPS_GOT_OFST \.data\+0x3c + 198: R_MIPS_NONE \*ABS\*\+0x3c + 198: R_MIPS_NONE \*ABS\*\+0x3c +000000000000019c 00b1282d daddu a1,a1,s1 +00000000000001a0 df850000 ld a1,0\(gp\) + 1a0: R_MIPS_GOT_PAGE \.data\+0x48 + 1a0: R_MIPS_NONE \*ABS\*\+0x48 + 1a0: R_MIPS_NONE \*ABS\*\+0x48 +00000000000001a4 64a50000 daddiu a1,a1,0 + 1a4: R_MIPS_GOT_OFST \.data\+0x48 + 1a4: R_MIPS_NONE \*ABS\*\+0x48 + 1a4: R_MIPS_NONE \*ABS\*\+0x48 +00000000000001a8 00b1282d daddu a1,a1,s1 +00000000000001ac df850000 ld a1,0\(gp\) + 1ac: R_MIPS_GOT_PAGE \.data\+0x1e27c + 1ac: R_MIPS_NONE \*ABS\*\+0x1e27c + 1ac: R_MIPS_NONE \*ABS\*\+0x1e27c +00000000000001b0 64a50000 daddiu a1,a1,0 + 1b0: R_MIPS_GOT_OFST \.data\+0x1e27c + 1b0: R_MIPS_NONE \*ABS\*\+0x1e27c + 1b0: R_MIPS_NONE \*ABS\*\+0x1e27c +00000000000001b4 00b1282d daddu a1,a1,s1 +00000000000001b8 df850000 ld a1,0\(gp\) + 1b8: R_MIPS_GOT_PAGE \.data\+0x3c + 1b8: R_MIPS_NONE \*ABS\*\+0x3c + 1b8: R_MIPS_NONE \*ABS\*\+0x3c +00000000000001bc dca50000 ld a1,0\(a1\) + 1bc: R_MIPS_GOT_OFST \.data\+0x3c + 1bc: R_MIPS_NONE \*ABS\*\+0x3c + 1bc: R_MIPS_NONE \*ABS\*\+0x3c +00000000000001c0 df850000 ld a1,0\(gp\) + 1c0: R_MIPS_GOT_PAGE \.data\+0x48 + 1c0: R_MIPS_NONE \*ABS\*\+0x48 + 1c0: R_MIPS_NONE \*ABS\*\+0x48 +00000000000001c4 dca50000 ld a1,0\(a1\) + 1c4: R_MIPS_GOT_OFST \.data\+0x48 + 1c4: R_MIPS_NONE \*ABS\*\+0x48 + 1c4: R_MIPS_NONE \*ABS\*\+0x48 +00000000000001c8 df850000 ld a1,0\(gp\) + 1c8: R_MIPS_GOT_PAGE \.data\+0x3c + 1c8: R_MIPS_NONE \*ABS\*\+0x3c + 1c8: R_MIPS_NONE \*ABS\*\+0x3c +00000000000001cc 00b1282d daddu a1,a1,s1 +00000000000001d0 dca50000 ld a1,0\(a1\) + 1d0: R_MIPS_GOT_OFST \.data\+0x3c + 1d0: R_MIPS_NONE \*ABS\*\+0x3c + 1d0: R_MIPS_NONE \*ABS\*\+0x3c +00000000000001d4 df850000 ld a1,0\(gp\) + 1d4: R_MIPS_GOT_PAGE \.data\+0x48 + 1d4: R_MIPS_NONE \*ABS\*\+0x48 + 1d4: R_MIPS_NONE \*ABS\*\+0x48 +00000000000001d8 00b1282d daddu a1,a1,s1 +00000000000001dc dca50000 ld a1,0\(a1\) + 1dc: R_MIPS_GOT_OFST \.data\+0x48 + 1dc: R_MIPS_NONE \*ABS\*\+0x48 + 1dc: R_MIPS_NONE \*ABS\*\+0x48 +00000000000001e0 df810000 ld at,0\(gp\) + 1e0: R_MIPS_GOT_PAGE \.data\+0x5e + 1e0: R_MIPS_NONE \*ABS\*\+0x5e + 1e0: R_MIPS_NONE \*ABS\*\+0x5e +00000000000001e4 0025082d daddu at,at,a1 +00000000000001e8 dc250000 ld a1,0\(at\) + 1e8: R_MIPS_GOT_OFST \.data\+0x5e + 1e8: R_MIPS_NONE \*ABS\*\+0x5e + 1e8: R_MIPS_NONE \*ABS\*\+0x5e +00000000000001ec df810000 ld at,0\(gp\) + 1ec: R_MIPS_GOT_PAGE \.data\+0x74 + 1ec: R_MIPS_NONE \*ABS\*\+0x74 + 1ec: R_MIPS_NONE \*ABS\*\+0x74 +00000000000001f0 0025082d daddu at,at,a1 +00000000000001f4 fc250000 sd a1,0\(at\) + 1f4: R_MIPS_GOT_OFST \.data\+0x74 + 1f4: R_MIPS_NONE \*ABS\*\+0x74 + 1f4: R_MIPS_NONE \*ABS\*\+0x74 +00000000000001f8 df810000 ld at,0\(gp\) + 1f8: R_MIPS_GOT_PAGE \.data\+0x3c + 1f8: R_MIPS_NONE \*ABS\*\+0x3c + 1f8: R_MIPS_NONE \*ABS\*\+0x3c +00000000000001fc 64210000 daddiu at,at,0 + 1fc: R_MIPS_GOT_OFST \.data\+0x3c + 1fc: R_MIPS_NONE \*ABS\*\+0x3c + 1fc: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000200 88250000 lwl a1,0\(at\) +0000000000000204 98250003 lwr a1,3\(at\) +0000000000000208 df810000 ld at,0\(gp\) + 208: R_MIPS_GOT_PAGE \.data\+0x48 + 208: R_MIPS_NONE \*ABS\*\+0x48 + 208: R_MIPS_NONE \*ABS\*\+0x48 +000000000000020c 64210000 daddiu at,at,0 + 20c: R_MIPS_GOT_OFST \.data\+0x48 + 20c: R_MIPS_NONE \*ABS\*\+0x48 + 20c: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000210 88250000 lwl a1,0\(at\) +0000000000000214 98250003 lwr a1,3\(at\) +0000000000000218 df810000 ld at,0\(gp\) + 218: R_MIPS_GOT_PAGE \.data\+0x3c + 218: R_MIPS_NONE \*ABS\*\+0x3c + 218: R_MIPS_NONE \*ABS\*\+0x3c +000000000000021c 64210000 daddiu at,at,0 + 21c: R_MIPS_GOT_OFST \.data\+0x3c + 21c: R_MIPS_NONE \*ABS\*\+0x3c + 21c: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000220 0031082d daddu at,at,s1 +0000000000000224 88250000 lwl a1,0\(at\) +0000000000000228 98250003 lwr a1,3\(at\) +000000000000022c df810000 ld at,0\(gp\) + 22c: R_MIPS_GOT_PAGE \.data\+0x48 + 22c: R_MIPS_NONE \*ABS\*\+0x48 + 22c: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000230 64210000 daddiu at,at,0 + 230: R_MIPS_GOT_OFST \.data\+0x48 + 230: R_MIPS_NONE \*ABS\*\+0x48 + 230: R_MIPS_NONE \*ABS\*\+0x48 +0000000000000234 0031082d daddu at,at,s1 +0000000000000238 88250000 lwl a1,0\(at\) +000000000000023c 98250003 lwr a1,3\(at\) +0000000000000240 df810000 ld at,0\(gp\) + 240: R_MIPS_GOT_PAGE \.data\+0x5e + 240: R_MIPS_NONE \*ABS\*\+0x5e + 240: R_MIPS_NONE \*ABS\*\+0x5e +0000000000000244 64210000 daddiu at,at,0 + 244: R_MIPS_GOT_OFST \.data\+0x5e + 244: R_MIPS_NONE \*ABS\*\+0x5e + 244: R_MIPS_NONE \*ABS\*\+0x5e +0000000000000248 0025082d daddu at,at,a1 +000000000000024c 88250000 lwl a1,0\(at\) +0000000000000250 98250003 lwr a1,3\(at\) +0000000000000254 df810000 ld at,0\(gp\) + 254: R_MIPS_GOT_PAGE \.data\+0x74 + 254: R_MIPS_NONE \*ABS\*\+0x74 + 254: R_MIPS_NONE \*ABS\*\+0x74 +0000000000000258 64210000 daddiu at,at,0 + 258: R_MIPS_GOT_OFST \.data\+0x74 + 258: R_MIPS_NONE \*ABS\*\+0x74 + 258: R_MIPS_NONE \*ABS\*\+0x74 +000000000000025c 0025082d daddu at,at,a1 +0000000000000260 a8250000 swl a1,0\(at\) +0000000000000264 b8250003 swr a1,3\(at\) +0000000000000268 3c050000 lui a1,0x0 + 268: R_MIPS_GOT_HI16 fn + 268: R_MIPS_NONE \*ABS\* + 268: R_MIPS_NONE \*ABS\* +000000000000026c 00bc282d daddu a1,a1,gp +0000000000000270 dca50000 ld a1,0\(a1\) + 270: R_MIPS_GOT_LO16 fn + 270: R_MIPS_NONE \*ABS\* + 270: R_MIPS_NONE \*ABS\* +0000000000000274 df850000 ld a1,0\(gp\) + 274: R_MIPS_GOT_PAGE \.text + 274: R_MIPS_NONE \*ABS\* + 274: R_MIPS_NONE \*ABS\* +0000000000000278 64a50000 daddiu a1,a1,0 + 278: R_MIPS_GOT_OFST \.text + 278: R_MIPS_NONE \*ABS\* + 278: R_MIPS_NONE \*ABS\* +000000000000027c 3c190000 lui t9,0x0 + 27c: R_MIPS_CALL_HI16 fn + 27c: R_MIPS_NONE \*ABS\* + 27c: R_MIPS_NONE \*ABS\* +0000000000000280 033cc82d daddu t9,t9,gp +0000000000000284 df390000 ld t9,0\(t9\) + 284: R_MIPS_CALL_LO16 fn + 284: R_MIPS_NONE \*ABS\* + 284: R_MIPS_NONE \*ABS\* +0000000000000288 df990000 ld t9,0\(gp\) + 288: R_MIPS_GOT_PAGE \.text + 288: R_MIPS_NONE \*ABS\* + 288: R_MIPS_NONE \*ABS\* +000000000000028c 67390000 daddiu t9,t9,0 + 28c: R_MIPS_GOT_OFST \.text + 28c: R_MIPS_NONE \*ABS\* + 28c: R_MIPS_NONE \*ABS\* +0000000000000290 3c190000 lui t9,0x0 + 290: R_MIPS_CALL_HI16 fn + 290: R_MIPS_NONE \*ABS\* + 290: R_MIPS_NONE \*ABS\* +0000000000000294 033cc82d daddu t9,t9,gp +0000000000000298 df390000 ld t9,0\(t9\) + 298: R_MIPS_CALL_LO16 fn + 298: R_MIPS_NONE \*ABS\* + 298: R_MIPS_NONE \*ABS\* +000000000000029c 0320f809 jalr t9 + 29c: R_MIPS_JALR fn + 29c: R_MIPS_NONE \*ABS\* + 29c: R_MIPS_NONE \*ABS\* +00000000000002a0 00000000 nop +00000000000002a4 df990000 ld t9,0\(gp\) + 2a4: R_MIPS_GOT_PAGE \.text + 2a4: R_MIPS_NONE \*ABS\* + 2a4: R_MIPS_NONE \*ABS\* +00000000000002a8 67390000 daddiu t9,t9,0 + 2a8: R_MIPS_GOT_OFST \.text + 2a8: R_MIPS_NONE \*ABS\* + 2a8: R_MIPS_NONE \*ABS\* +00000000000002ac 0320f809 jalr t9 + 2ac: R_MIPS_JALR \.text + 2ac: R_MIPS_NONE \*ABS\* + 2ac: R_MIPS_NONE \*ABS\* +00000000000002b0 00000000 nop +00000000000002b4 3c050000 lui a1,0x0 + 2b4: R_MIPS_GOT_HI16 dg2 + 2b4: R_MIPS_NONE \*ABS\* + 2b4: R_MIPS_NONE \*ABS\* +00000000000002b8 00bc282d daddu a1,a1,gp +00000000000002bc dca50000 ld a1,0\(a1\) + 2bc: R_MIPS_GOT_LO16 dg2 + 2bc: R_MIPS_NONE \*ABS\* + 2bc: R_MIPS_NONE \*ABS\* +00000000000002c0 3c050000 lui a1,0x0 + 2c0: R_MIPS_GOT_HI16 dg2 + 2c0: R_MIPS_NONE \*ABS\* + 2c0: R_MIPS_NONE \*ABS\* +00000000000002c4 00bc282d daddu a1,a1,gp +00000000000002c8 dca50000 ld a1,0\(a1\) + 2c8: R_MIPS_GOT_LO16 dg2 + 2c8: R_MIPS_NONE \*ABS\* + 2c8: R_MIPS_NONE \*ABS\* +00000000000002cc 64a5000c daddiu a1,a1,12 +00000000000002d0 3c050000 lui a1,0x0 + 2d0: R_MIPS_GOT_HI16 dg2 + 2d0: R_MIPS_NONE \*ABS\* + 2d0: R_MIPS_NONE \*ABS\* +00000000000002d4 00bc282d daddu a1,a1,gp +00000000000002d8 dca50000 ld a1,0\(a1\) + 2d8: R_MIPS_GOT_LO16 dg2 + 2d8: R_MIPS_NONE \*ABS\* + 2d8: R_MIPS_NONE \*ABS\* +00000000000002dc 3c010002 lui at,0x2 +00000000000002e0 6421e240 daddiu at,at,-7616 +00000000000002e4 00a1282d daddu a1,a1,at +00000000000002e8 3c050000 lui a1,0x0 + 2e8: R_MIPS_GOT_HI16 dg2 + 2e8: R_MIPS_NONE \*ABS\* + 2e8: R_MIPS_NONE \*ABS\* +00000000000002ec 00bc282d daddu a1,a1,gp +00000000000002f0 dca50000 ld a1,0\(a1\) + 2f0: R_MIPS_GOT_LO16 dg2 + 2f0: R_MIPS_NONE \*ABS\* + 2f0: R_MIPS_NONE \*ABS\* +00000000000002f4 00b1282d daddu a1,a1,s1 +00000000000002f8 3c050000 lui a1,0x0 + 2f8: R_MIPS_GOT_HI16 dg2 + 2f8: R_MIPS_NONE \*ABS\* + 2f8: R_MIPS_NONE \*ABS\* +00000000000002fc 00bc282d daddu a1,a1,gp +0000000000000300 dca50000 ld a1,0\(a1\) + 300: R_MIPS_GOT_LO16 dg2 + 300: R_MIPS_NONE \*ABS\* + 300: R_MIPS_NONE \*ABS\* +0000000000000304 64a5000c daddiu a1,a1,12 +0000000000000308 00b1282d daddu a1,a1,s1 +000000000000030c 3c050000 lui a1,0x0 + 30c: R_MIPS_GOT_HI16 dg2 + 30c: R_MIPS_NONE \*ABS\* + 30c: R_MIPS_NONE \*ABS\* +0000000000000310 00bc282d daddu a1,a1,gp +0000000000000314 dca50000 ld a1,0\(a1\) + 314: R_MIPS_GOT_LO16 dg2 + 314: R_MIPS_NONE \*ABS\* + 314: R_MIPS_NONE \*ABS\* +0000000000000318 3c010002 lui at,0x2 +000000000000031c 6421e240 daddiu at,at,-7616 +0000000000000320 00a1282d daddu a1,a1,at +0000000000000324 00b1282d daddu a1,a1,s1 +0000000000000328 3c050000 lui a1,0x0 + 328: R_MIPS_GOT_HI16 dg2 + 328: R_MIPS_NONE \*ABS\* + 328: R_MIPS_NONE \*ABS\* +000000000000032c 00bc282d daddu a1,a1,gp +0000000000000330 dca50000 ld a1,0\(a1\) + 330: R_MIPS_GOT_LO16 dg2 + 330: R_MIPS_NONE \*ABS\* + 330: R_MIPS_NONE \*ABS\* +0000000000000334 dca50000 ld a1,0\(a1\) +0000000000000338 3c050000 lui a1,0x0 + 338: R_MIPS_GOT_HI16 dg2 + 338: R_MIPS_NONE \*ABS\* + 338: R_MIPS_NONE \*ABS\* +000000000000033c 00bc282d daddu a1,a1,gp +0000000000000340 dca50000 ld a1,0\(a1\) + 340: R_MIPS_GOT_LO16 dg2 + 340: R_MIPS_NONE \*ABS\* + 340: R_MIPS_NONE \*ABS\* +0000000000000344 dca5000c ld a1,12\(a1\) +0000000000000348 3c050000 lui a1,0x0 + 348: R_MIPS_GOT_HI16 dg2 + 348: R_MIPS_NONE \*ABS\* + 348: R_MIPS_NONE \*ABS\* +000000000000034c 00bc282d daddu a1,a1,gp +0000000000000350 dca50000 ld a1,0\(a1\) + 350: R_MIPS_GOT_LO16 dg2 + 350: R_MIPS_NONE \*ABS\* + 350: R_MIPS_NONE \*ABS\* +0000000000000354 00b1282d daddu a1,a1,s1 +0000000000000358 dca50000 ld a1,0\(a1\) +000000000000035c 3c050000 lui a1,0x0 + 35c: R_MIPS_GOT_HI16 dg2 + 35c: R_MIPS_NONE \*ABS\* + 35c: R_MIPS_NONE \*ABS\* +0000000000000360 00bc282d daddu a1,a1,gp +0000000000000364 dca50000 ld a1,0\(a1\) + 364: R_MIPS_GOT_LO16 dg2 + 364: R_MIPS_NONE \*ABS\* + 364: R_MIPS_NONE \*ABS\* +0000000000000368 00b1282d daddu a1,a1,s1 +000000000000036c dca5000c ld a1,12\(a1\) +0000000000000370 3c010000 lui at,0x0 + 370: R_MIPS_GOT_HI16 dg2 + 370: R_MIPS_NONE \*ABS\* + 370: R_MIPS_NONE \*ABS\* +0000000000000374 003c082d daddu at,at,gp +0000000000000378 dc210000 ld at,0\(at\) + 378: R_MIPS_GOT_LO16 dg2 + 378: R_MIPS_NONE \*ABS\* + 378: R_MIPS_NONE \*ABS\* +000000000000037c 0025082d daddu at,at,a1 +0000000000000380 dc250022 ld a1,34\(at\) +0000000000000384 3c010000 lui at,0x0 + 384: R_MIPS_GOT_HI16 dg2 + 384: R_MIPS_NONE \*ABS\* + 384: R_MIPS_NONE \*ABS\* +0000000000000388 003c082d daddu at,at,gp +000000000000038c dc210000 ld at,0\(at\) + 38c: R_MIPS_GOT_LO16 dg2 + 38c: R_MIPS_NONE \*ABS\* + 38c: R_MIPS_NONE \*ABS\* +0000000000000390 0025082d daddu at,at,a1 +0000000000000394 fc250038 sd a1,56\(at\) +0000000000000398 3c010000 lui at,0x0 + 398: R_MIPS_GOT_HI16 dg2 + 398: R_MIPS_NONE \*ABS\* + 398: R_MIPS_NONE \*ABS\* +000000000000039c 003c082d daddu at,at,gp +00000000000003a0 dc210000 ld at,0\(at\) + 3a0: R_MIPS_GOT_LO16 dg2 + 3a0: R_MIPS_NONE \*ABS\* + 3a0: R_MIPS_NONE \*ABS\* +00000000000003a4 88250000 lwl a1,0\(at\) +00000000000003a8 98250003 lwr a1,3\(at\) +00000000000003ac 3c010000 lui at,0x0 + 3ac: R_MIPS_GOT_HI16 dg2 + 3ac: R_MIPS_NONE \*ABS\* + 3ac: R_MIPS_NONE \*ABS\* +00000000000003b0 003c082d daddu at,at,gp +00000000000003b4 dc210000 ld at,0\(at\) + 3b4: R_MIPS_GOT_LO16 dg2 + 3b4: R_MIPS_NONE \*ABS\* + 3b4: R_MIPS_NONE \*ABS\* +00000000000003b8 6421000c daddiu at,at,12 +00000000000003bc 88250000 lwl a1,0\(at\) +00000000000003c0 98250003 lwr a1,3\(at\) +00000000000003c4 3c010000 lui at,0x0 + 3c4: R_MIPS_GOT_HI16 dg2 + 3c4: R_MIPS_NONE \*ABS\* + 3c4: R_MIPS_NONE \*ABS\* +00000000000003c8 003c082d daddu at,at,gp +00000000000003cc dc210000 ld at,0\(at\) + 3cc: R_MIPS_GOT_LO16 dg2 + 3cc: R_MIPS_NONE \*ABS\* + 3cc: R_MIPS_NONE \*ABS\* +00000000000003d0 0031082d daddu at,at,s1 +00000000000003d4 88250000 lwl a1,0\(at\) +00000000000003d8 98250003 lwr a1,3\(at\) +00000000000003dc 3c010000 lui at,0x0 + 3dc: R_MIPS_GOT_HI16 dg2 + 3dc: R_MIPS_NONE \*ABS\* + 3dc: R_MIPS_NONE \*ABS\* +00000000000003e0 003c082d daddu at,at,gp +00000000000003e4 dc210000 ld at,0\(at\) + 3e4: R_MIPS_GOT_LO16 dg2 + 3e4: R_MIPS_NONE \*ABS\* + 3e4: R_MIPS_NONE \*ABS\* +00000000000003e8 6421000c daddiu at,at,12 +00000000000003ec 0031082d daddu at,at,s1 +00000000000003f0 88250000 lwl a1,0\(at\) +00000000000003f4 98250003 lwr a1,3\(at\) +00000000000003f8 3c010000 lui at,0x0 + 3f8: R_MIPS_GOT_HI16 dg2 + 3f8: R_MIPS_NONE \*ABS\* + 3f8: R_MIPS_NONE \*ABS\* +00000000000003fc 003c082d daddu at,at,gp +0000000000000400 dc210000 ld at,0\(at\) + 400: R_MIPS_GOT_LO16 dg2 + 400: R_MIPS_NONE \*ABS\* + 400: R_MIPS_NONE \*ABS\* +0000000000000404 64210022 daddiu at,at,34 +0000000000000408 0025082d daddu at,at,a1 +000000000000040c 88250000 lwl a1,0\(at\) +0000000000000410 98250003 lwr a1,3\(at\) +0000000000000414 3c010000 lui at,0x0 + 414: R_MIPS_GOT_HI16 dg2 + 414: R_MIPS_NONE \*ABS\* + 414: R_MIPS_NONE \*ABS\* +0000000000000418 003c082d daddu at,at,gp +000000000000041c dc210000 ld at,0\(at\) + 41c: R_MIPS_GOT_LO16 dg2 + 41c: R_MIPS_NONE \*ABS\* + 41c: R_MIPS_NONE \*ABS\* +0000000000000420 64210038 daddiu at,at,56 +0000000000000424 0025082d daddu at,at,a1 +0000000000000428 a8250000 swl a1,0\(at\) +000000000000042c b8250003 swr a1,3\(at\) +0000000000000430 df850000 ld a1,0\(gp\) + 430: R_MIPS_GOT_PAGE \.data\+0xb4 + 430: R_MIPS_NONE \*ABS\*\+0xb4 + 430: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000434 64a50000 daddiu a1,a1,0 + 434: R_MIPS_GOT_OFST \.data\+0xb4 + 434: R_MIPS_NONE \*ABS\*\+0xb4 + 434: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000438 df850000 ld a1,0\(gp\) + 438: R_MIPS_GOT_PAGE \.data\+0xc0 + 438: R_MIPS_NONE \*ABS\*\+0xc0 + 438: R_MIPS_NONE \*ABS\*\+0xc0 +000000000000043c 64a50000 daddiu a1,a1,0 + 43c: R_MIPS_GOT_OFST \.data\+0xc0 + 43c: R_MIPS_NONE \*ABS\*\+0xc0 + 43c: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000440 df850000 ld a1,0\(gp\) + 440: R_MIPS_GOT_PAGE \.data\+0x1e2f4 + 440: R_MIPS_NONE \*ABS\*\+0x1e2f4 + 440: R_MIPS_NONE \*ABS\*\+0x1e2f4 +0000000000000444 64a50000 daddiu a1,a1,0 + 444: R_MIPS_GOT_OFST \.data\+0x1e2f4 + 444: R_MIPS_NONE \*ABS\*\+0x1e2f4 + 444: R_MIPS_NONE \*ABS\*\+0x1e2f4 +0000000000000448 df850000 ld a1,0\(gp\) + 448: R_MIPS_GOT_PAGE \.data\+0xb4 + 448: R_MIPS_NONE \*ABS\*\+0xb4 + 448: R_MIPS_NONE \*ABS\*\+0xb4 +000000000000044c 64a50000 daddiu a1,a1,0 + 44c: R_MIPS_GOT_OFST \.data\+0xb4 + 44c: R_MIPS_NONE \*ABS\*\+0xb4 + 44c: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000450 00b1282d daddu a1,a1,s1 +0000000000000454 df850000 ld a1,0\(gp\) + 454: R_MIPS_GOT_PAGE \.data\+0xc0 + 454: R_MIPS_NONE \*ABS\*\+0xc0 + 454: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000458 64a50000 daddiu a1,a1,0 + 458: R_MIPS_GOT_OFST \.data\+0xc0 + 458: R_MIPS_NONE \*ABS\*\+0xc0 + 458: R_MIPS_NONE \*ABS\*\+0xc0 +000000000000045c 00b1282d daddu a1,a1,s1 +0000000000000460 df850000 ld a1,0\(gp\) + 460: R_MIPS_GOT_PAGE \.data\+0x1e2f4 + 460: R_MIPS_NONE \*ABS\*\+0x1e2f4 + 460: R_MIPS_NONE \*ABS\*\+0x1e2f4 +0000000000000464 64a50000 daddiu a1,a1,0 + 464: R_MIPS_GOT_OFST \.data\+0x1e2f4 + 464: R_MIPS_NONE \*ABS\*\+0x1e2f4 + 464: R_MIPS_NONE \*ABS\*\+0x1e2f4 +0000000000000468 00b1282d daddu a1,a1,s1 +000000000000046c df850000 ld a1,0\(gp\) + 46c: R_MIPS_GOT_PAGE \.data\+0xb4 + 46c: R_MIPS_NONE \*ABS\*\+0xb4 + 46c: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000470 dca50000 ld a1,0\(a1\) + 470: R_MIPS_GOT_OFST \.data\+0xb4 + 470: R_MIPS_NONE \*ABS\*\+0xb4 + 470: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000474 df850000 ld a1,0\(gp\) + 474: R_MIPS_GOT_PAGE \.data\+0xc0 + 474: R_MIPS_NONE \*ABS\*\+0xc0 + 474: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000478 dca50000 ld a1,0\(a1\) + 478: R_MIPS_GOT_OFST \.data\+0xc0 + 478: R_MIPS_NONE \*ABS\*\+0xc0 + 478: R_MIPS_NONE \*ABS\*\+0xc0 +000000000000047c df850000 ld a1,0\(gp\) + 47c: R_MIPS_GOT_PAGE \.data\+0xb4 + 47c: R_MIPS_NONE \*ABS\*\+0xb4 + 47c: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000480 00b1282d daddu a1,a1,s1 +0000000000000484 dca50000 ld a1,0\(a1\) + 484: R_MIPS_GOT_OFST \.data\+0xb4 + 484: R_MIPS_NONE \*ABS\*\+0xb4 + 484: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000488 df850000 ld a1,0\(gp\) + 488: R_MIPS_GOT_PAGE \.data\+0xc0 + 488: R_MIPS_NONE \*ABS\*\+0xc0 + 488: R_MIPS_NONE \*ABS\*\+0xc0 +000000000000048c 00b1282d daddu a1,a1,s1 +0000000000000490 dca50000 ld a1,0\(a1\) + 490: R_MIPS_GOT_OFST \.data\+0xc0 + 490: R_MIPS_NONE \*ABS\*\+0xc0 + 490: R_MIPS_NONE \*ABS\*\+0xc0 +0000000000000494 df810000 ld at,0\(gp\) + 494: R_MIPS_GOT_PAGE \.data\+0xb4 + 494: R_MIPS_NONE \*ABS\*\+0xb4 + 494: R_MIPS_NONE \*ABS\*\+0xb4 +0000000000000498 0025082d daddu at,at,a1 +000000000000049c dc250000 ld a1,0\(at\) + 49c: R_MIPS_GOT_OFST \.data\+0xb4 + 49c: R_MIPS_NONE \*ABS\*\+0xb4 + 49c: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000004a0 df810000 ld at,0\(gp\) + 4a0: R_MIPS_GOT_PAGE \.data\+0xec + 4a0: R_MIPS_NONE \*ABS\*\+0xec + 4a0: R_MIPS_NONE \*ABS\*\+0xec +00000000000004a4 0025082d daddu at,at,a1 +00000000000004a8 fc250000 sd a1,0\(at\) + 4a8: R_MIPS_GOT_OFST \.data\+0xec + 4a8: R_MIPS_NONE \*ABS\*\+0xec + 4a8: R_MIPS_NONE \*ABS\*\+0xec +00000000000004ac df810000 ld at,0\(gp\) + 4ac: R_MIPS_GOT_PAGE \.data\+0xb4 + 4ac: R_MIPS_NONE \*ABS\*\+0xb4 + 4ac: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000004b0 64210000 daddiu at,at,0 + 4b0: R_MIPS_GOT_OFST \.data\+0xb4 + 4b0: R_MIPS_NONE \*ABS\*\+0xb4 + 4b0: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000004b4 88250000 lwl a1,0\(at\) +00000000000004b8 98250003 lwr a1,3\(at\) +00000000000004bc df810000 ld at,0\(gp\) + 4bc: R_MIPS_GOT_PAGE \.data\+0xc0 + 4bc: R_MIPS_NONE \*ABS\*\+0xc0 + 4bc: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000004c0 64210000 daddiu at,at,0 + 4c0: R_MIPS_GOT_OFST \.data\+0xc0 + 4c0: R_MIPS_NONE \*ABS\*\+0xc0 + 4c0: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000004c4 88250000 lwl a1,0\(at\) +00000000000004c8 98250003 lwr a1,3\(at\) +00000000000004cc df810000 ld at,0\(gp\) + 4cc: R_MIPS_GOT_PAGE \.data\+0xb4 + 4cc: R_MIPS_NONE \*ABS\*\+0xb4 + 4cc: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000004d0 64210000 daddiu at,at,0 + 4d0: R_MIPS_GOT_OFST \.data\+0xb4 + 4d0: R_MIPS_NONE \*ABS\*\+0xb4 + 4d0: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000004d4 0031082d daddu at,at,s1 +00000000000004d8 88250000 lwl a1,0\(at\) +00000000000004dc 98250003 lwr a1,3\(at\) +00000000000004e0 df810000 ld at,0\(gp\) + 4e0: R_MIPS_GOT_PAGE \.data\+0xc0 + 4e0: R_MIPS_NONE \*ABS\*\+0xc0 + 4e0: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000004e4 64210000 daddiu at,at,0 + 4e4: R_MIPS_GOT_OFST \.data\+0xc0 + 4e4: R_MIPS_NONE \*ABS\*\+0xc0 + 4e4: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000004e8 0031082d daddu at,at,s1 +00000000000004ec 88250000 lwl a1,0\(at\) +00000000000004f0 98250003 lwr a1,3\(at\) +00000000000004f4 df810000 ld at,0\(gp\) + 4f4: R_MIPS_GOT_PAGE \.data\+0xd6 + 4f4: R_MIPS_NONE \*ABS\*\+0xd6 + 4f4: R_MIPS_NONE \*ABS\*\+0xd6 +00000000000004f8 64210000 daddiu at,at,0 + 4f8: R_MIPS_GOT_OFST \.data\+0xd6 + 4f8: R_MIPS_NONE \*ABS\*\+0xd6 + 4f8: R_MIPS_NONE \*ABS\*\+0xd6 +00000000000004fc 0025082d daddu at,at,a1 +0000000000000500 88250000 lwl a1,0\(at\) +0000000000000504 98250003 lwr a1,3\(at\) +0000000000000508 df810000 ld at,0\(gp\) + 508: R_MIPS_GOT_PAGE \.data\+0xec + 508: R_MIPS_NONE \*ABS\*\+0xec + 508: R_MIPS_NONE \*ABS\*\+0xec +000000000000050c 64210000 daddiu at,at,0 + 50c: R_MIPS_GOT_OFST \.data\+0xec + 50c: R_MIPS_NONE \*ABS\*\+0xec + 50c: R_MIPS_NONE \*ABS\*\+0xec +0000000000000510 0025082d daddu at,at,a1 +0000000000000514 a8250000 swl a1,0\(at\) +0000000000000518 b8250003 swr a1,3\(at\) +000000000000051c 3c050000 lui a1,0x0 + 51c: R_MIPS_GOT_HI16 fn2 + 51c: R_MIPS_NONE \*ABS\* + 51c: R_MIPS_NONE \*ABS\* +0000000000000520 00bc282d daddu a1,a1,gp +0000000000000524 dca50000 ld a1,0\(a1\) + 524: R_MIPS_GOT_LO16 fn2 + 524: R_MIPS_NONE \*ABS\* + 524: R_MIPS_NONE \*ABS\* +0000000000000528 df850000 ld a1,0\(gp\) + 528: R_MIPS_GOT_PAGE \.text\+0x600 + 528: R_MIPS_NONE \*ABS\*\+0x600 + 528: R_MIPS_NONE \*ABS\*\+0x600 +000000000000052c 64a50000 daddiu a1,a1,0 + 52c: R_MIPS_GOT_OFST \.text\+0x600 + 52c: R_MIPS_NONE \*ABS\*\+0x600 + 52c: R_MIPS_NONE \*ABS\*\+0x600 +0000000000000530 3c190000 lui t9,0x0 + 530: R_MIPS_CALL_HI16 fn2 + 530: R_MIPS_NONE \*ABS\* + 530: R_MIPS_NONE \*ABS\* +0000000000000534 033cc82d daddu t9,t9,gp +0000000000000538 df390000 ld t9,0\(t9\) + 538: R_MIPS_CALL_LO16 fn2 + 538: R_MIPS_NONE \*ABS\* + 538: R_MIPS_NONE \*ABS\* +000000000000053c df990000 ld t9,0\(gp\) + 53c: R_MIPS_GOT_PAGE \.text\+0x600 + 53c: R_MIPS_NONE \*ABS\*\+0x600 + 53c: R_MIPS_NONE \*ABS\*\+0x600 +0000000000000540 67390000 daddiu t9,t9,0 + 540: R_MIPS_GOT_OFST \.text\+0x600 + 540: R_MIPS_NONE \*ABS\*\+0x600 + 540: R_MIPS_NONE \*ABS\*\+0x600 +0000000000000544 3c190000 lui t9,0x0 + 544: R_MIPS_CALL_HI16 fn2 + 544: R_MIPS_NONE \*ABS\* + 544: R_MIPS_NONE \*ABS\* +0000000000000548 033cc82d daddu t9,t9,gp +000000000000054c df390000 ld t9,0\(t9\) + 54c: R_MIPS_CALL_LO16 fn2 + 54c: R_MIPS_NONE \*ABS\* + 54c: R_MIPS_NONE \*ABS\* +0000000000000550 0320f809 jalr t9 + 550: R_MIPS_JALR fn2 + 550: R_MIPS_NONE \*ABS\* + 550: R_MIPS_NONE \*ABS\* +0000000000000554 00000000 nop +0000000000000558 df990000 ld t9,0\(gp\) + 558: R_MIPS_GOT_PAGE \.text\+0x600 + 558: R_MIPS_NONE \*ABS\*\+0x600 + 558: R_MIPS_NONE \*ABS\*\+0x600 +000000000000055c 67390000 daddiu t9,t9,0 + 55c: R_MIPS_GOT_OFST \.text\+0x600 + 55c: R_MIPS_NONE \*ABS\*\+0x600 + 55c: R_MIPS_NONE \*ABS\*\+0x600 +0000000000000560 0320f809 jalr t9 + 560: R_MIPS_JALR \.text\+0x600 + 560: R_MIPS_NONE \*ABS\*\+0x600 + 560: R_MIPS_NONE \*ABS\*\+0x600 +0000000000000564 00000000 nop +0000000000000568 3c050000 lui a1,0x0 + 568: R_MIPS_GOT_HI16 dg1 + 568: R_MIPS_NONE \*ABS\* + 568: R_MIPS_NONE \*ABS\* +000000000000056c 00bc282d daddu a1,a1,gp +0000000000000570 dca50000 ld a1,0\(a1\) + 570: R_MIPS_GOT_LO16 dg1 + 570: R_MIPS_NONE \*ABS\* + 570: R_MIPS_NONE \*ABS\* +0000000000000574 1000fea2 b 0000000000000000 +0000000000000578 00000000 nop +000000000000057c 3c050000 lui a1,0x0 + 57c: R_MIPS_GOT_HI16 dg2 + 57c: R_MIPS_NONE \*ABS\* + 57c: R_MIPS_NONE \*ABS\* +0000000000000580 00bc282d daddu a1,a1,gp +0000000000000584 dca50000 ld a1,0\(a1\) + 584: R_MIPS_GOT_LO16 dg2 + 584: R_MIPS_NONE \*ABS\* + 584: R_MIPS_NONE \*ABS\* +0000000000000588 dca50000 ld a1,0\(a1\) +000000000000058c 1000001c b 0000000000000600 +0000000000000590 00000000 nop +0000000000000594 df850000 ld a1,0\(gp\) + 594: R_MIPS_GOT_PAGE \.data\+0x3c + 594: R_MIPS_NONE \*ABS\*\+0x3c + 594: R_MIPS_NONE \*ABS\*\+0x3c +0000000000000598 64a50000 daddiu a1,a1,0 + 598: R_MIPS_GOT_OFST \.data\+0x3c + 598: R_MIPS_NONE \*ABS\*\+0x3c + 598: R_MIPS_NONE \*ABS\*\+0x3c +000000000000059c 1000fe98 b 0000000000000000 +00000000000005a0 00000000 nop +00000000000005a4 df850000 ld a1,0\(gp\) + 5a4: R_MIPS_GOT_PAGE \.data\+0xc0 + 5a4: R_MIPS_NONE \*ABS\*\+0xc0 + 5a4: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000005a8 64a50000 daddiu a1,a1,0 + 5a8: R_MIPS_GOT_OFST \.data\+0xc0 + 5a8: R_MIPS_NONE \*ABS\*\+0xc0 + 5a8: R_MIPS_NONE \*ABS\*\+0xc0 +00000000000005ac 10000014 b 0000000000000600 +00000000000005b0 00000000 nop +00000000000005b4 df850000 ld a1,0\(gp\) + 5b4: R_MIPS_GOT_PAGE \.data\+0x1e27c + 5b4: R_MIPS_NONE \*ABS\*\+0x1e27c + 5b4: R_MIPS_NONE \*ABS\*\+0x1e27c +00000000000005b8 64a50000 daddiu a1,a1,0 + 5b8: R_MIPS_GOT_OFST \.data\+0x1e27c + 5b8: R_MIPS_NONE \*ABS\*\+0x1e27c + 5b8: R_MIPS_NONE \*ABS\*\+0x1e27c +00000000000005bc 1000fe90 b 0000000000000000 +00000000000005c0 00000000 nop +00000000000005c4 df850000 ld a1,0\(gp\) + 5c4: R_MIPS_GOT_PAGE \.data\+0xb4 + 5c4: R_MIPS_NONE \*ABS\*\+0xb4 + 5c4: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000005c8 dca50000 ld a1,0\(a1\) + 5c8: R_MIPS_GOT_OFST \.data\+0xb4 + 5c8: R_MIPS_NONE \*ABS\*\+0xb4 + 5c8: R_MIPS_NONE \*ABS\*\+0xb4 +00000000000005cc 1000000c b 0000000000000600 +00000000000005d0 00000000 nop +00000000000005d4 df850000 ld a1,0\(gp\) + 5d4: R_MIPS_GOT_PAGE \.data\+0x48 + 5d4: R_MIPS_NONE \*ABS\*\+0x48 + 5d4: R_MIPS_NONE \*ABS\*\+0x48 +00000000000005d8 dca50000 ld a1,0\(a1\) + 5d8: R_MIPS_GOT_OFST \.data\+0x48 + 5d8: R_MIPS_NONE \*ABS\*\+0x48 + 5d8: R_MIPS_NONE \*ABS\*\+0x48 +00000000000005dc 1000fe88 b 0000000000000000 +00000000000005e0 00000000 nop +00000000000005e4 df810000 ld at,0\(gp\) + 5e4: R_MIPS_GOT_PAGE \.data\+0xd6 + 5e4: R_MIPS_NONE \*ABS\*\+0xd6 + 5e4: R_MIPS_NONE \*ABS\*\+0xd6 +00000000000005e8 0025082d daddu at,at,a1 +00000000000005ec dc250000 ld a1,0\(at\) + 5ec: R_MIPS_GOT_OFST \.data\+0xd6 + 5ec: R_MIPS_NONE \*ABS\*\+0xd6 + 5ec: R_MIPS_NONE \*ABS\*\+0xd6 +00000000000005f0 10000003 b 0000000000000600 +00000000000005f4 00000000 nop + \.\.\. Index: gas/testsuite/gas/mips/mips.exp =================================================================== RCS file: /cvs/uberbaum/gas/testsuite/gas/mips/mips.exp,v retrieving revision 1.66 diff -u -p -r1.66 mips.exp --- gas/testsuite/gas/mips/mips.exp 4 Apr 2003 17:35:44 -0000 1.66 +++ gas/testsuite/gas/mips/mips.exp 8 Apr 2003 10:02:29 -0000 @@ -626,6 +626,14 @@ if { [istarget mips*-*-*] } then { run_dump_test "elf-rel12" run_dump_test "elf-rel13" run_dump_test "elf-rel14" + + if $has_newabi { + run_dump_test "elf-rel-got-n32" + run_dump_test "elf-rel-xgot-n32" + run_dump_test "elf-rel-got-n64" + run_dump_test "elf-rel-xgot-n64" + } + run_dump_test "${tmips}${el}empic" run_dump_test "empic2" run_dump_test "empic3_e" Index: ld/testsuite/ld-mips-elf/elf-rel-got-n32.d =================================================================== RCS file: ld/testsuite/ld-mips-elf/elf-rel-got-n32.d diff -N ld/testsuite/ld-mips-elf/elf-rel-got-n32.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ ld/testsuite/ld-mips-elf/elf-rel-got-n32.d 8 Apr 2003 10:02:29 -0000 @@ -0,0 +1,313 @@ +#name: MIPS ELF got reloc n32 +#as: -n32 -KPIC +#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n32.s +#ld: -melf32btsmipn32 +#objdump: -D --show-raw-insn + +.*: +file format elf32-n.*mips.* + +Disassembly of section \.text: + +100000a0 : +100000a0: 8f858064 lw a1,-32668\(gp\) +100000a4: 8f858064 lw a1,-32668\(gp\) +100000a8: 20a5000c addi a1,a1,12 +100000ac: 8f858064 lw a1,-32668\(gp\) +100000b0: 3c010002 lui at,0x2 +100000b4: 2021e240 addi at,at,-7616 +100000b8: 00a12820 add a1,a1,at +100000bc: 8f858064 lw a1,-32668\(gp\) +100000c0: 00b12820 add a1,a1,s1 +100000c4: 8f858064 lw a1,-32668\(gp\) +100000c8: 20a5000c addi a1,a1,12 +100000cc: 00b12820 add a1,a1,s1 +100000d0: 8f858064 lw a1,-32668\(gp\) +100000d4: 3c010002 lui at,0x2 +100000d8: 2021e240 addi at,at,-7616 +100000dc: 00a12820 add a1,a1,at +100000e0: 00b12820 add a1,a1,s1 +100000e4: 8f858064 lw a1,-32668\(gp\) +100000e8: 8ca50000 lw a1,0\(a1\) +100000ec: 8f858064 lw a1,-32668\(gp\) +100000f0: 8ca5000c lw a1,12\(a1\) +100000f4: 8f858064 lw a1,-32668\(gp\) +100000f8: 00b12820 add a1,a1,s1 +100000fc: 8ca50000 lw a1,0\(a1\) +10000100: 8f858064 lw a1,-32668\(gp\) +10000104: 00b12820 add a1,a1,s1 +10000108: 8ca5000c lw a1,12\(a1\) +1000010c: 8f818064 lw at,-32668\(gp\) +10000110: 00250820 add at,at,a1 +10000114: 8c250022 lw a1,34\(at\) +10000118: 8f818064 lw at,-32668\(gp\) +1000011c: 00250820 add at,at,a1 +10000120: ac250038 sw a1,56\(at\) +10000124: 8f818064 lw at,-32668\(gp\) +10000128: 88250000 lwl a1,0\(at\) +1000012c: 98250003 lwr a1,3\(at\) +10000130: 8f818064 lw at,-32668\(gp\) +10000134: 2021000c addi at,at,12 +10000138: 88250000 lwl a1,0\(at\) +1000013c: 98250003 lwr a1,3\(at\) +10000140: 8f818064 lw at,-32668\(gp\) +10000144: 00310820 add at,at,s1 +10000148: 88250000 lwl a1,0\(at\) +1000014c: 98250003 lwr a1,3\(at\) +10000150: 8f818064 lw at,-32668\(gp\) +10000154: 2021000c addi at,at,12 +10000158: 00310820 add at,at,s1 +1000015c: 88250000 lwl a1,0\(at\) +10000160: 98250003 lwr a1,3\(at\) +10000164: 8f818064 lw at,-32668\(gp\) +10000168: 20210022 addi at,at,34 +1000016c: 00250820 add at,at,a1 +10000170: 88250000 lwl a1,0\(at\) +10000174: 98250003 lwr a1,3\(at\) +10000178: 8f818064 lw at,-32668\(gp\) +1000017c: 20210038 addi at,at,56 +10000180: 00250820 add at,at,a1 +10000184: a8250000 swl a1,0\(at\) +10000188: b8250003 swr a1,3\(at\) +1000018c: 8f858018 lw a1,-32744\(gp\) +10000190: 8f85801c lw a1,-32740\(gp\) +10000194: 8f858020 lw a1,-32736\(gp\) +10000198: 8f858018 lw a1,-32744\(gp\) +1000019c: 00b12820 add a1,a1,s1 +100001a0: 8f85801c lw a1,-32740\(gp\) +100001a4: 00b12820 add a1,a1,s1 +100001a8: 8f858020 lw a1,-32736\(gp\) +100001ac: 00b12820 add a1,a1,s1 +100001b0: 8f858024 lw a1,-32732\(gp\) +100001b4: 8ca5050c lw a1,1292\(a1\) +100001b8: 8f858024 lw a1,-32732\(gp\) +100001bc: 8ca50518 lw a1,1304\(a1\) +100001c0: 8f858024 lw a1,-32732\(gp\) +100001c4: 00b12820 add a1,a1,s1 +100001c8: 8ca5050c lw a1,1292\(a1\) +100001cc: 8f858024 lw a1,-32732\(gp\) +100001d0: 00b12820 add a1,a1,s1 +100001d4: 8ca50518 lw a1,1304\(a1\) +100001d8: 8f818024 lw at,-32732\(gp\) +100001dc: 00250820 add at,at,a1 +100001e0: 8c25052e lw a1,1326\(at\) +100001e4: 8f818024 lw at,-32732\(gp\) +100001e8: 00250820 add at,at,a1 +100001ec: ac250544 sw a1,1348\(at\) +100001f0: 8f818018 lw at,-32744\(gp\) +100001f4: 88250000 lwl a1,0\(at\) +100001f8: 98250003 lwr a1,3\(at\) +100001fc: 8f81801c lw at,-32740\(gp\) +10000200: 88250000 lwl a1,0\(at\) +10000204: 98250003 lwr a1,3\(at\) +10000208: 8f818018 lw at,-32744\(gp\) +1000020c: 00310820 add at,at,s1 +10000210: 88250000 lwl a1,0\(at\) +10000214: 98250003 lwr a1,3\(at\) +10000218: 8f81801c lw at,-32740\(gp\) +1000021c: 00310820 add at,at,s1 +10000220: 88250000 lwl a1,0\(at\) +10000224: 98250003 lwr a1,3\(at\) +10000228: 8f818028 lw at,-32728\(gp\) +1000022c: 00250820 add at,at,a1 +10000230: 88250000 lwl a1,0\(at\) +10000234: 98250003 lwr a1,3\(at\) +10000238: 8f81802c lw at,-32724\(gp\) +1000023c: 00250820 add at,at,a1 +10000240: a8250000 swl a1,0\(at\) +10000244: b8250003 swr a1,3\(at\) +10000248: 8f85805c lw a1,-32676\(gp\) +1000024c: 8f858030 lw a1,-32720\(gp\) +10000250: 8f99805c lw t9,-32676\(gp\) +10000254: 8f998030 lw t9,-32720\(gp\) +10000258: 8f99805c lw t9,-32676\(gp\) +1000025c: 0320f809 jalr t9 +10000260: 00000000 nop +10000264: 8f998030 lw t9,-32720\(gp\) +10000268: 0320f809 jalr t9 +1000026c: 00000000 nop +10000270: 8f858068 lw a1,-32664\(gp\) +10000274: 8f858068 lw a1,-32664\(gp\) +10000278: 20a5000c addi a1,a1,12 +1000027c: 8f858068 lw a1,-32664\(gp\) +10000280: 3c010002 lui at,0x2 +10000284: 2021e240 addi at,at,-7616 +10000288: 00a12820 add a1,a1,at +1000028c: 8f858068 lw a1,-32664\(gp\) +10000290: 00b12820 add a1,a1,s1 +10000294: 8f858068 lw a1,-32664\(gp\) +10000298: 20a5000c addi a1,a1,12 +1000029c: 00b12820 add a1,a1,s1 +100002a0: 8f858068 lw a1,-32664\(gp\) +100002a4: 3c010002 lui at,0x2 +100002a8: 2021e240 addi at,at,-7616 +100002ac: 00a12820 add a1,a1,at +100002b0: 00b12820 add a1,a1,s1 +100002b4: 8f858068 lw a1,-32664\(gp\) +100002b8: 8ca50000 lw a1,0\(a1\) +100002bc: 8f858068 lw a1,-32664\(gp\) +100002c0: 8ca5000c lw a1,12\(a1\) +100002c4: 8f858068 lw a1,-32664\(gp\) +100002c8: 00b12820 add a1,a1,s1 +100002cc: 8ca50000 lw a1,0\(a1\) +100002d0: 8f858068 lw a1,-32664\(gp\) +100002d4: 00b12820 add a1,a1,s1 +100002d8: 8ca5000c lw a1,12\(a1\) +100002dc: 8f818068 lw at,-32664\(gp\) +100002e0: 00250820 add at,at,a1 +100002e4: 8c250022 lw a1,34\(at\) +100002e8: 8f818068 lw at,-32664\(gp\) +100002ec: 00250820 add at,at,a1 +100002f0: ac250038 sw a1,56\(at\) +100002f4: 8f818068 lw at,-32664\(gp\) +100002f8: 88250000 lwl a1,0\(at\) +100002fc: 98250003 lwr a1,3\(at\) +10000300: 8f818068 lw at,-32664\(gp\) +10000304: 2021000c addi at,at,12 +10000308: 88250000 lwl a1,0\(at\) +1000030c: 98250003 lwr a1,3\(at\) +10000310: 8f818068 lw at,-32664\(gp\) +10000314: 00310820 add at,at,s1 +10000318: 88250000 lwl a1,0\(at\) +1000031c: 98250003 lwr a1,3\(at\) +10000320: 8f818068 lw at,-32664\(gp\) +10000324: 2021000c addi at,at,12 +10000328: 00310820 add at,at,s1 +1000032c: 88250000 lwl a1,0\(at\) +10000330: 98250003 lwr a1,3\(at\) +10000334: 8f818068 lw at,-32664\(gp\) +10000338: 20210022 addi at,at,34 +1000033c: 00250820 add at,at,a1 +10000340: 88250000 lwl a1,0\(at\) +10000344: 98250003 lwr a1,3\(at\) +10000348: 8f818068 lw at,-32664\(gp\) +1000034c: 20210038 addi at,at,56 +10000350: 00250820 add at,at,a1 +10000354: a8250000 swl a1,0\(at\) +10000358: b8250003 swr a1,3\(at\) +1000035c: 8f858034 lw a1,-32716\(gp\) +10000360: 8f858038 lw a1,-32712\(gp\) +10000364: 8f85803c lw a1,-32708\(gp\) +10000368: 8f858034 lw a1,-32716\(gp\) +1000036c: 00b12820 add a1,a1,s1 +10000370: 8f858038 lw a1,-32712\(gp\) +10000374: 00b12820 add a1,a1,s1 +10000378: 8f85803c lw a1,-32708\(gp\) +1000037c: 00b12820 add a1,a1,s1 +10000380: 8f858024 lw a1,-32732\(gp\) +10000384: 8ca50584 lw a1,1412\(a1\) +10000388: 8f858024 lw a1,-32732\(gp\) +1000038c: 8ca50590 lw a1,1424\(a1\) +10000390: 8f858024 lw a1,-32732\(gp\) +10000394: 00b12820 add a1,a1,s1 +10000398: 8ca50584 lw a1,1412\(a1\) +1000039c: 8f858024 lw a1,-32732\(gp\) +100003a0: 00b12820 add a1,a1,s1 +100003a4: 8ca50590 lw a1,1424\(a1\) +100003a8: 8f818024 lw at,-32732\(gp\) +100003ac: 00250820 add at,at,a1 +100003b0: 8c2505a6 lw a1,1446\(at\) +100003b4: 8f818024 lw at,-32732\(gp\) +100003b8: 00250820 add at,at,a1 +100003bc: ac2505bc sw a1,1468\(at\) +100003c0: 8f818034 lw at,-32716\(gp\) +100003c4: 88250000 lwl a1,0\(at\) +100003c8: 98250003 lwr a1,3\(at\) +100003cc: 8f818038 lw at,-32712\(gp\) +100003d0: 88250000 lwl a1,0\(at\) +100003d4: 98250003 lwr a1,3\(at\) +100003d8: 8f818034 lw at,-32716\(gp\) +100003dc: 00310820 add at,at,s1 +100003e0: 88250000 lwl a1,0\(at\) +100003e4: 98250003 lwr a1,3\(at\) +100003e8: 8f818038 lw at,-32712\(gp\) +100003ec: 00310820 add at,at,s1 +100003f0: 88250000 lwl a1,0\(at\) +100003f4: 98250003 lwr a1,3\(at\) +100003f8: 8f818040 lw at,-32704\(gp\) +100003fc: 00250820 add at,at,a1 +10000400: 88250000 lwl a1,0\(at\) +10000404: 98250003 lwr a1,3\(at\) +10000408: 8f818044 lw at,-32700\(gp\) +1000040c: 00250820 add at,at,a1 +10000410: a8250000 swl a1,0\(at\) +10000414: b8250003 swr a1,3\(at\) +10000418: 8f858060 lw a1,-32672\(gp\) +1000041c: 8f858048 lw a1,-32696\(gp\) +10000420: 8f998060 lw t9,-32672\(gp\) +10000424: 8f998048 lw t9,-32696\(gp\) +10000428: 8f998060 lw t9,-32672\(gp\) +1000042c: 0320f809 jalr t9 +10000430: 00000000 nop +10000434: 8f998048 lw t9,-32696\(gp\) +10000438: 0320f809 jalr t9 +1000043c: 00000000 nop +10000440: 1000ff17 b 100000a0 +10000444: 8f858064 lw a1,-32668\(gp\) +10000448: 8f858068 lw a1,-32664\(gp\) +1000044c: 10000015 b 100004a4 +10000450: 8ca50000 lw a1,0\(a1\) +10000454: 1000ff12 b 100000a0 +10000458: 8f858018 lw a1,-32744\(gp\) +1000045c: 8f858038 lw a1,-32712\(gp\) +10000460: 10000010 b 100004a4 +10000464: 00000000 nop +10000468: 8f858020 lw a1,-32736\(gp\) +1000046c: 1000ff0c b 100000a0 +10000470: 00000000 nop +10000474: 8f858024 lw a1,-32732\(gp\) +10000478: 1000000a b 100004a4 +1000047c: 8ca50584 lw a1,1412\(a1\) +10000480: 8f858024 lw a1,-32732\(gp\) +10000484: 1000ff06 b 100000a0 +10000488: 8ca50518 lw a1,1304\(a1\) +1000048c: 8f818024 lw at,-32732\(gp\) +10000490: 00250820 add at,at,a1 +10000494: 10000003 b 100004a4 +10000498: 8c2505a6 lw a1,1446\(at\) + \.\.\. + +100004a4 : + \.\.\. +Disassembly of section \.reginfo: + +100004b0 <\.reginfo>: +100004b0: 92020022 .* + \.\.\. +100004c4: 101085b0 .* +Disassembly of section \.data: + +101004d0 <_fdata>: + \.\.\. + +1010050c : + \.\.\. + +10100548 : + \.\.\. + +10100584 : + \.\.\. +Disassembly of section \.got: + +101005c0 <_GLOBAL_OFFSET_TABLE_>: +101005c0: 00000000 .* +101005c4: 80000000 .* +101005c8: 1010050c .* +101005cc: 10100518 .* +101005d0: 1011e74c .* +101005d4: 10100000 .* +101005d8: 1010052e .* +101005dc: 10100544 .* +101005e0: 100000a0 .* +101005e4: 10100584 .* +101005e8: 10100590 .* +101005ec: 1011e7c4 .* +101005f0: 101005a6 .* +101005f4: 101005bc .* +101005f8: 100004a4 .* +101005fc: 00000000 .* + \.\.\. +1010060c: 100000a0 .* +10100610: 100004a4 .* +10100614: 1010050c .* +10100618: 10100584 .* Index: ld/testsuite/ld-mips-elf/elf-rel-got-n64.d =================================================================== RCS file: ld/testsuite/ld-mips-elf/elf-rel-got-n64.d diff -N ld/testsuite/ld-mips-elf/elf-rel-got-n64.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ ld/testsuite/ld-mips-elf/elf-rel-got-n64.d 8 Apr 2003 10:02:29 -0000 @@ -0,0 +1,331 @@ +#name: MIPS ELF got reloc n64 +#as: -64 -KPIC +#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n64.s +#ld: -melf64btsmip +#objdump: -D --show-raw-insn + +.*: +file format elf64-.*mips.* + +Disassembly of section \.MIPS\.options: + +00000000100000b0 <\.MIPS\.options>: + 100000b0: 01280000 .* + 100000b4: 00000000 .* + 100000b8: 92020022 .* + \.\.\. + 100000d4: 101085d0 .* +Disassembly of section \.text: + +00000000100000e0 : + 100000e0: df8580b8 ld a1,-32584\(gp\) + 100000e4: df8580b8 ld a1,-32584\(gp\) + 100000e8: 64a5000c daddiu a1,a1,12 + 100000ec: df8580b8 ld a1,-32584\(gp\) + 100000f0: 3c010002 lui at,0x2 + 100000f4: 6421e240 daddiu at,at,-7616 + 100000f8: 00a1282d daddu a1,a1,at + 100000fc: df8580b8 ld a1,-32584\(gp\) + 10000100: 00b1282d daddu a1,a1,s1 + 10000104: df8580b8 ld a1,-32584\(gp\) + 10000108: 64a5000c daddiu a1,a1,12 + 1000010c: 00b1282d daddu a1,a1,s1 + 10000110: df8580b8 ld a1,-32584\(gp\) + 10000114: 3c010002 lui at,0x2 + 10000118: 6421e240 daddiu at,at,-7616 + 1000011c: 00a1282d daddu a1,a1,at + 10000120: 00b1282d daddu a1,a1,s1 + 10000124: df8580b8 ld a1,-32584\(gp\) + 10000128: dca50000 ld a1,0\(a1\) + 1000012c: df8580b8 ld a1,-32584\(gp\) + 10000130: dca5000c ld a1,12\(a1\) + 10000134: df8580b8 ld a1,-32584\(gp\) + 10000138: 00b1282d daddu a1,a1,s1 + 1000013c: dca50000 ld a1,0\(a1\) + 10000140: df8580b8 ld a1,-32584\(gp\) + 10000144: 00b1282d daddu a1,a1,s1 + 10000148: dca5000c ld a1,12\(a1\) + 1000014c: df8180b8 ld at,-32584\(gp\) + 10000150: 0025082d daddu at,at,a1 + 10000154: dc250022 ld a1,34\(at\) + 10000158: df8180b8 ld at,-32584\(gp\) + 1000015c: 0025082d daddu at,at,a1 + 10000160: fc250038 sd a1,56\(at\) + 10000164: df8180b8 ld at,-32584\(gp\) + 10000168: 88250000 lwl a1,0\(at\) + 1000016c: 98250003 lwr a1,3\(at\) + 10000170: df8180b8 ld at,-32584\(gp\) + 10000174: 6421000c daddiu at,at,12 + 10000178: 88250000 lwl a1,0\(at\) + 1000017c: 98250003 lwr a1,3\(at\) + 10000180: df8180b8 ld at,-32584\(gp\) + 10000184: 0031082d daddu at,at,s1 + 10000188: 88250000 lwl a1,0\(at\) + 1000018c: 98250003 lwr a1,3\(at\) + 10000190: df8180b8 ld at,-32584\(gp\) + 10000194: 6421000c daddiu at,at,12 + 10000198: 0031082d daddu at,at,s1 + 1000019c: 88250000 lwl a1,0\(at\) + 100001a0: 98250003 lwr a1,3\(at\) + 100001a4: df8180b8 ld at,-32584\(gp\) + 100001a8: 64210022 daddiu at,at,34 + 100001ac: 0025082d daddu at,at,a1 + 100001b0: 88250000 lwl a1,0\(at\) + 100001b4: 98250003 lwr a1,3\(at\) + 100001b8: df8180b8 ld at,-32584\(gp\) + 100001bc: 64210038 daddiu at,at,56 + 100001c0: 0025082d daddu at,at,a1 + 100001c4: a8250000 swl a1,0\(at\) + 100001c8: b8250003 swr a1,3\(at\) + 100001cc: df858020 ld a1,-32736\(gp\) + 100001d0: df858028 ld a1,-32728\(gp\) + 100001d4: df858030 ld a1,-32720\(gp\) + 100001d8: df858020 ld a1,-32736\(gp\) + 100001dc: 00b1282d daddu a1,a1,s1 + 100001e0: df858028 ld a1,-32728\(gp\) + 100001e4: 00b1282d daddu a1,a1,s1 + 100001e8: df858030 ld a1,-32720\(gp\) + 100001ec: 00b1282d daddu a1,a1,s1 + 100001f0: df858038 ld a1,-32712\(gp\) + 100001f4: dca5052c ld a1,1324\(a1\) + 100001f8: df858038 ld a1,-32712\(gp\) + 100001fc: dca50538 ld a1,1336\(a1\) + 10000200: df858038 ld a1,-32712\(gp\) + 10000204: 00b1282d daddu a1,a1,s1 + 10000208: dca5052c ld a1,1324\(a1\) + 1000020c: df858038 ld a1,-32712\(gp\) + 10000210: 00b1282d daddu a1,a1,s1 + 10000214: dca50538 ld a1,1336\(a1\) + 10000218: df818038 ld at,-32712\(gp\) + 1000021c: 0025082d daddu at,at,a1 + 10000220: dc25054e ld a1,1358\(at\) + 10000224: df818038 ld at,-32712\(gp\) + 10000228: 0025082d daddu at,at,a1 + 1000022c: fc250564 sd a1,1380\(at\) + 10000230: df818020 ld at,-32736\(gp\) + 10000234: 88250000 lwl a1,0\(at\) + 10000238: 98250003 lwr a1,3\(at\) + 1000023c: df818028 ld at,-32728\(gp\) + 10000240: 88250000 lwl a1,0\(at\) + 10000244: 98250003 lwr a1,3\(at\) + 10000248: df818020 ld at,-32736\(gp\) + 1000024c: 0031082d daddu at,at,s1 + 10000250: 88250000 lwl a1,0\(at\) + 10000254: 98250003 lwr a1,3\(at\) + 10000258: df818028 ld at,-32728\(gp\) + 1000025c: 0031082d daddu at,at,s1 + 10000260: 88250000 lwl a1,0\(at\) + 10000264: 98250003 lwr a1,3\(at\) + 10000268: df818040 ld at,-32704\(gp\) + 1000026c: 0025082d daddu at,at,a1 + 10000270: 88250000 lwl a1,0\(at\) + 10000274: 98250003 lwr a1,3\(at\) + 10000278: df818048 ld at,-32696\(gp\) + 1000027c: 0025082d daddu at,at,a1 + 10000280: a8250000 swl a1,0\(at\) + 10000284: b8250003 swr a1,3\(at\) + 10000288: df8580a8 ld a1,-32600\(gp\) + 1000028c: df858050 ld a1,-32688\(gp\) + 10000290: df9980a8 ld t9,-32600\(gp\) + 10000294: df998050 ld t9,-32688\(gp\) + 10000298: df9980a8 ld t9,-32600\(gp\) + 1000029c: 0320f809 jalr t9 + 100002a0: 00000000 nop + 100002a4: df998050 ld t9,-32688\(gp\) + 100002a8: 0320f809 jalr t9 + 100002ac: 00000000 nop + 100002b0: df8580c0 ld a1,-32576\(gp\) + 100002b4: df8580c0 ld a1,-32576\(gp\) + 100002b8: 64a5000c daddiu a1,a1,12 + 100002bc: df8580c0 ld a1,-32576\(gp\) + 100002c0: 3c010002 lui at,0x2 + 100002c4: 6421e240 daddiu at,at,-7616 + 100002c8: 00a1282d daddu a1,a1,at + 100002cc: df8580c0 ld a1,-32576\(gp\) + 100002d0: 00b1282d daddu a1,a1,s1 + 100002d4: df8580c0 ld a1,-32576\(gp\) + 100002d8: 64a5000c daddiu a1,a1,12 + 100002dc: 00b1282d daddu a1,a1,s1 + 100002e0: df8580c0 ld a1,-32576\(gp\) + 100002e4: 3c010002 lui at,0x2 + 100002e8: 6421e240 daddiu at,at,-7616 + 100002ec: 00a1282d daddu a1,a1,at + 100002f0: 00b1282d daddu a1,a1,s1 + 100002f4: df8580c0 ld a1,-32576\(gp\) + 100002f8: dca50000 ld a1,0\(a1\) + 100002fc: df8580c0 ld a1,-32576\(gp\) + 10000300: dca5000c ld a1,12\(a1\) + 10000304: df8580c0 ld a1,-32576\(gp\) + 10000308: 00b1282d daddu a1,a1,s1 + 1000030c: dca50000 ld a1,0\(a1\) + 10000310: df8580c0 ld a1,-32576\(gp\) + 10000314: 00b1282d daddu a1,a1,s1 + 10000318: dca5000c ld a1,12\(a1\) + 1000031c: df8180c0 ld at,-32576\(gp\) + 10000320: 0025082d daddu at,at,a1 + 10000324: dc250022 ld a1,34\(at\) + 10000328: df8180c0 ld at,-32576\(gp\) + 1000032c: 0025082d daddu at,at,a1 + 10000330: fc250038 sd a1,56\(at\) + 10000334: df8180c0 ld at,-32576\(gp\) + 10000338: 88250000 lwl a1,0\(at\) + 1000033c: 98250003 lwr a1,3\(at\) + 10000340: df8180c0 ld at,-32576\(gp\) + 10000344: 6421000c daddiu at,at,12 + 10000348: 88250000 lwl a1,0\(at\) + 1000034c: 98250003 lwr a1,3\(at\) + 10000350: df8180c0 ld at,-32576\(gp\) + 10000354: 0031082d daddu at,at,s1 + 10000358: 88250000 lwl a1,0\(at\) + 1000035c: 98250003 lwr a1,3\(at\) + 10000360: df8180c0 ld at,-32576\(gp\) + 10000364: 6421000c daddiu at,at,12 + 10000368: 0031082d daddu at,at,s1 + 1000036c: 88250000 lwl a1,0\(at\) + 10000370: 98250003 lwr a1,3\(at\) + 10000374: df8180c0 ld at,-32576\(gp\) + 10000378: 64210022 daddiu at,at,34 + 1000037c: 0025082d daddu at,at,a1 + 10000380: 88250000 lwl a1,0\(at\) + 10000384: 98250003 lwr a1,3\(at\) + 10000388: df8180c0 ld at,-32576\(gp\) + 1000038c: 64210038 daddiu at,at,56 + 10000390: 0025082d daddu at,at,a1 + 10000394: a8250000 swl a1,0\(at\) + 10000398: b8250003 swr a1,3\(at\) + 1000039c: df858058 ld a1,-32680\(gp\) + 100003a0: df858060 ld a1,-32672\(gp\) + 100003a4: df858068 ld a1,-32664\(gp\) + 100003a8: df858058 ld a1,-32680\(gp\) + 100003ac: 00b1282d daddu a1,a1,s1 + 100003b0: df858060 ld a1,-32672\(gp\) + 100003b4: 00b1282d daddu a1,a1,s1 + 100003b8: df858068 ld a1,-32664\(gp\) + 100003bc: 00b1282d daddu a1,a1,s1 + 100003c0: df858038 ld a1,-32712\(gp\) + 100003c4: dca505a4 ld a1,1444\(a1\) + 100003c8: df858038 ld a1,-32712\(gp\) + 100003cc: dca505b0 ld a1,1456\(a1\) + 100003d0: df858038 ld a1,-32712\(gp\) + 100003d4: 00b1282d daddu a1,a1,s1 + 100003d8: dca505a4 ld a1,1444\(a1\) + 100003dc: df858038 ld a1,-32712\(gp\) + 100003e0: 00b1282d daddu a1,a1,s1 + 100003e4: dca505b0 ld a1,1456\(a1\) + 100003e8: df818038 ld at,-32712\(gp\) + 100003ec: 0025082d daddu at,at,a1 + 100003f0: dc2505c6 ld a1,1478\(at\) + 100003f4: df818038 ld at,-32712\(gp\) + 100003f8: 0025082d daddu at,at,a1 + 100003fc: fc2505dc sd a1,1500\(at\) + 10000400: df818058 ld at,-32680\(gp\) + 10000404: 88250000 lwl a1,0\(at\) + 10000408: 98250003 lwr a1,3\(at\) + 1000040c: df818060 ld at,-32672\(gp\) + 10000410: 88250000 lwl a1,0\(at\) + 10000414: 98250003 lwr a1,3\(at\) + 10000418: df818058 ld at,-32680\(gp\) + 1000041c: 0031082d daddu at,at,s1 + 10000420: 88250000 lwl a1,0\(at\) + 10000424: 98250003 lwr a1,3\(at\) + 10000428: df818060 ld at,-32672\(gp\) + 1000042c: 0031082d daddu at,at,s1 + 10000430: 88250000 lwl a1,0\(at\) + 10000434: 98250003 lwr a1,3\(at\) + 10000438: df818070 ld at,-32656\(gp\) + 1000043c: 0025082d daddu at,at,a1 + 10000440: 88250000 lwl a1,0\(at\) + 10000444: 98250003 lwr a1,3\(at\) + 10000448: df818078 ld at,-32648\(gp\) + 1000044c: 0025082d daddu at,at,a1 + 10000450: a8250000 swl a1,0\(at\) + 10000454: b8250003 swr a1,3\(at\) + 10000458: df8580b0 ld a1,-32592\(gp\) + 1000045c: df858080 ld a1,-32640\(gp\) + 10000460: df9980b0 ld t9,-32592\(gp\) + 10000464: df998080 ld t9,-32640\(gp\) + 10000468: df9980b0 ld t9,-32592\(gp\) + 1000046c: 0320f809 jalr t9 + 10000470: 00000000 nop + 10000474: df998080 ld t9,-32640\(gp\) + 10000478: 0320f809 jalr t9 + 1000047c: 00000000 nop + 10000480: 1000ff17 b 100000e0 + 10000484: df8580b8 ld a1,-32584\(gp\) + 10000488: df8580c0 ld a1,-32576\(gp\) + 1000048c: 10000015 b 100004e4 + 10000490: dca50000 ld a1,0\(a1\) + 10000494: 1000ff12 b 100000e0 + 10000498: df858020 ld a1,-32736\(gp\) + 1000049c: df858060 ld a1,-32672\(gp\) + 100004a0: 10000010 b 100004e4 + 100004a4: 00000000 nop + 100004a8: df858030 ld a1,-32720\(gp\) + 100004ac: 1000ff0c b 100000e0 + 100004b0: 00000000 nop + 100004b4: df858038 ld a1,-32712\(gp\) + 100004b8: 1000000a b 100004e4 + 100004bc: dca505a4 ld a1,1444\(a1\) + 100004c0: df858038 ld a1,-32712\(gp\) + 100004c4: 1000ff06 b 100000e0 + 100004c8: dca50538 ld a1,1336\(a1\) + 100004cc: df818038 ld at,-32712\(gp\) + 100004d0: 0025082d daddu at,at,a1 + 100004d4: 10000003 b 100004e4 + 100004d8: dc2505c6 ld a1,1478\(at\) + \.\.\. + +00000000100004e4 : + \.\.\. +Disassembly of section \.data: + +00000000101004f0 <_fdata>: + \.\.\. + +000000001010052c : + \.\.\. + +0000000010100568 : + \.\.\. + +00000000101005a4 : + \.\.\. +Disassembly of section \.got: + +00000000101005e0 <_GLOBAL_OFFSET_TABLE_>: + \.\.\. + 101005ec: 80000000 .* + 101005f0: 00000000 .* + 101005f4: 1010052c .* + 101005f8: 00000000 .* + 101005fc: 10100538 .* + 10100600: 00000000 .* + 10100604: 1011e76c .* + 10100608: 00000000 .* + 1010060c: 10100000 .* + 10100610: 00000000 .* + 10100614: 1010054e .* + 10100618: 00000000 .* + 1010061c: 10100564 .* + 10100620: 00000000 .* + 10100624: 100000e0 .* + 10100628: 00000000 .* + 1010062c: 101005a4 .* + 10100630: 00000000 .* + 10100634: 101005b0 .* + 10100638: 00000000 .* + 1010063c: 1011e7e4 .* + 10100640: 00000000 .* + 10100644: 101005c6 .* + 10100648: 00000000 .* + 1010064c: 101005dc .* + 10100650: 00000000 .* + 10100654: 100004e4 .* + 10100658: 00000000 .* + \.\.\. + 1010067c: 100000e0 .* + 10100680: 00000000 .* + 10100684: 100004e4 .* + 10100688: 00000000 .* + 1010068c: 1010052c .* + 10100690: 00000000 .* + 10100694: 101005a4 .* Index: ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d =================================================================== RCS file: ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d diff -N ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d 8 Apr 2003 10:02:29 -0000 @@ -0,0 +1,427 @@ +#name: MIPS ELF xgot reloc n32 +#as: -n32 -KPIC -xgot +#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n32.s +#ld: -melf32btsmipn32 +#objdump: -D --show-raw-insn + +.*: +file format elf32-n.*mips.* + +Disassembly of section \.text: + +100000a0 : +100000a0: 3c050000 lui a1,0x0 +100000a4: 00bc2820 add a1,a1,gp +100000a8: 8ca58034 lw a1,-32716\(a1\) +100000ac: 3c050000 lui a1,0x0 +100000b0: 00bc2820 add a1,a1,gp +100000b4: 8ca58034 lw a1,-32716\(a1\) +100000b8: 20a5000c addi a1,a1,12 +100000bc: 3c050000 lui a1,0x0 +100000c0: 00bc2820 add a1,a1,gp +100000c4: 8ca58034 lw a1,-32716\(a1\) +100000c8: 3c010002 lui at,0x2 +100000cc: 2021e240 addi at,at,-7616 +100000d0: 00a12820 add a1,a1,at +100000d4: 3c050000 lui a1,0x0 +100000d8: 00bc2820 add a1,a1,gp +100000dc: 8ca58034 lw a1,-32716\(a1\) +100000e0: 00b12820 add a1,a1,s1 +100000e4: 3c050000 lui a1,0x0 +100000e8: 00bc2820 add a1,a1,gp +100000ec: 8ca58034 lw a1,-32716\(a1\) +100000f0: 20a5000c addi a1,a1,12 +100000f4: 00b12820 add a1,a1,s1 +100000f8: 3c050000 lui a1,0x0 +100000fc: 00bc2820 add a1,a1,gp +10000100: 8ca58034 lw a1,-32716\(a1\) +10000104: 3c010002 lui at,0x2 +10000108: 2021e240 addi at,at,-7616 +1000010c: 00a12820 add a1,a1,at +10000110: 00b12820 add a1,a1,s1 +10000114: 3c050000 lui a1,0x0 +10000118: 00bc2820 add a1,a1,gp +1000011c: 8ca58034 lw a1,-32716\(a1\) +10000120: 8ca50000 lw a1,0\(a1\) +10000124: 3c050000 lui a1,0x0 +10000128: 00bc2820 add a1,a1,gp +1000012c: 8ca58034 lw a1,-32716\(a1\) +10000130: 8ca5000c lw a1,12\(a1\) +10000134: 3c050000 lui a1,0x0 +10000138: 00bc2820 add a1,a1,gp +1000013c: 8ca58034 lw a1,-32716\(a1\) +10000140: 00b12820 add a1,a1,s1 +10000144: 8ca50000 lw a1,0\(a1\) +10000148: 3c050000 lui a1,0x0 +1000014c: 00bc2820 add a1,a1,gp +10000150: 8ca58034 lw a1,-32716\(a1\) +10000154: 00b12820 add a1,a1,s1 +10000158: 8ca5000c lw a1,12\(a1\) +1000015c: 3c010000 lui at,0x0 +10000160: 003c0820 add at,at,gp +10000164: 8c218034 lw at,-32716\(at\) +10000168: 00250820 add at,at,a1 +1000016c: 8c250022 lw a1,34\(at\) +10000170: 3c010000 lui at,0x0 +10000174: 003c0820 add at,at,gp +10000178: 8c218034 lw at,-32716\(at\) +1000017c: 00250820 add at,at,a1 +10000180: ac250038 sw a1,56\(at\) +10000184: 3c010000 lui at,0x0 +10000188: 003c0820 add at,at,gp +1000018c: 8c218034 lw at,-32716\(at\) +10000190: 88250000 lwl a1,0\(at\) +10000194: 98250003 lwr a1,3\(at\) +10000198: 3c010000 lui at,0x0 +1000019c: 003c0820 add at,at,gp +100001a0: 8c218034 lw at,-32716\(at\) +100001a4: 2021000c addi at,at,12 +100001a8: 88250000 lwl a1,0\(at\) +100001ac: 98250003 lwr a1,3\(at\) +100001b0: 3c010000 lui at,0x0 +100001b4: 003c0820 add at,at,gp +100001b8: 8c218034 lw at,-32716\(at\) +100001bc: 00310820 add at,at,s1 +100001c0: 88250000 lwl a1,0\(at\) +100001c4: 98250003 lwr a1,3\(at\) +100001c8: 3c010000 lui at,0x0 +100001cc: 003c0820 add at,at,gp +100001d0: 8c218034 lw at,-32716\(at\) +100001d4: 2021000c addi at,at,12 +100001d8: 00310820 add at,at,s1 +100001dc: 88250000 lwl a1,0\(at\) +100001e0: 98250003 lwr a1,3\(at\) +100001e4: 3c010000 lui at,0x0 +100001e8: 003c0820 add at,at,gp +100001ec: 8c218034 lw at,-32716\(at\) +100001f0: 20210022 addi at,at,34 +100001f4: 00250820 add at,at,a1 +100001f8: 88250000 lwl a1,0\(at\) +100001fc: 98250003 lwr a1,3\(at\) +10000200: 3c010000 lui at,0x0 +10000204: 003c0820 add at,at,gp +10000208: 8c218034 lw at,-32716\(at\) +1000020c: 20210038 addi at,at,56 +10000210: 00250820 add at,at,a1 +10000214: a8250000 swl a1,0\(at\) +10000218: b8250003 swr a1,3\(at\) +1000021c: 8f858018 lw a1,-32744\(gp\) +10000220: 20a506fc addi a1,a1,1788 +10000224: 8f858018 lw a1,-32744\(gp\) +10000228: 20a50708 addi a1,a1,1800 +1000022c: 8f85801c lw a1,-32740\(gp\) +10000230: 20a5e93c addi a1,a1,-5828 +10000234: 8f858018 lw a1,-32744\(gp\) +10000238: 20a506fc addi a1,a1,1788 +1000023c: 00b12820 add a1,a1,s1 +10000240: 8f858018 lw a1,-32744\(gp\) +10000244: 20a50708 addi a1,a1,1800 +10000248: 00b12820 add a1,a1,s1 +1000024c: 8f85801c lw a1,-32740\(gp\) +10000250: 20a5e93c addi a1,a1,-5828 +10000254: 00b12820 add a1,a1,s1 +10000258: 8f858018 lw a1,-32744\(gp\) +1000025c: 8ca506fc lw a1,1788\(a1\) +10000260: 8f858018 lw a1,-32744\(gp\) +10000264: 8ca50708 lw a1,1800\(a1\) +10000268: 8f858018 lw a1,-32744\(gp\) +1000026c: 00b12820 add a1,a1,s1 +10000270: 8ca506fc lw a1,1788\(a1\) +10000274: 8f858018 lw a1,-32744\(gp\) +10000278: 00b12820 add a1,a1,s1 +1000027c: 8ca50708 lw a1,1800\(a1\) +10000280: 8f818018 lw at,-32744\(gp\) +10000284: 00250820 add at,at,a1 +10000288: 8c25071e lw a1,1822\(at\) +1000028c: 8f818018 lw at,-32744\(gp\) +10000290: 00250820 add at,at,a1 +10000294: ac250734 sw a1,1844\(at\) +10000298: 8f818018 lw at,-32744\(gp\) +1000029c: 202106fc addi at,at,1788 +100002a0: 88250000 lwl a1,0\(at\) +100002a4: 98250003 lwr a1,3\(at\) +100002a8: 8f818018 lw at,-32744\(gp\) +100002ac: 20210708 addi at,at,1800 +100002b0: 88250000 lwl a1,0\(at\) +100002b4: 98250003 lwr a1,3\(at\) +100002b8: 8f818018 lw at,-32744\(gp\) +100002bc: 202106fc addi at,at,1788 +100002c0: 00310820 add at,at,s1 +100002c4: 88250000 lwl a1,0\(at\) +100002c8: 98250003 lwr a1,3\(at\) +100002cc: 8f818018 lw at,-32744\(gp\) +100002d0: 20210708 addi at,at,1800 +100002d4: 00310820 add at,at,s1 +100002d8: 88250000 lwl a1,0\(at\) +100002dc: 98250003 lwr a1,3\(at\) +100002e0: 8f818018 lw at,-32744\(gp\) +100002e4: 2021071e addi at,at,1822 +100002e8: 00250820 add at,at,a1 +100002ec: 88250000 lwl a1,0\(at\) +100002f0: 98250003 lwr a1,3\(at\) +100002f4: 8f818018 lw at,-32744\(gp\) +100002f8: 20210734 addi at,at,1844 +100002fc: 00250820 add at,at,a1 +10000300: a8250000 swl a1,0\(at\) +10000304: b8250003 swr a1,3\(at\) +10000308: 3c050000 lui a1,0x0 +1000030c: 00bc2820 add a1,a1,gp +10000310: 8ca5802c lw a1,-32724\(a1\) +10000314: 8f858020 lw a1,-32736\(gp\) +10000318: 20a500a0 addi a1,a1,160 +1000031c: 3c190000 lui t9,0x0 +10000320: 033cc820 add t9,t9,gp +10000324: 8f39802c lw t9,-32724\(t9\) +10000328: 8f998020 lw t9,-32736\(gp\) +1000032c: 233900a0 addi t9,t9,160 +10000330: 3c190000 lui t9,0x0 +10000334: 033cc820 add t9,t9,gp +10000338: 8f39802c lw t9,-32724\(t9\) +1000033c: 0320f809 jalr t9 +10000340: 00000000 nop +10000344: 8f998020 lw t9,-32736\(gp\) +10000348: 233900a0 addi t9,t9,160 +1000034c: 0320f809 jalr t9 +10000350: 00000000 nop +10000354: 3c050000 lui a1,0x0 +10000358: 00bc2820 add a1,a1,gp +1000035c: 8ca58038 lw a1,-32712\(a1\) +10000360: 3c050000 lui a1,0x0 +10000364: 00bc2820 add a1,a1,gp +10000368: 8ca58038 lw a1,-32712\(a1\) +1000036c: 20a5000c addi a1,a1,12 +10000370: 3c050000 lui a1,0x0 +10000374: 00bc2820 add a1,a1,gp +10000378: 8ca58038 lw a1,-32712\(a1\) +1000037c: 3c010002 lui at,0x2 +10000380: 2021e240 addi at,at,-7616 +10000384: 00a12820 add a1,a1,at +10000388: 3c050000 lui a1,0x0 +1000038c: 00bc2820 add a1,a1,gp +10000390: 8ca58038 lw a1,-32712\(a1\) +10000394: 00b12820 add a1,a1,s1 +10000398: 3c050000 lui a1,0x0 +1000039c: 00bc2820 add a1,a1,gp +100003a0: 8ca58038 lw a1,-32712\(a1\) +100003a4: 20a5000c addi a1,a1,12 +100003a8: 00b12820 add a1,a1,s1 +100003ac: 3c050000 lui a1,0x0 +100003b0: 00bc2820 add a1,a1,gp +100003b4: 8ca58038 lw a1,-32712\(a1\) +100003b8: 3c010002 lui at,0x2 +100003bc: 2021e240 addi at,at,-7616 +100003c0: 00a12820 add a1,a1,at +100003c4: 00b12820 add a1,a1,s1 +100003c8: 3c050000 lui a1,0x0 +100003cc: 00bc2820 add a1,a1,gp +100003d0: 8ca58038 lw a1,-32712\(a1\) +100003d4: 8ca50000 lw a1,0\(a1\) +100003d8: 3c050000 lui a1,0x0 +100003dc: 00bc2820 add a1,a1,gp +100003e0: 8ca58038 lw a1,-32712\(a1\) +100003e4: 8ca5000c lw a1,12\(a1\) +100003e8: 3c050000 lui a1,0x0 +100003ec: 00bc2820 add a1,a1,gp +100003f0: 8ca58038 lw a1,-32712\(a1\) +100003f4: 00b12820 add a1,a1,s1 +100003f8: 8ca50000 lw a1,0\(a1\) +100003fc: 3c050000 lui a1,0x0 +10000400: 00bc2820 add a1,a1,gp +10000404: 8ca58038 lw a1,-32712\(a1\) +10000408: 00b12820 add a1,a1,s1 +1000040c: 8ca5000c lw a1,12\(a1\) +10000410: 3c010000 lui at,0x0 +10000414: 003c0820 add at,at,gp +10000418: 8c218038 lw at,-32712\(at\) +1000041c: 00250820 add at,at,a1 +10000420: 8c250022 lw a1,34\(at\) +10000424: 3c010000 lui at,0x0 +10000428: 003c0820 add at,at,gp +1000042c: 8c218038 lw at,-32712\(at\) +10000430: 00250820 add at,at,a1 +10000434: ac250038 sw a1,56\(at\) +10000438: 3c010000 lui at,0x0 +1000043c: 003c0820 add at,at,gp +10000440: 8c218038 lw at,-32712\(at\) +10000444: 88250000 lwl a1,0\(at\) +10000448: 98250003 lwr a1,3\(at\) +1000044c: 3c010000 lui at,0x0 +10000450: 003c0820 add at,at,gp +10000454: 8c218038 lw at,-32712\(at\) +10000458: 2021000c addi at,at,12 +1000045c: 88250000 lwl a1,0\(at\) +10000460: 98250003 lwr a1,3\(at\) +10000464: 3c010000 lui at,0x0 +10000468: 003c0820 add at,at,gp +1000046c: 8c218038 lw at,-32712\(at\) +10000470: 00310820 add at,at,s1 +10000474: 88250000 lwl a1,0\(at\) +10000478: 98250003 lwr a1,3\(at\) +1000047c: 3c010000 lui at,0x0 +10000480: 003c0820 add at,at,gp +10000484: 8c218038 lw at,-32712\(at\) +10000488: 2021000c addi at,at,12 +1000048c: 00310820 add at,at,s1 +10000490: 88250000 lwl a1,0\(at\) +10000494: 98250003 lwr a1,3\(at\) +10000498: 3c010000 lui at,0x0 +1000049c: 003c0820 add at,at,gp +100004a0: 8c218038 lw at,-32712\(at\) +100004a4: 20210022 addi at,at,34 +100004a8: 00250820 add at,at,a1 +100004ac: 88250000 lwl a1,0\(at\) +100004b0: 98250003 lwr a1,3\(at\) +100004b4: 3c010000 lui at,0x0 +100004b8: 003c0820 add at,at,gp +100004bc: 8c218038 lw at,-32712\(at\) +100004c0: 20210038 addi at,at,56 +100004c4: 00250820 add at,at,a1 +100004c8: a8250000 swl a1,0\(at\) +100004cc: b8250003 swr a1,3\(at\) +100004d0: 8f858018 lw a1,-32744\(gp\) +100004d4: 20a50774 addi a1,a1,1908 +100004d8: 8f858018 lw a1,-32744\(gp\) +100004dc: 20a50780 addi a1,a1,1920 +100004e0: 8f85801c lw a1,-32740\(gp\) +100004e4: 20a5e9b4 addi a1,a1,-5708 +100004e8: 8f858018 lw a1,-32744\(gp\) +100004ec: 20a50774 addi a1,a1,1908 +100004f0: 00b12820 add a1,a1,s1 +100004f4: 8f858018 lw a1,-32744\(gp\) +100004f8: 20a50780 addi a1,a1,1920 +100004fc: 00b12820 add a1,a1,s1 +10000500: 8f85801c lw a1,-32740\(gp\) +10000504: 20a5e9b4 addi a1,a1,-5708 +10000508: 00b12820 add a1,a1,s1 +1000050c: 8f858018 lw a1,-32744\(gp\) +10000510: 8ca50774 lw a1,1908\(a1\) +10000514: 8f858018 lw a1,-32744\(gp\) +10000518: 8ca50780 lw a1,1920\(a1\) +1000051c: 8f858018 lw a1,-32744\(gp\) +10000520: 00b12820 add a1,a1,s1 +10000524: 8ca50774 lw a1,1908\(a1\) +10000528: 8f858018 lw a1,-32744\(gp\) +1000052c: 00b12820 add a1,a1,s1 +10000530: 8ca50780 lw a1,1920\(a1\) +10000534: 8f818018 lw at,-32744\(gp\) +10000538: 00250820 add at,at,a1 +1000053c: 8c250774 lw a1,1908\(at\) +10000540: 8f818018 lw at,-32744\(gp\) +10000544: 00250820 add at,at,a1 +10000548: ac2507ac sw a1,1964\(at\) +1000054c: 8f818018 lw at,-32744\(gp\) +10000550: 20210774 addi at,at,1908 +10000554: 88250000 lwl a1,0\(at\) +10000558: 98250003 lwr a1,3\(at\) +1000055c: 8f818018 lw at,-32744\(gp\) +10000560: 20210780 addi at,at,1920 +10000564: 88250000 lwl a1,0\(at\) +10000568: 98250003 lwr a1,3\(at\) +1000056c: 8f818018 lw at,-32744\(gp\) +10000570: 20210774 addi at,at,1908 +10000574: 00310820 add at,at,s1 +10000578: 88250000 lwl a1,0\(at\) +1000057c: 98250003 lwr a1,3\(at\) +10000580: 8f818018 lw at,-32744\(gp\) +10000584: 20210780 addi at,at,1920 +10000588: 00310820 add at,at,s1 +1000058c: 88250000 lwl a1,0\(at\) +10000590: 98250003 lwr a1,3\(at\) +10000594: 8f818018 lw at,-32744\(gp\) +10000598: 20210796 addi at,at,1942 +1000059c: 00250820 add at,at,a1 +100005a0: 88250000 lwl a1,0\(at\) +100005a4: 98250003 lwr a1,3\(at\) +100005a8: 8f818018 lw at,-32744\(gp\) +100005ac: 202107ac addi at,at,1964 +100005b0: 00250820 add at,at,a1 +100005b4: a8250000 swl a1,0\(at\) +100005b8: b8250003 swr a1,3\(at\) +100005bc: 3c050000 lui a1,0x0 +100005c0: 00bc2820 add a1,a1,gp +100005c4: 8ca58030 lw a1,-32720\(a1\) +100005c8: 8f858020 lw a1,-32736\(gp\) +100005cc: 20a506a0 addi a1,a1,1696 +100005d0: 3c190000 lui t9,0x0 +100005d4: 033cc820 add t9,t9,gp +100005d8: 8f398030 lw t9,-32720\(t9\) +100005dc: 8f998020 lw t9,-32736\(gp\) +100005e0: 233906a0 addi t9,t9,1696 +100005e4: 3c190000 lui t9,0x0 +100005e8: 033cc820 add t9,t9,gp +100005ec: 8f398030 lw t9,-32720\(t9\) +100005f0: 0320f809 jalr t9 +100005f4: 00000000 nop +100005f8: 8f998020 lw t9,-32736\(gp\) +100005fc: 233906a0 addi t9,t9,1696 +10000600: 0320f809 jalr t9 +10000604: 00000000 nop +10000608: 3c050000 lui a1,0x0 +1000060c: 00bc2820 add a1,a1,gp +10000610: 8ca58034 lw a1,-32716\(a1\) +10000614: 1000fea2 b 100000a0 +10000618: 00000000 nop +1000061c: 3c050000 lui a1,0x0 +10000620: 00bc2820 add a1,a1,gp +10000624: 8ca58038 lw a1,-32712\(a1\) +10000628: 8ca50000 lw a1,0\(a1\) +1000062c: 1000001c b 100006a0 +10000630: 00000000 nop +10000634: 8f858018 lw a1,-32744\(gp\) +10000638: 20a506fc addi a1,a1,1788 +1000063c: 1000fe98 b 100000a0 +10000640: 00000000 nop +10000644: 8f858018 lw a1,-32744\(gp\) +10000648: 20a50780 addi a1,a1,1920 +1000064c: 10000014 b 100006a0 +10000650: 00000000 nop +10000654: 8f85801c lw a1,-32740\(gp\) +10000658: 20a5e93c addi a1,a1,-5828 +1000065c: 1000fe90 b 100000a0 +10000660: 00000000 nop +10000664: 8f858018 lw a1,-32744\(gp\) +10000668: 8ca50774 lw a1,1908\(a1\) +1000066c: 1000000c b 100006a0 +10000670: 00000000 nop +10000674: 8f858018 lw a1,-32744\(gp\) +10000678: 8ca50708 lw a1,1800\(a1\) +1000067c: 1000fe88 b 100000a0 +10000680: 00000000 nop +10000684: 8f818018 lw at,-32744\(gp\) +10000688: 00250820 add at,at,a1 +1000068c: 8c250796 lw a1,1942\(at\) +10000690: 10000003 b 100006a0 +10000694: 00000000 nop + \.\.\. +Disassembly of section \.reginfo: + +100006a0 <\.reginfo>: +100006a0: 92020022 .* + \.\.\. +100006b4: 101087a0 .* +Disassembly of section \.data: + +101006c0 <_fdata>: + \.\.\. + +101006fc : + \.\.\. + +10100738 : + \.\.\. + +10100774 : + \.\.\. +Disassembly of section \.got: + +101007b0 <_GLOBAL_OFFSET_TABLE_>: +101007b0: 00000000 .* +101007b4: 80000000 .* +101007b8: 10100000 .* +101007bc: 10120000 .* +101007c0: 10000000 .* +101007c4: 00000000 .* +101007c8: 00000000 .* +101007cc: 100000a0 .* +101007d0: 100006a0 .* +101007d4: 101006fc .* +101007d8: 10100774 .* Index: ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d =================================================================== RCS file: ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d diff -N ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ ld/testsuite/ld-mips-elf/elf-rel-xgot-n64.d 8 Apr 2003 10:02:29 -0000 @@ -0,0 +1,435 @@ +#name: MIPS ELF xgot reloc n64 +#as: -64 -KPIC -xgot +#source: ../../../gas/testsuite/gas/mips/elf-rel-got-n64.s +#ld: -melf64btsmip +#objdump: -D --show-raw-insn + +.*: +file format elf64-.*mips.* + +Disassembly of section \.MIPS\.options: + +00000000100000b0 <\.MIPS\.options>: + 100000b0: 01280000 .* + 100000b4: 00000000 .* + 100000b8: 92020022 .* + \.\.\. + 100000d4: 101087c0 .* +Disassembly of section \.text: + +00000000100000e0 : + 100000e0: 3c050000 lui a1,0x0 + 100000e4: 00bc282d daddu a1,a1,gp + 100000e8: dca58058 ld a1,-32680\(a1\) + 100000ec: 3c050000 lui a1,0x0 + 100000f0: 00bc282d daddu a1,a1,gp + 100000f4: dca58058 ld a1,-32680\(a1\) + 100000f8: 64a5000c daddiu a1,a1,12 + 100000fc: 3c050000 lui a1,0x0 + 10000100: 00bc282d daddu a1,a1,gp + 10000104: dca58058 ld a1,-32680\(a1\) + 10000108: 3c010002 lui at,0x2 + 1000010c: 6421e240 daddiu at,at,-7616 + 10000110: 00a1282d daddu a1,a1,at + 10000114: 3c050000 lui a1,0x0 + 10000118: 00bc282d daddu a1,a1,gp + 1000011c: dca58058 ld a1,-32680\(a1\) + 10000120: 00b1282d daddu a1,a1,s1 + 10000124: 3c050000 lui a1,0x0 + 10000128: 00bc282d daddu a1,a1,gp + 1000012c: dca58058 ld a1,-32680\(a1\) + 10000130: 64a5000c daddiu a1,a1,12 + 10000134: 00b1282d daddu a1,a1,s1 + 10000138: 3c050000 lui a1,0x0 + 1000013c: 00bc282d daddu a1,a1,gp + 10000140: dca58058 ld a1,-32680\(a1\) + 10000144: 3c010002 lui at,0x2 + 10000148: 6421e240 daddiu at,at,-7616 + 1000014c: 00a1282d daddu a1,a1,at + 10000150: 00b1282d daddu a1,a1,s1 + 10000154: 3c050000 lui a1,0x0 + 10000158: 00bc282d daddu a1,a1,gp + 1000015c: dca58058 ld a1,-32680\(a1\) + 10000160: dca50000 ld a1,0\(a1\) + 10000164: 3c050000 lui a1,0x0 + 10000168: 00bc282d daddu a1,a1,gp + 1000016c: dca58058 ld a1,-32680\(a1\) + 10000170: dca5000c ld a1,12\(a1\) + 10000174: 3c050000 lui a1,0x0 + 10000178: 00bc282d daddu a1,a1,gp + 1000017c: dca58058 ld a1,-32680\(a1\) + 10000180: 00b1282d daddu a1,a1,s1 + 10000184: dca50000 ld a1,0\(a1\) + 10000188: 3c050000 lui a1,0x0 + 1000018c: 00bc282d daddu a1,a1,gp + 10000190: dca58058 ld a1,-32680\(a1\) + 10000194: 00b1282d daddu a1,a1,s1 + 10000198: dca5000c ld a1,12\(a1\) + 1000019c: 3c010000 lui at,0x0 + 100001a0: 003c082d daddu at,at,gp + 100001a4: dc218058 ld at,-32680\(at\) + 100001a8: 0025082d daddu at,at,a1 + 100001ac: dc250022 ld a1,34\(at\) + 100001b0: 3c010000 lui at,0x0 + 100001b4: 003c082d daddu at,at,gp + 100001b8: dc218058 ld at,-32680\(at\) + 100001bc: 0025082d daddu at,at,a1 + 100001c0: fc250038 sd a1,56\(at\) + 100001c4: 3c010000 lui at,0x0 + 100001c8: 003c082d daddu at,at,gp + 100001cc: dc218058 ld at,-32680\(at\) + 100001d0: 88250000 lwl a1,0\(at\) + 100001d4: 98250003 lwr a1,3\(at\) + 100001d8: 3c010000 lui at,0x0 + 100001dc: 003c082d daddu at,at,gp + 100001e0: dc218058 ld at,-32680\(at\) + 100001e4: 6421000c daddiu at,at,12 + 100001e8: 88250000 lwl a1,0\(at\) + 100001ec: 98250003 lwr a1,3\(at\) + 100001f0: 3c010000 lui at,0x0 + 100001f4: 003c082d daddu at,at,gp + 100001f8: dc218058 ld at,-32680\(at\) + 100001fc: 0031082d daddu at,at,s1 + 10000200: 88250000 lwl a1,0\(at\) + 10000204: 98250003 lwr a1,3\(at\) + 10000208: 3c010000 lui at,0x0 + 1000020c: 003c082d daddu at,at,gp + 10000210: dc218058 ld at,-32680\(at\) + 10000214: 6421000c daddiu at,at,12 + 10000218: 0031082d daddu at,at,s1 + 1000021c: 88250000 lwl a1,0\(at\) + 10000220: 98250003 lwr a1,3\(at\) + 10000224: 3c010000 lui at,0x0 + 10000228: 003c082d daddu at,at,gp + 1000022c: dc218058 ld at,-32680\(at\) + 10000230: 64210022 daddiu at,at,34 + 10000234: 0025082d daddu at,at,a1 + 10000238: 88250000 lwl a1,0\(at\) + 1000023c: 98250003 lwr a1,3\(at\) + 10000240: 3c010000 lui at,0x0 + 10000244: 003c082d daddu at,at,gp + 10000248: dc218058 ld at,-32680\(at\) + 1000024c: 64210038 daddiu at,at,56 + 10000250: 0025082d daddu at,at,a1 + 10000254: a8250000 swl a1,0\(at\) + 10000258: b8250003 swr a1,3\(at\) + 1000025c: df858020 ld a1,-32736\(gp\) + 10000260: 64a5071c daddiu a1,a1,1820 + 10000264: df858020 ld a1,-32736\(gp\) + 10000268: 64a50728 daddiu a1,a1,1832 + 1000026c: df858028 ld a1,-32728\(gp\) + 10000270: 64a5e95c daddiu a1,a1,-5796 + 10000274: df858020 ld a1,-32736\(gp\) + 10000278: 64a5071c daddiu a1,a1,1820 + 1000027c: 00b1282d daddu a1,a1,s1 + 10000280: df858020 ld a1,-32736\(gp\) + 10000284: 64a50728 daddiu a1,a1,1832 + 10000288: 00b1282d daddu a1,a1,s1 + 1000028c: df858028 ld a1,-32728\(gp\) + 10000290: 64a5e95c daddiu a1,a1,-5796 + 10000294: 00b1282d daddu a1,a1,s1 + 10000298: df858020 ld a1,-32736\(gp\) + 1000029c: dca5071c ld a1,1820\(a1\) + 100002a0: df858020 ld a1,-32736\(gp\) + 100002a4: dca50728 ld a1,1832\(a1\) + 100002a8: df858020 ld a1,-32736\(gp\) + 100002ac: 00b1282d daddu a1,a1,s1 + 100002b0: dca5071c ld a1,1820\(a1\) + 100002b4: df858020 ld a1,-32736\(gp\) + 100002b8: 00b1282d daddu a1,a1,s1 + 100002bc: dca50728 ld a1,1832\(a1\) + 100002c0: df818020 ld at,-32736\(gp\) + 100002c4: 0025082d daddu at,at,a1 + 100002c8: dc25073e ld a1,1854\(at\) + 100002cc: df818020 ld at,-32736\(gp\) + 100002d0: 0025082d daddu at,at,a1 + 100002d4: fc250754 sd a1,1876\(at\) + 100002d8: df818020 ld at,-32736\(gp\) + 100002dc: 6421071c daddiu at,at,1820 + 100002e0: 88250000 lwl a1,0\(at\) + 100002e4: 98250003 lwr a1,3\(at\) + 100002e8: df818020 ld at,-32736\(gp\) + 100002ec: 64210728 daddiu at,at,1832 + 100002f0: 88250000 lwl a1,0\(at\) + 100002f4: 98250003 lwr a1,3\(at\) + 100002f8: df818020 ld at,-32736\(gp\) + 100002fc: 6421071c daddiu at,at,1820 + 10000300: 0031082d daddu at,at,s1 + 10000304: 88250000 lwl a1,0\(at\) + 10000308: 98250003 lwr a1,3\(at\) + 1000030c: df818020 ld at,-32736\(gp\) + 10000310: 64210728 daddiu at,at,1832 + 10000314: 0031082d daddu at,at,s1 + 10000318: 88250000 lwl a1,0\(at\) + 1000031c: 98250003 lwr a1,3\(at\) + 10000320: df818020 ld at,-32736\(gp\) + 10000324: 6421073e daddiu at,at,1854 + 10000328: 0025082d daddu at,at,a1 + 1000032c: 88250000 lwl a1,0\(at\) + 10000330: 98250003 lwr a1,3\(at\) + 10000334: df818020 ld at,-32736\(gp\) + 10000338: 64210754 daddiu at,at,1876 + 1000033c: 0025082d daddu at,at,a1 + 10000340: a8250000 swl a1,0\(at\) + 10000344: b8250003 swr a1,3\(at\) + 10000348: 3c050000 lui a1,0x0 + 1000034c: 00bc282d daddu a1,a1,gp + 10000350: dca58048 ld a1,-32696\(a1\) + 10000354: df858030 ld a1,-32720\(gp\) + 10000358: 64a500e0 daddiu a1,a1,224 + 1000035c: 3c190000 lui t9,0x0 + 10000360: 033cc82d daddu t9,t9,gp + 10000364: df398048 ld t9,-32696\(t9\) + 10000368: df998030 ld t9,-32720\(gp\) + 1000036c: 673900e0 daddiu t9,t9,224 + 10000370: 3c190000 lui t9,0x0 + 10000374: 033cc82d daddu t9,t9,gp + 10000378: df398048 ld t9,-32696\(t9\) + 1000037c: 0320f809 jalr t9 + 10000380: 00000000 nop + 10000384: df998030 ld t9,-32720\(gp\) + 10000388: 673900e0 daddiu t9,t9,224 + 1000038c: 0320f809 jalr t9 + 10000390: 00000000 nop + 10000394: 3c050000 lui a1,0x0 + 10000398: 00bc282d daddu a1,a1,gp + 1000039c: dca58060 ld a1,-32672\(a1\) + 100003a0: 3c050000 lui a1,0x0 + 100003a4: 00bc282d daddu a1,a1,gp + 100003a8: dca58060 ld a1,-32672\(a1\) + 100003ac: 64a5000c daddiu a1,a1,12 + 100003b0: 3c050000 lui a1,0x0 + 100003b4: 00bc282d daddu a1,a1,gp + 100003b8: dca58060 ld a1,-32672\(a1\) + 100003bc: 3c010002 lui at,0x2 + 100003c0: 6421e240 daddiu at,at,-7616 + 100003c4: 00a1282d daddu a1,a1,at + 100003c8: 3c050000 lui a1,0x0 + 100003cc: 00bc282d daddu a1,a1,gp + 100003d0: dca58060 ld a1,-32672\(a1\) + 100003d4: 00b1282d daddu a1,a1,s1 + 100003d8: 3c050000 lui a1,0x0 + 100003dc: 00bc282d daddu a1,a1,gp + 100003e0: dca58060 ld a1,-32672\(a1\) + 100003e4: 64a5000c daddiu a1,a1,12 + 100003e8: 00b1282d daddu a1,a1,s1 + 100003ec: 3c050000 lui a1,0x0 + 100003f0: 00bc282d daddu a1,a1,gp + 100003f4: dca58060 ld a1,-32672\(a1\) + 100003f8: 3c010002 lui at,0x2 + 100003fc: 6421e240 daddiu at,at,-7616 + 10000400: 00a1282d daddu a1,a1,at + 10000404: 00b1282d daddu a1,a1,s1 + 10000408: 3c050000 lui a1,0x0 + 1000040c: 00bc282d daddu a1,a1,gp + 10000410: dca58060 ld a1,-32672\(a1\) + 10000414: dca50000 ld a1,0\(a1\) + 10000418: 3c050000 lui a1,0x0 + 1000041c: 00bc282d daddu a1,a1,gp + 10000420: dca58060 ld a1,-32672\(a1\) + 10000424: dca5000c ld a1,12\(a1\) + 10000428: 3c050000 lui a1,0x0 + 1000042c: 00bc282d daddu a1,a1,gp + 10000430: dca58060 ld a1,-32672\(a1\) + 10000434: 00b1282d daddu a1,a1,s1 + 10000438: dca50000 ld a1,0\(a1\) + 1000043c: 3c050000 lui a1,0x0 + 10000440: 00bc282d daddu a1,a1,gp + 10000444: dca58060 ld a1,-32672\(a1\) + 10000448: 00b1282d daddu a1,a1,s1 + 1000044c: dca5000c ld a1,12\(a1\) + 10000450: 3c010000 lui at,0x0 + 10000454: 003c082d daddu at,at,gp + 10000458: dc218060 ld at,-32672\(at\) + 1000045c: 0025082d daddu at,at,a1 + 10000460: dc250022 ld a1,34\(at\) + 10000464: 3c010000 lui at,0x0 + 10000468: 003c082d daddu at,at,gp + 1000046c: dc218060 ld at,-32672\(at\) + 10000470: 0025082d daddu at,at,a1 + 10000474: fc250038 sd a1,56\(at\) + 10000478: 3c010000 lui at,0x0 + 1000047c: 003c082d daddu at,at,gp + 10000480: dc218060 ld at,-32672\(at\) + 10000484: 88250000 lwl a1,0\(at\) + 10000488: 98250003 lwr a1,3\(at\) + 1000048c: 3c010000 lui at,0x0 + 10000490: 003c082d daddu at,at,gp + 10000494: dc218060 ld at,-32672\(at\) + 10000498: 6421000c daddiu at,at,12 + 1000049c: 88250000 lwl a1,0\(at\) + 100004a0: 98250003 lwr a1,3\(at\) + 100004a4: 3c010000 lui at,0x0 + 100004a8: 003c082d daddu at,at,gp + 100004ac: dc218060 ld at,-32672\(at\) + 100004b0: 0031082d daddu at,at,s1 + 100004b4: 88250000 lwl a1,0\(at\) + 100004b8: 98250003 lwr a1,3\(at\) + 100004bc: 3c010000 lui at,0x0 + 100004c0: 003c082d daddu at,at,gp + 100004c4: dc218060 ld at,-32672\(at\) + 100004c8: 6421000c daddiu at,at,12 + 100004cc: 0031082d daddu at,at,s1 + 100004d0: 88250000 lwl a1,0\(at\) + 100004d4: 98250003 lwr a1,3\(at\) + 100004d8: 3c010000 lui at,0x0 + 100004dc: 003c082d daddu at,at,gp + 100004e0: dc218060 ld at,-32672\(at\) + 100004e4: 64210022 daddiu at,at,34 + 100004e8: 0025082d daddu at,at,a1 + 100004ec: 88250000 lwl a1,0\(at\) + 100004f0: 98250003 lwr a1,3\(at\) + 100004f4: 3c010000 lui at,0x0 + 100004f8: 003c082d daddu at,at,gp + 100004fc: dc218060 ld at,-32672\(at\) + 10000500: 64210038 daddiu at,at,56 + 10000504: 0025082d daddu at,at,a1 + 10000508: a8250000 swl a1,0\(at\) + 1000050c: b8250003 swr a1,3\(at\) + 10000510: df858020 ld a1,-32736\(gp\) + 10000514: 64a50794 daddiu a1,a1,1940 + 10000518: df858020 ld a1,-32736\(gp\) + 1000051c: 64a507a0 daddiu a1,a1,1952 + 10000520: df858028 ld a1,-32728\(gp\) + 10000524: 64a5e9d4 daddiu a1,a1,-5676 + 10000528: df858020 ld a1,-32736\(gp\) + 1000052c: 64a50794 daddiu a1,a1,1940 + 10000530: 00b1282d daddu a1,a1,s1 + 10000534: df858020 ld a1,-32736\(gp\) + 10000538: 64a507a0 daddiu a1,a1,1952 + 1000053c: 00b1282d daddu a1,a1,s1 + 10000540: df858028 ld a1,-32728\(gp\) + 10000544: 64a5e9d4 daddiu a1,a1,-5676 + 10000548: 00b1282d daddu a1,a1,s1 + 1000054c: df858020 ld a1,-32736\(gp\) + 10000550: dca50794 ld a1,1940\(a1\) + 10000554: df858020 ld a1,-32736\(gp\) + 10000558: dca507a0 ld a1,1952\(a1\) + 1000055c: df858020 ld a1,-32736\(gp\) + 10000560: 00b1282d daddu a1,a1,s1 + 10000564: dca50794 ld a1,1940\(a1\) + 10000568: df858020 ld a1,-32736\(gp\) + 1000056c: 00b1282d daddu a1,a1,s1 + 10000570: dca507a0 ld a1,1952\(a1\) + 10000574: df818020 ld at,-32736\(gp\) + 10000578: 0025082d daddu at,at,a1 + 1000057c: dc250794 ld a1,1940\(at\) + 10000580: df818020 ld at,-32736\(gp\) + 10000584: 0025082d daddu at,at,a1 + 10000588: fc2507cc sd a1,1996\(at\) + 1000058c: df818020 ld at,-32736\(gp\) + 10000590: 64210794 daddiu at,at,1940 + 10000594: 88250000 lwl a1,0\(at\) + 10000598: 98250003 lwr a1,3\(at\) + 1000059c: df818020 ld at,-32736\(gp\) + 100005a0: 642107a0 daddiu at,at,1952 + 100005a4: 88250000 lwl a1,0\(at\) + 100005a8: 98250003 lwr a1,3\(at\) + 100005ac: df818020 ld at,-32736\(gp\) + 100005b0: 64210794 daddiu at,at,1940 + 100005b4: 0031082d daddu at,at,s1 + 100005b8: 88250000 lwl a1,0\(at\) + 100005bc: 98250003 lwr a1,3\(at\) + 100005c0: df818020 ld at,-32736\(gp\) + 100005c4: 642107a0 daddiu at,at,1952 + 100005c8: 0031082d daddu at,at,s1 + 100005cc: 88250000 lwl a1,0\(at\) + 100005d0: 98250003 lwr a1,3\(at\) + 100005d4: df818020 ld at,-32736\(gp\) + 100005d8: 642107b6 daddiu at,at,1974 + 100005dc: 0025082d daddu at,at,a1 + 100005e0: 88250000 lwl a1,0\(at\) + 100005e4: 98250003 lwr a1,3\(at\) + 100005e8: df818020 ld at,-32736\(gp\) + 100005ec: 642107cc daddiu at,at,1996 + 100005f0: 0025082d daddu at,at,a1 + 100005f4: a8250000 swl a1,0\(at\) + 100005f8: b8250003 swr a1,3\(at\) + 100005fc: 3c050000 lui a1,0x0 + 10000600: 00bc282d daddu a1,a1,gp + 10000604: dca58050 ld a1,-32688\(a1\) + 10000608: df858030 ld a1,-32720\(gp\) + 1000060c: 64a506e0 daddiu a1,a1,1760 + 10000610: 3c190000 lui t9,0x0 + 10000614: 033cc82d daddu t9,t9,gp + 10000618: df398050 ld t9,-32688\(t9\) + 1000061c: df998030 ld t9,-32720\(gp\) + 10000620: 673906e0 daddiu t9,t9,1760 + 10000624: 3c190000 lui t9,0x0 + 10000628: 033cc82d daddu t9,t9,gp + 1000062c: df398050 ld t9,-32688\(t9\) + 10000630: 0320f809 jalr t9 + 10000634: 00000000 nop + 10000638: df998030 ld t9,-32720\(gp\) + 1000063c: 673906e0 daddiu t9,t9,1760 + 10000640: 0320f809 jalr t9 + 10000644: 00000000 nop + 10000648: 3c050000 lui a1,0x0 + 1000064c: 00bc282d daddu a1,a1,gp + 10000650: dca58058 ld a1,-32680\(a1\) + 10000654: 1000fea2 b 100000e0 + 10000658: 00000000 nop + 1000065c: 3c050000 lui a1,0x0 + 10000660: 00bc282d daddu a1,a1,gp + 10000664: dca58060 ld a1,-32672\(a1\) + 10000668: dca50000 ld a1,0\(a1\) + 1000066c: 1000001c b 100006e0 + 10000670: 00000000 nop + 10000674: df858020 ld a1,-32736\(gp\) + 10000678: 64a5071c daddiu a1,a1,1820 + 1000067c: 1000fe98 b 100000e0 + 10000680: 00000000 nop + 10000684: df858020 ld a1,-32736\(gp\) + 10000688: 64a507a0 daddiu a1,a1,1952 + 1000068c: 10000014 b 100006e0 + 10000690: 00000000 nop + 10000694: df858028 ld a1,-32728\(gp\) + 10000698: 64a5e95c daddiu a1,a1,-5796 + 1000069c: 1000fe90 b 100000e0 + 100006a0: 00000000 nop + 100006a4: df858020 ld a1,-32736\(gp\) + 100006a8: dca50794 ld a1,1940\(a1\) + 100006ac: 1000000c b 100006e0 + 100006b0: 00000000 nop + 100006b4: df858020 ld a1,-32736\(gp\) + 100006b8: dca50728 ld a1,1832\(a1\) + 100006bc: 1000fe88 b 100000e0 + 100006c0: 00000000 nop + 100006c4: df818020 ld at,-32736\(gp\) + 100006c8: 0025082d daddu at,at,a1 + 100006cc: dc2507b6 ld a1,1974\(at\) + 100006d0: 10000003 b 100006e0 + 100006d4: 00000000 nop + \.\.\. +Disassembly of section \.data: + +00000000101006e0 <_fdata>: + \.\.\. + +000000001010071c : + \.\.\. + +0000000010100758 : + \.\.\. + +0000000010100794 : + \.\.\. +Disassembly of section \.got: + +00000000101007d0 <_GLOBAL_OFFSET_TABLE_>: + \.\.\. + 101007dc: 80000000 .* + 101007e0: 00000000 .* + 101007e4: 10100000 .* + 101007e8: 00000000 .* + 101007ec: 10120000 .* + 101007f0: 00000000 .* + 101007f4: 10000000 .* + 101007f8: 00000000 .* + \.\.\. + 1010080c: 100000e0 .* + 10100810: 00000000 .* + 10100814: 100006e0 .* + 10100818: 00000000 .* + 1010081c: 1010071c .* + 10100820: 00000000 .* + 10100824: 10100794 .* Index: ld/testsuite/ld-mips-elf/mips-elf.exp =================================================================== RCS file: /cvs/uberbaum/ld/testsuite/ld-mips-elf/mips-elf.exp,v retrieving revision 1.10 diff -u -p -r1.10 mips-elf.exp --- ld/testsuite/ld-mips-elf/mips-elf.exp 26 Mar 2003 01:05:44 -0000 1.10 +++ ld/testsuite/ld-mips-elf/mips-elf.exp 8 Apr 2003 10:02:29 -0000 @@ -17,6 +17,7 @@ # if { [istarget mips*-*-*] } then { + set has_newabi [expr [istarget *-*-irix6*] || [istarget mips64*-*-linux*]] set elf [expr [istarget mips*-*-elf] || [istarget mips*-*-linux*] || \ [istarget mips*-*-netbsd] || [istarget mips*-*-irix*]] @@ -34,10 +35,17 @@ if { [istarget mips*-*-*] } then { # Test multi-got link. run_dump_test "multi-got-1" - run_dump_test "relax-jalr-n32" - run_dump_test "relax-jalr-n32-shared" - run_dump_test "relax-jalr-n64" - run_dump_test "relax-jalr-n64-shared" + if $has_newabi { + run_dump_test "elf-rel-got-n32" + run_dump_test "elf-rel-xgot-n32" + run_dump_test "elf-rel-got-n64" + run_dump_test "elf-rel-xgot-n64" + + run_dump_test "relax-jalr-n32" + run_dump_test "relax-jalr-n32-shared" + run_dump_test "relax-jalr-n64" + run_dump_test "relax-jalr-n64-shared" + } } if { $linux_gnu } {