Index: arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.26
diff -p -r1.26 arm-dis.c
*** arm-dis.c	2002/01/15 15:41:23	1.26
--- arm-dis.c	2002/01/19 12:24:14
*************** print_insn_arm (pc, info, given)
*** 390,402 ****
  			func (stream, "t");
  		      break;
  
- 		    case 'h':
- 		      if ((given & 0x00000020) == 0x00000020)
- 			func (stream, "h");
-                       else
-                         func (stream, "b");
- 		      break;
- 
  		    case 'A':
  		      func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
  		      if ((given & 0x01000000) != 0)
--- 390,395 ----
Index: arm-opc.h
===================================================================
RCS file: /cvs/src/src/opcodes/arm-opc.h,v
retrieving revision 1.10
diff -p -r1.10 arm-opc.h
*** arm-opc.h	2002/01/18 17:33:49	1.10
--- arm-opc.h	2002/01/19 12:24:14
*************** struct thumb_opcode
*** 51,57 ****
     %<bitnum>?ab		print a if bit is one else print b
     %p			print 'p' iff bits 12-15 are 15
     %t			print 't' iff bit 21 set and bit 24 clear
-    %h                   print 'h' iff bit 5 set, else print 'b'
     %o			print operand2 (immediate or register + shift)
     %a			print address for ldr/str instruction
     %s                   print address for ldr/str halfword/signextend instruction
--- 51,56 ----
*************** static struct arm_opcode arm_opcodes[] =
*** 146,153 ****
      {0x0c500000, 0x0ff00000, "mrrc%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
  
      /* ARM Instructions.  */
!     {0x00000090, 0x0e100090, "str%c%6's%h\t%12-15r, %s"},
!     {0x00100090, 0x0e100090, "ldr%c%6's%h\t%12-15r, %s"},
      {0x00000000, 0x0de00000, "and%c%20's\t%12-15r, %16-19r, %o"},
      {0x00200000, 0x0de00000, "eor%c%20's\t%12-15r, %16-19r, %o"},
      {0x00400000, 0x0de00000, "sub%c%20's\t%12-15r, %16-19r, %o"},
--- 145,152 ----
      {0x0c500000, 0x0ff00000, "mrrc%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
  
      /* ARM Instructions.  */
!     {0x00000090, 0x0e100090, "str%c%6's%5?hb\t%12-15r, %s"},
!     {0x00100090, 0x0e100090, "ldr%c%6's%5?hb\t%12-15r, %s"},
      {0x00000000, 0x0de00000, "and%c%20's\t%12-15r, %16-19r, %o"},
      {0x00200000, 0x0de00000, "eor%c%20's\t%12-15r, %16-19r, %o"},
      {0x00400000, 0x0de00000, "sub%c%20's\t%12-15r, %16-19r, %o"},