Index: config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.114
diff -p -r1.114 tc-arm.c
*** tc-arm.c	2002/01/19 12:44:34	1.114
--- tc-arm.c	2002/01/19 14:15:20
***************
*** 54,59 ****
--- 54,60 ----
  #define ARM_EXT_V5T	 0x00000100	/* Thumb v2.               */
  #define ARM_EXT_V5ExP	 0x00000200	/* DSP core set.           */
  #define ARM_EXT_V5E	 0x00000400	/* DSP Double transfers.   */
+ #define ARM_EXT_V5J	 0x00000800	/* Jazelle extension.	   */
  
  /* Co-processor space extensions.  */
  #define ARM_CEXT_XSCALE   0x00800000	/* Allow MIA etc.          */
***************
*** 79,84 ****
--- 80,86 ----
  #define ARM_ARCH_V5T	(ARM_ARCH_V5	| ARM_EXT_V4T | ARM_EXT_V5T)
  #define ARM_ARCH_V5TExP	(ARM_ARCH_V5T	| ARM_EXT_V5ExP)
  #define ARM_ARCH_V5TE	(ARM_ARCH_V5TExP | ARM_EXT_V5E)
+ #define ARM_ARCH_V5TEJ	(ARM_ARCH_V5TE	| ARM_EXT_V5J)
  
  /* Processors with specific extensions in the co-processor space.  */
  #define ARM_ARCH_XSCALE	(ARM_ARCH_V5TE	| ARM_CEXT_XSCALE)
*************** static void do_ldstv4		PARAMS ((char *))
*** 746,752 ****
  /* ARM v4T.  */
  static void do_bx               PARAMS ((char *));
  
! /* ARM v5.  */
  static void do_blx		PARAMS ((char *));
  static void do_bkpt		PARAMS ((char *));
  static void do_clz		PARAMS ((char *));
--- 748,754 ----
  /* ARM v4T.  */
  static void do_bx               PARAMS ((char *));
  
! /* ARM v5T.  */
  static void do_blx		PARAMS ((char *));
  static void do_bkpt		PARAMS ((char *));
  static void do_clz		PARAMS ((char *));
*************** static void do_lstc2		PARAMS ((char *));
*** 754,770 ****
  static void do_cdp2		PARAMS ((char *));
  static void do_co_reg2		PARAMS ((char *));
  
! /* ARM v5ExP.  */
  static void do_smla		PARAMS ((char *));
  static void do_smlal		PARAMS ((char *));
  static void do_smul		PARAMS ((char *));
  static void do_qadd		PARAMS ((char *));
  
! /* ARM v5E.  */
  static void do_pld		PARAMS ((char *));
  static void do_ldrd		PARAMS ((char *));
  static void do_co_reg2c		PARAMS ((char *));
  
  /* Coprocessor Instructions.  */
  static void do_cdp		PARAMS ((char *));
  static void do_lstc		PARAMS ((char *));
--- 756,775 ----
  static void do_cdp2		PARAMS ((char *));
  static void do_co_reg2		PARAMS ((char *));
  
! /* ARM v5TExP.  */
  static void do_smla		PARAMS ((char *));
  static void do_smlal		PARAMS ((char *));
  static void do_smul		PARAMS ((char *));
  static void do_qadd		PARAMS ((char *));
  
! /* ARM v5TE.  */
  static void do_pld		PARAMS ((char *));
  static void do_ldrd		PARAMS ((char *));
  static void do_co_reg2c		PARAMS ((char *));
  
+ /* ARM v5TEJ.  */
+ static void do_bxj		PARAMS ((char *));
+ 
  /* Coprocessor Instructions.  */
  static void do_cdp		PARAMS ((char *));
  static void do_lstc		PARAMS ((char *));
*************** static const struct asm_opcode insns[] =
*** 1105,1111 ****
       not support Thumb.  */
    {"bx",         0xe12fff10, 2,  ARM_EXT_V4T | ARM_EXT_V5, do_bx},
  
!   /*  ARM Architecture 5.  */
    /* Note: blx has 2 variants, so the .value is set dynamically.
       Only one of the variants has conditional execution.  */
    {"blx",        0xe0000000, 3,  ARM_EXT_V5,       do_blx},
--- 1110,1116 ----
       not support Thumb.  */
    {"bx",         0xe12fff10, 2,  ARM_EXT_V4T | ARM_EXT_V5, do_bx},
  
!   /*  ARM Architecture 5T.  */
    /* Note: blx has 2 variants, so the .value is set dynamically.
       Only one of the variants has conditional execution.  */
    {"blx",        0xe0000000, 3,  ARM_EXT_V5,       do_blx},
*************** static const struct asm_opcode insns[] =
*** 1119,1125 ****
    {"mcr2",       0xfe000010, 0,  ARM_EXT_V5,       do_co_reg2},
    {"mrc2",       0xfe100010, 0,  ARM_EXT_V5,       do_co_reg2},
  
!   /*  ARM Architecture 5ExP.  */
    {"smlabb",     0xe1000080, 6,  ARM_EXT_V5ExP,    do_smla},
    {"smlatb",     0xe10000a0, 6,  ARM_EXT_V5ExP,    do_smla},
    {"smlabt",     0xe10000c0, 6,  ARM_EXT_V5ExP,    do_smla},
--- 1124,1130 ----
    {"mcr2",       0xfe000010, 0,  ARM_EXT_V5,       do_co_reg2},
    {"mrc2",       0xfe100010, 0,  ARM_EXT_V5,       do_co_reg2},
  
!   /*  ARM Architecture 5TExP.  */
    {"smlabb",     0xe1000080, 6,  ARM_EXT_V5ExP,    do_smla},
    {"smlatb",     0xe10000a0, 6,  ARM_EXT_V5ExP,    do_smla},
    {"smlabt",     0xe10000c0, 6,  ARM_EXT_V5ExP,    do_smla},
*************** static const struct asm_opcode insns[] =
*** 1146,1152 ****
    {"qsub",       0xe1200050, 4,  ARM_EXT_V5ExP,    do_qadd},
    {"qdsub",      0xe1600050, 5,  ARM_EXT_V5ExP,    do_qadd},
  
!   /*  ARM Architecture 5E.  */
    {"pld",        0xf450f000, 0,  ARM_EXT_V5E,      do_pld},
    {"ldrd",       0xe00000d0, 3,  ARM_EXT_V5E,      do_ldrd},
    {"strd",       0xe00000f0, 3,  ARM_EXT_V5E,      do_ldrd},
--- 1151,1157 ----
    {"qsub",       0xe1200050, 4,  ARM_EXT_V5ExP,    do_qadd},
    {"qdsub",      0xe1600050, 5,  ARM_EXT_V5ExP,    do_qadd},
  
!   /*  ARM Architecture 5TE.  */
    {"pld",        0xf450f000, 0,  ARM_EXT_V5E,      do_pld},
    {"ldrd",       0xe00000d0, 3,  ARM_EXT_V5E,      do_ldrd},
    {"strd",       0xe00000f0, 3,  ARM_EXT_V5E,      do_ldrd},
*************** static const struct asm_opcode insns[] =
*** 1154,1159 ****
--- 1159,1167 ----
    {"mcrr",       0xec400000, 4,  ARM_EXT_V5E,      do_co_reg2c},
    {"mrrc",       0xec500000, 4,  ARM_EXT_V5E,      do_co_reg2c},
  
+   /*  ARM Architecture 5TEJ.  */
+   {"bxj",	 0xe12fff20, 3,  ARM_EXT_V5J,	   do_bxj},
+ 
    /* Core FPA instruction set (V1).  */
    {"wfs",        0xee200110, 3,  FPU_FPA_EXT_V1,   do_fpa_ctrl},
    {"rfs",        0xee300110, 3,  FPU_FPA_EXT_V1,   do_fpa_ctrl},
*************** do_co_reg2 (str)
*** 3876,3881 ****
--- 3884,3911 ----
    end_of_line (str);
  }
  
+ /* ARM v5TEJ.  Jump to Jazelle code.  */
+ static void
+ do_bxj (str)
+      char * str;
+ {
+   int reg;
+ 
+   skip_whitespace (str);
+ 
+   if ((reg = reg_required_here (&str, 0)) == FAIL)
+     {
+       inst.error = BAD_ARGS;
+       return;
+     }
+ 
+   /* Note - it is not illegal to do a "bxj pc".  Useless, but not illegal.  */
+   if (reg == REG_PC)
+     as_tsktsk (_("use of r15 in bxj is not really useful"));
+ 
+   end_of_line (str);
+ }
+ 
  /* THUMB V5 breakpoint instruction (argument parse)
  	BKPT <immed_8>.  */
  
*************** static struct arm_cpu_option_table arm_c
*** 10741,10746 ****
--- 10771,10777 ----
       should really set the FPU type explicitly.  */
    {"arm9e-r0",		ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
    {"arm9e",		ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
+   {"arm926ej",		ARM_ARCH_V5TEJ,	 FPU_ARCH_VFP_V2},
    {"arm946e-r0",	ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
    {"arm946e",		ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
    {"arm966e-r0",	ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
*************** static struct arm_arch_option_table arm_
*** 10785,10790 ****
--- 10816,10822 ----
    {"armv5txm",		ARM_ARCH_V5TxM,	 FPU_ARCH_VFP},
    {"armv5te",		ARM_ARCH_V5TE,	 FPU_ARCH_VFP},
    {"armv5texp",		ARM_ARCH_V5TExP, FPU_ARCH_VFP},
+   {"armv5tej",		ARM_ARCH_V5TEJ,  FPU_ARCH_VFP},
    {"xscale",		ARM_ARCH_XSCALE, FPU_ARCH_VFP},
    {NULL, 0, 0}
  };
Index: testsuite/gas/arm/arch5tej.d
===================================================================
RCS file: arch5tej.d
diff -N arch5tej.d
*** /dev/null	Tue May  5 13:32:27 1998
--- arch5tej.d	Sat Jan 19 06:15:20 2002
***************
*** 0 ****
--- 1,15 ----
+ #objdump: -dr --prefix-addresses --show-raw-insn
+ #name: ARM Architecture v5TEJ instructions
+ #as: -march=armv5tej
+ 
+ # Test the ARM Architecture v5TEJ instructions
+ 
+ .*: +file format .*arm.*
+ 
+ Disassembly of section .text:
+ 0+00 <[^>]*> e12fff20 ?	bxj	r0
+ 0+04 <[^>]*> e12fff21 ?	bxj	r1
+ 0+08 <[^>]*> e12fff2e ?	bxj	lr
+ 0+0c <[^>]*> 012fff20 ?	bxjeq	r0
+ 0+10 <[^>]*> 412fff20 ?	bxjmi	r0
+ 0+14 <[^>]*> 512fff27 ?	bxjpl	r7
Index: testsuite/gas/arm/arch5tej.s
===================================================================
RCS file: arch5tej.s
diff -N arch5tej.s
*** /dev/null	Tue May  5 13:32:27 1998
--- arch5tej.s	Sat Jan 19 06:15:20 2002
***************
*** 0 ****
--- 1,9 ----
+ 	.text
+ 	.align 0
+ label:	
+ 	bxj     r0
+ 	bxj	r1
+ 	bxj	r14
+ 	bxjeq	r0
+ 	bxjmi	r0
+ 	bxjpl	r7
Index: testsuite/gas/arm/arm.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/arm.exp,v
retrieving revision 1.12
diff -p -r1.12 arm.exp
*** arm.exp	2002/01/18 17:01:55	1.12
--- arm.exp	2002/01/19 14:15:20
*************** if {[istarget *arm*-*-*] || [istarget "x
*** 35,40 ****
--- 35,42 ----
  
      gas_test "arch4t.s" "-marmv4t" $stdoptlist "Arm architecture 4t instructions"
  
+     run_dump_test "arch5tej"
+ 
      gas_test "copro.s" "" $stdoptlist "Co processor instructions"
  
      gas_test "immed.s" "" $stdoptlist "immediate expressions"