[PATCH] x86/APX: limit printing of REX2 payload

Jan Beulich jbeulich@suse.com
Wed Sep 9 05:52:29 GMT 2026


On 09.09.2026 07:50, Jiang, Haochen wrote:
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Tuesday, September 8, 2026 11:11 PM
>>
>> When set bits were properly consumed (and hence all we want is an
>> indication that REX2-encoding is in use), print merely {rex2}, thus also
>> better matching original input.
>>
>> While effectively copying parts of an existing conditional, also simplify
>> the original: There's no need to apply the 3-bit mask twice.
>>
>> While adjusting testcases, also escape curly braces.
> 
> Actually, when I am working on BHI_CTRL patch, I have the same question
> for why we are printing {rex2 0x88}. Thus, I asked Lili for that. Lili told me
> that back to the very beginning, it is H.J requested to add those additional
> info to express the rex2 prefix.

And we still do when there are unconsumed bits.

> Maybe we need H.J's input on this.

Sure, I'm not going to commit right away.

Jan

>> --- a/opcodes/i386-dis.c
>> +++ b/opcodes/i386-dis.c
>> @@ -10267,7 +10267,7 @@ print_insn (bfd_vma pc, disassemble_info
>>    /* Check if the REX2 prefix is used.  */
>>    if (ins.last_rex2_prefix >= 0
>>        && ((ins.rex2 & REX2_SPECIAL)
>> -	  || (((ins.rex2 & 7) ^ (ins.rex2_used & 7)) == 0
>> +	  || (((ins.rex2 ^ ins.rex2_used) & 7) == 0
>>  	      && (ins.rex ^ ins.rex_used) == 0
>>  	      && (ins.rex2 & 7))))
>>      ins.all_prefixes[ins.last_rex2_prefix] = 0;
>> @@ -10300,11 +10300,14 @@ print_insn (bfd_vma pc, disassemble_info
>>  	if (name == NULL)
>>  	  abort ();
>>  	prefix_length += strlen (name) + 1;
>> -	if (ins.all_prefixes[i] == REX2_OPCODE)
>> +	if (ins.all_prefixes[i] != REX2_OPCODE)
>> +	  i386_dis_printf (info, dis_style_mnemonic, "%s ", name);
>> +	else if (((ins.rex2 ^ ins.rex2_used) & 7) == 0
>> +		 && ((ins.rex ^ ins.rex_used) & 0xf) == 0)
>> +	  i386_dis_printf (info, dis_style_mnemonic, "{%s} ", name);
>> +	else
>>  	  i386_dis_printf (info, dis_style_mnemonic, "{%s 0x%x} ", name,
>>  			   (unsigned int) ins.rex2_payload);
>> -	else
>> -	  i386_dis_printf (info, dis_style_mnemonic, "%s ", name);
>>        }
>>
>>    /* Check maximum code length.  */
>> --- a/gas/testsuite/gas/i386/x86-64-pseudos.d
>> +++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
>> @@ -447,17 +447,17 @@ Disassembly of section .text:
>>   +[a-f0-9]+:	40 0f 38 01 01       	rex phaddw \(%rcx\),%mm0
>>   +[a-f0-9]+:	41 0f 38 01 00       	phaddw \(%r8\),%mm0
>>   +[a-f0-9]+:	88 c4                	mov    %al,%ah
>> - +[a-f0-9]+:	d5 00 d3 e0          	{rex2 0x0} shl %cl,%eax
>> - +[a-f0-9]+:	d5 00 38 ca          	{rex2 0x0} cmp %cl,%dl
>> - +[a-f0-9]+:	d5 00 b3 01          	{rex2 0x0} mov \$(0x)?1,%bl
>> - +[a-f0-9]+:	d5 00 89 c3          	{rex2 0x0} mov %eax,%ebx
>> - +[a-f0-9]+:	d5 01 89 c6          	{rex2 0x1} mov %eax,%r14d
>> - +[a-f0-9]+:	d5 01 89 00          	{rex2 0x1} mov %eax,\(%r8\)
>> - +[a-f0-9]+:	d5 80 28 d7          	{rex2 0x80} movaps %xmm7,%xmm2
>> - +[a-f0-9]+:	d5 84 28 e7          	{rex2 0x84}
>> movaps %xmm7,%xmm12
>> - +[a-f0-9]+:	d5 80 28 11          	{rex2 0x80} movaps \(%rcx\),%xmm2
>> - +[a-f0-9]+:	d5 81 28 10          	{rex2 0x81} movaps \(%r8\),%xmm2
>> - +[a-f0-9]+:	d5 80 d5 f0          	{rex2 0x80} pmullw %mm0,%mm6
>> + +[a-f0-9]+:	d5 00 d3 e0          	\{rex2\} shl %cl,%eax
>> + +[a-f0-9]+:	d5 00 38 ca          	\{rex2\} cmp %cl,%dl
>> + +[a-f0-9]+:	d5 00 b3 01          	\{rex2\} mov \$(0x)?1,%bl
>> + +[a-f0-9]+:	d5 00 89 c3          	\{rex2\} mov %eax,%ebx
>> + +[a-f0-9]+:	d5 09 89 c6          	\{rex2\} mov %rax,%r14
>> + +[a-f0-9]+:	d5 01 89 00          	\{rex2\} mov %eax,\(%r8\)
>> + +[a-f0-9]+:	d5 80 28 d7          	\{rex2\} movaps %xmm7,%xmm2
>> + +[a-f0-9]+:	d5 84 28 e7          	\{rex2\} movaps %xmm7,%xmm12
>> + +[a-f0-9]+:	d5 80 28 11          	\{rex2\} movaps \(%rcx\),%xmm2
>> + +[a-f0-9]+:	d5 81 28 10          	\{rex2\} movaps \(%r8\),%xmm2
>> + +[a-f0-9]+:	d5 80 d5 f0          	\{rex2\} pmullw %mm0,%mm6
>>   +[a-f0-9]+:	8a 45 00             	mov    0x0\(%rbp\),%al
>>   +[a-f0-9]+:	8a 45 00             	mov    0x0\(%rbp\),%al
>>   +[a-f0-9]+:	8a 85 00 00 00 00    	mov    0x0\(%rbp\),%al
>> @@ -513,14 +513,14 @@ Disassembly of section .text:
>>   +[a-f0-9]+:	40 0f 38 01 01       	rex phaddw \(%rcx\),%mm0
>>   +[a-f0-9]+:	41 0f 38 01 00       	phaddw \(%r8\),%mm0
>>   +[a-f0-9]+:	88 c4                	mov    %al,%ah
>> - +[a-f0-9]+:	d5 00 89 c3          	{rex2 0x0} mov %eax,%ebx
>> - +[a-f0-9]+:	d5 01 89 c6          	{rex2 0x1} mov %eax,%r14d
>> - +[a-f0-9]+:	d5 01 89 00          	{rex2 0x1} mov %eax,\(%r8\)
>> - +[a-f0-9]+:	d5 80 28 d7          	{rex2 0x80} movaps %xmm7,%xmm2
>> - +[a-f0-9]+:	d5 84 28 e7          	{rex2 0x84}
>> movaps %xmm7,%xmm12
>> - +[a-f0-9]+:	d5 80 28 11          	{rex2 0x80} movaps \(%rcx\),%xmm2
>> - +[a-f0-9]+:	d5 81 28 10          	{rex2 0x81} movaps \(%r8\),%xmm2
>> - +[a-f0-9]+:	d5 80 d5 f0          	{rex2 0x80} pmullw %mm0,%mm6
>> + +[a-f0-9]+:	d5 00 89 c3          	\{rex2\} mov %eax,%ebx
>> + +[a-f0-9]+:	d5 01 89 c6          	\{rex2\} mov %eax,%r14d
>> + +[a-f0-9]+:	d5 01 89 00          	\{rex2\} mov %eax,\(%r8\)
>> + +[a-f0-9]+:	d5 80 28 d7          	\{rex2\} movaps %xmm7,%xmm2
>> + +[a-f0-9]+:	d5 84 28 e7          	\{rex2\} movaps %xmm7,%xmm12
>> + +[a-f0-9]+:	d5 80 28 11          	\{rex2\} movaps \(%rcx\),%xmm2
>> + +[a-f0-9]+:	d5 81 28 10          	\{rex2\} movaps \(%r8\),%xmm2
>> + +[a-f0-9]+:	d5 80 d5 f0          	\{rex2\} pmullw %mm0,%mm6
>>   +[a-f0-9]+:	8a 45 00             	mov    0x0\(%rbp\),%al
>>   +[a-f0-9]+:	8a 45 00             	mov    0x0\(%rbp\),%al
>>   +[a-f0-9]+:	8a 85 00 00 00 00    	mov    0x0\(%rbp\),%al
>> --- a/gas/testsuite/gas/i386/x86-64-pseudos.s
>> +++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
>> @@ -408,7 +408,7 @@ _start:
>>  	{rex2} cmp %cl, %dl
>>  	{rex2} mov $1, %bl
>>  	{rex2} movl %eax,%ebx
>> -	{rex2} movl %eax,%r14d
>> +	{rex2} movq %rax,%r14
>>  	{rex2} movl %eax,(%r8)
>>  	{rex2} movaps %xmm7,%xmm2
>>  	{rex2} movaps %xmm7,%xmm12
>> --- a/ld/testsuite/ld-x86-64/apx-load1a.d
>> +++ b/ld/testsuite/ld-x86-64/apx-load1a.d
>> @@ -119,5 +119,5 @@ Disassembly of section .text:
>>   +[a-f0-9]+:	62 ec fc 0c 69 c9 20 20 60 00 	\{nf\} imul
>> \$0x602020,%r17,%r17
>>   +[a-f0-9]+:	62 fc fc 08 69 d1 20 20 60 00 	imul   \$0x602020,%r17,%rdx
>>   +[a-f0-9]+:	62 e4 fc 08 69 d1 20 20 60 00 	imul   \$0x602020,%rcx,%r18
>> - +[a-f0-9]+:	2e d5 00 68 20 20 60 00 	cs \{rex2 0x0\} push
>> \$0x602020
>> + +[a-f0-9]+:	2e d5 00 68 20 20 60 00 	cs \{rex2\} push \$0x602020
>>  #pass
>> --- a/ld/testsuite/ld-x86-64/apx-load1c.d
>> +++ b/ld/testsuite/ld-x86-64/apx-load1c.d
>> @@ -112,5 +112,5 @@ Disassembly of section .text:
>>   +[a-f0-9]+:	62 e4 fc 0c af 0d 2e 0d 20 00 	\{nf\} imul
>> 0x200d2e\(%rip\),%r17        # 2020e0 <.*>
>>   +[a-f0-9]+:	62 e4 ec 18 af 0d 24 0d 20 00 	imul
>> 0x200d24\(%rip\),%r17,%rdx        # 2020e0 <.*>
>>   +[a-f0-9]+:	62 f4 ec 10 af 0d 1a 0d 20 00 	imul
>> 0x200d1a\(%rip\),%rcx,%r18        # 2020e0 <.*>
>> - +[a-f0-9]+:	d5 00 ff 35 12 0d 20 00 	\{rex2 0x0\} push
>> 0x200d12\(%rip\)        # 2020e0 <.*>
>> + +[a-f0-9]+:	d5 00 ff 35 12 0d 20 00 	\{rex2\} push
>> 0x200d12\(%rip\)        # 2020e0 <.*>
>>  #pass
>> --- a/ld/testsuite/ld-x86-64/apx-load1d.d
>> +++ b/ld/testsuite/ld-x86-64/apx-load1d.d
>> @@ -112,5 +112,5 @@ Disassembly of section .text:
>>   +[a-f0-9]+:	62 e4 fc 0c af 0d be 0c 20 00 	\{nf\} imul
>> 0x200cbe\(%rip\),%r17        # 202070 <.*>
>>   +[a-f0-9]+:	62 e4 ec 18 af 0d b4 0c 20 00 	imul
>> 0x200cb4\(%rip\),%r17,%rdx        # 202070 <.*>
>>   +[a-f0-9]+:	62 f4 ec 10 af 0d aa 0c 20 00 	imul
>> 0x200caa\(%rip\),%rcx,%r18        # 202070 <.*>
>> - +[a-f0-9]+:	d5 00 ff 35 a2 0c 20 00 	\{rex2 0x0\} push 0x200ca2\(%rip\)
>> # 202070 <.*>
>> + +[a-f0-9]+:	d5 00 ff 35 a2 0c 20 00 	\{rex2\} push 0x200ca2\(%rip\)        #
>> 202070 <.*>
>>  #pass
>> --- a/ld/testsuite/ld-x86-64/load4.d
>> +++ b/ld/testsuite/ld-x86-64/load4.d
>> @@ -11,6 +11,6 @@ Disassembly of section .text:
>>  [ 	]*[a-f0-9]+:	44 84 3d ([0-9a-f]{2} ){4} *	test   %r15b,0x[a-f0-
>> 9]+\(%rip\)        # 6000e0 <.*>
>>  [ 	]*[a-f0-9]+:	48 87 05 ([0-9a-f]{2} ){4} *	xchg   %rax,0x[a-f0-
>> 9]+\(%rip\)        # 6000e0 <.*>
>>  [ 	]*[a-f0-9]+:	d5 c0 03 05 ([0-9a-f]{2} ){4} *	lsl    0x[a-f0-
>> 9]+\(%rip\),%r16d        # 6000e0 <.*>
>> -[ 	]*[a-f0-9]+:	d5 80 13 05 ([0-9a-f]{2} ){4} *	\{rex2 0x80\}
>> movlps %xmm0,0x[a-f0-9]+\(%rip\)        # 6000e0 <.*>
>> -[ 	]*[a-f0-9]+:	d5 80 2b 05 ([0-9a-f]{2} ){4} *	\{rex2 0x80\}
>> movntps %xmm0,0x[a-f0-9]+\(%rip\)        # 6000e0 <.*>
>> +[ 	]*[a-f0-9]+:	d5 80 13 05 ([0-9a-f]{2} ){4} *	\{rex2\}
>> movlps %xmm0,0x[a-f0-9]+\(%rip\)        # 6000e0 <.*>
>> +[ 	]*[a-f0-9]+:	d5 80 2b 05 ([0-9a-f]{2} ){4} *	\{rex2\}
>> movntps %xmm0,0x[a-f0-9]+\(%rip\)        # 6000e0 <.*>
>>  #pass



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