[PATCH v4] gas: arm: Support CPU-specific extensions with -mcpu

[Richard Earnshaw (foss)]

On 18/06/2026 20:55, Sivan Shani wrote:
> Previously, +ext/+noext feature modifiers were only available with
> -march. Extend the same mechanism to -mcpu so that CPU-specific
> extensions can be enabled and disabled with -mcpu=<cpu>+ext and
> -mcpu=<cpu>+noext, matching GCC behaviour.
> 
> Add a per-CPU extension table (arm_ext_table) and a new ext_table
> field to struct arm_cpu_option_table, reusing the existing
> arm_parse_extension () infrastructure used by -march. Move the
> ARM_EXT/ARM_ADD/ARM_REMOVE helpers, the ALL_FP/ALL_SIMD/ALL_FP_MVE_FP
> masks and the CDE_EXTENSIONS list so they can be shared by both
> -mcpu and -march extension tables.
> 
> Update ARM CPU feature definitions to match GCC CPU baselines. The
> default feature set for each -mcpu remains unchanged; only support for
> +ext/+noext modifiers is added.
> 
> Add tests covering supported CPU extension modifiers and the resulting
> build attributes for each CPU.
> 
> gas/
>     * config/tc-arm.c (struct arm_cpu_option_table): Add ext_table
>     field.
>     (ARM_EXT, ARM_ADD, ARM_REMOVE, ALL_FP, ALL_SIMD,
>     ALL_FP_MVE_FP, CDE_EXTENSIONS): Move earlier.
>     (cortex_*_ext_table, ...): New.
>     (arm_cpus): Populate ext_table and update CPU feature baselines
>     to match GCC.
>     (arm_parse_cpu): Pass opt->ext_table to arm_parse_extension.
> 
> gas/testsuite/
>     * gas/arm/feat-*.s: New test sources.
>     * gas/arm/mcpu-*.d: New tests.
>     * gas/arm/attr-cpu-directive.d: Update.

Thanks,

Pushed.

R.> 
> ###
> This version address the review comments from:
> Message-ID: <2846ac09-3590-409d-8ecf-cc385c8929e8@arm.com>
> https://inbox.sourceware.org/binutils/2846ac09-3590-409d-8ecf-cc385c8929e8@arm.com/
> ###
> 
> ---
>  gas/config/tc-arm.c                           | 699 ++++++++++++++----
>  gas/testsuite/gas/arm/attr-cpu-directive.d    |   2 +
>  gas/testsuite/gas/arm/feat-bf16.s             |   5 +
>  gas/testsuite/gas/arm/feat-crc.s              |   4 +
>  gas/testsuite/gas/arm/feat-dotprod.s          |   4 +
>  gas/testsuite/gas/arm/feat-dsp.s              |   4 +
>  gas/testsuite/gas/arm/feat-fp-vfpv3.s         |   4 +
>  gas/testsuite/gas/arm/feat-fp-vfpv5.s         |   4 +
>  gas/testsuite/gas/arm/feat-fp.dp.s            |   4 +
>  gas/testsuite/gas/arm/feat-fp.s               |   4 +
>  gas/testsuite/gas/arm/feat-fp16.s             |   4 +
>  gas/testsuite/gas/arm/feat-i8mm.s             |   4 +
>  gas/testsuite/gas/arm/feat-idiv.s             |   3 +
>  gas/testsuite/gas/arm/feat-mp.s               |   4 +
>  gas/testsuite/gas/arm/feat-mve.fp.s           |   5 +
>  gas/testsuite/gas/arm/feat-neon-fp16.s        |   4 +
>  gas/testsuite/gas/arm/feat-pacbti.s           |   4 +
>  gas/testsuite/gas/arm/feat-sec.s              |   4 +
>  gas/testsuite/gas/arm/feat-simd.s             |   5 +
>  gas/testsuite/gas/arm/feat-vfpv3-d16-fp16.s   |   4 +
>  gas/testsuite/gas/arm/mcpu-cortex-a12-attrs.d |  17 +
>  .../gas/arm/mcpu-cortex-a12-feat-simd.d       |  19 +
>  gas/testsuite/gas/arm/mcpu-cortex-a15-attrs.d |  17 +
>  .../gas/arm/mcpu-cortex-a15-feat-simd.d       |  19 +
>  gas/testsuite/gas/arm/mcpu-cortex-a17-attrs.d |  17 +
>  .../gas/arm/mcpu-cortex-a17-feat-simd.d       |  19 +
>  gas/testsuite/gas/arm/mcpu-cortex-a32-attrs.d |  16 +
>  .../gas/arm/mcpu-cortex-a32-attrs1.d          |  18 +
>  .../gas/arm/mcpu-cortex-a32-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-a32-feat-simd.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a35-attrs.d |  16 +
>  .../gas/arm/mcpu-cortex-a35-attrs1.d          |  18 +
>  .../gas/arm/mcpu-cortex-a35-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-a35-feat-simd.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a5-attrs.d  |  16 +
>  .../gas/arm/mcpu-cortex-a5-feat-mp.d          |  18 +
>  .../gas/arm/mcpu-cortex-a5-feat-neon-fp16.d   |  18 +
>  .../gas/arm/mcpu-cortex-a5-feat-sec.d         |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a53-attrs.d |  16 +
>  .../gas/arm/mcpu-cortex-a53-attrs1.d          |  18 +
>  .../gas/arm/mcpu-cortex-a53-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-a53-feat-simd.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a55-attrs.d |  17 +
>  .../gas/arm/mcpu-cortex-a55-attrs1.d          |  18 +
>  .../gas/arm/mcpu-cortex-a55-feat-dotprod.d    |  18 +
>  .../gas/arm/mcpu-cortex-a55-feat-fp16.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a57-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a57-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-a57-feat-simd.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a7-attrs.d  |  17 +
>  .../gas/arm/mcpu-cortex-a7-feat-simd.d        |  19 +
>  .../gas/arm/mcpu-cortex-a710-attrs.d          |  18 +
>  .../gas/arm/mcpu-cortex-a710-feat-bf16.d      |  18 +
>  .../gas/arm/mcpu-cortex-a710-feat-fp16.d      |  18 +
>  .../gas/arm/mcpu-cortex-a710-feat-i8mm.d      |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a72-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a72-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-a72-feat-simd.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a73-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a73-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-a73-feat-simd.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a75-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a75-feat-dotprod.d    |  18 +
>  .../gas/arm/mcpu-cortex-a75-feat-fp16.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a76-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a76-feat-dotprod.d    |  18 +
>  .../gas/arm/mcpu-cortex-a76-feat-fp16.d       |  18 +
>  .../gas/arm/mcpu-cortex-a76ae-attrs.d         |  18 +
>  .../gas/arm/mcpu-cortex-a76ae-feat-dotprod.d  |  18 +
>  .../gas/arm/mcpu-cortex-a76ae-feat-fp16.d     |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a77-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a77-feat-dotprod.d    |  18 +
>  .../gas/arm/mcpu-cortex-a77-feat-fp16.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a78-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-a78-feat-dotprod.d    |  18 +
>  .../gas/arm/mcpu-cortex-a78-feat-fp16.d       |  18 +
>  .../gas/arm/mcpu-cortex-a78ae-attrs.d         |  18 +
>  .../gas/arm/mcpu-cortex-a78ae-feat-dotprod.d  |  18 +
>  .../gas/arm/mcpu-cortex-a78ae-feat-fp16.d     |  18 +
>  .../gas/arm/mcpu-cortex-a78c-attrs.d          |  18 +
>  .../gas/arm/mcpu-cortex-a78c-feat-dotprod.d   |  18 +
>  .../gas/arm/mcpu-cortex-a78c-feat-fp16.d      |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-a8-attrs.d  |  15 +
>  .../gas/arm/mcpu-cortex-a8-feat-simd.d        |  17 +
>  gas/testsuite/gas/arm/mcpu-cortex-a9-attrs.d  |  16 +
>  .../gas/arm/mcpu-cortex-a9-feat-mp.d          |  18 +
>  .../gas/arm/mcpu-cortex-a9-feat-neon-fp16.d   |  18 +
>  .../gas/arm/mcpu-cortex-a9-feat-sec.d         |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-m33-attrs.d |  13 +
>  .../gas/arm/mcpu-cortex-m33-feat-dsp.d        |  15 +
>  .../gas/arm/mcpu-cortex-m33-feat-fp-vfpv5.d   |  15 +
>  .../gas/arm/mcpu-cortex-m35p-attrs.d          |  13 +
>  .../gas/arm/mcpu-cortex-m35p-feat-dsp.d       |  15 +
>  .../gas/arm/mcpu-cortex-m35p-feat-fp-vfpv5.d  |  15 +
>  gas/testsuite/gas/arm/mcpu-cortex-m4-attrs.d  |  13 +
>  .../gas/arm/mcpu-cortex-m4-feat-fp-vfpv3.d    |  15 +
>  gas/testsuite/gas/arm/mcpu-cortex-m52-attrs.d |  14 +
>  .../gas/arm/mcpu-cortex-m52-attrs1.d          |  16 +
>  .../gas/arm/mcpu-cortex-m52-feat-fp-dp.d      |  16 +
>  .../gas/arm/mcpu-cortex-m52-feat-mve-fp.d     |  16 +
>  .../gas/arm/mcpu-cortex-m52-feat-pacbti.d     |  16 +
>  gas/testsuite/gas/arm/mcpu-cortex-m55-attrs.d |  14 +
>  .../gas/arm/mcpu-cortex-m55-attrs1.d          |  16 +
>  .../gas/arm/mcpu-cortex-m55-feat-fp-dp.d      |  16 +
>  .../gas/arm/mcpu-cortex-m55-feat-mve-fp.d     |  16 +
>  gas/testsuite/gas/arm/mcpu-cortex-m7-attrs.d  |  13 +
>  .../gas/arm/mcpu-cortex-m7-feat-fp-dp.d       |  14 +
>  gas/testsuite/gas/arm/mcpu-cortex-m85-attrs.d |  14 +
>  .../gas/arm/mcpu-cortex-m85-feat-fp-dp.d      |  16 +
>  .../gas/arm/mcpu-cortex-m85-feat-mve-fp.d     |  16 +
>  .../gas/arm/mcpu-cortex-m85-feat-pacbti.d     |  16 +
>  .../gas/arm/mcpu-cortex-r4f-feat-fp-vfpv3.d   |  15 +
>  gas/testsuite/gas/arm/mcpu-cortex-r5-attrs.d  |  15 +
>  .../gas/arm/mcpu-cortex-r5-feat-fp-vfpv3.d    |  16 +
>  .../gas/arm/mcpu-cortex-r5-feat-idiv.d        |  16 +
>  gas/testsuite/gas/arm/mcpu-cortex-r52-attrs.d |  17 +
>  .../gas/arm/mcpu-cortex-r52-feat-crc.d        |  18 +
>  .../gas/arm/mcpu-cortex-r52-feat-simd.d       |  18 +
>  .../gas/arm/mcpu-cortex-r52plus-attrs.d       |  17 +
>  .../gas/arm/mcpu-cortex-r52plus-feat-crc.d    |  18 +
>  .../gas/arm/mcpu-cortex-r52plus-feat-simd.d   |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-r7-attrs.d  |  15 +
>  .../gas/arm/mcpu-cortex-r7-feat-idiv.d        |  17 +
>  .../arm/mcpu-cortex-r7-feat-vfpv3-d16-fp16.d  |  17 +
>  gas/testsuite/gas/arm/mcpu-cortex-r8-attrs.d  |  15 +
>  .../gas/arm/mcpu-cortex-r8-feat-idiv.d        |  17 +
>  .../arm/mcpu-cortex-r8-feat-vfpv3-d16-fp16.d  |  17 +
>  gas/testsuite/gas/arm/mcpu-cortex-x1-attrs.d  |  18 +
>  .../gas/arm/mcpu-cortex-x1-feat-dotprod.d     |  18 +
>  .../gas/arm/mcpu-cortex-x1-feat-fp16.d        |  18 +
>  gas/testsuite/gas/arm/mcpu-cortex-x1c-attrs.d |  18 +
>  .../gas/arm/mcpu-cortex-x1c-feat-dotprod.d    |  18 +
>  .../gas/arm/mcpu-cortex-x1c-feat-fp16.d       |  18 +
>  gas/testsuite/gas/arm/mcpu-exynos-m1-attrs.d  |  18 +
>  .../gas/arm/mcpu-exynos-m1-feat-crc.d         |  18 +
>  .../gas/arm/mcpu-exynos-m1-feat-simd.d        |  18 +
>  .../gas/arm/mcpu-marvell-pj4-feat-fp-vfpv3.d  |  17 +
>  .../gas/arm/mcpu-marvell-pj4-feat-mp.d        |  17 +
>  .../gas/arm/mcpu-marvell-pj4-feat-sec.d       |  17 +
>  .../gas/arm/mcpu-neoverse-n1-attrs.d          |  18 +
>  .../gas/arm/mcpu-neoverse-n1-feat-dotprod.d   |  18 +
>  .../gas/arm/mcpu-neoverse-n1-feat-fp16.d      |  18 +
>  .../gas/arm/mcpu-neoverse-n2-attrs.d          |  18 +
>  .../gas/arm/mcpu-neoverse-n2-feat-bf16.d      |  18 +
>  .../gas/arm/mcpu-neoverse-n2-feat-fp16.d      |  18 +
>  .../gas/arm/mcpu-neoverse-n2-feat-i8mm.d      |  18 +
>  .../gas/arm/mcpu-neoverse-v1-attrs.d          |  18 +
>  .../gas/arm/mcpu-neoverse-v1-feat-bf16.d      |  18 +
>  .../gas/arm/mcpu-neoverse-v1-feat-fp16.d      |  18 +
>  .../gas/arm/mcpu-neoverse-v1-feat-i8mm.d      |  18 +
>  gas/testsuite/gas/arm/mcpu-xgene1-feat-simd.d |  18 +
>  151 files changed, 2867 insertions(+), 155 deletions(-)
>  create mode 100644 gas/testsuite/gas/arm/feat-bf16.s
>  create mode 100644 gas/testsuite/gas/arm/feat-crc.s
>  create mode 100644 gas/testsuite/gas/arm/feat-dotprod.s
>  create mode 100644 gas/testsuite/gas/arm/feat-dsp.s
>  create mode 100644 gas/testsuite/gas/arm/feat-fp-vfpv3.s
>  create mode 100644 gas/testsuite/gas/arm/feat-fp-vfpv5.s
>  create mode 100644 gas/testsuite/gas/arm/feat-fp.dp.s
>  create mode 100644 gas/testsuite/gas/arm/feat-fp.s
>  create mode 100644 gas/testsuite/gas/arm/feat-fp16.s
>  create mode 100644 gas/testsuite/gas/arm/feat-i8mm.s
>  create mode 100644 gas/testsuite/gas/arm/feat-idiv.s
>  create mode 100644 gas/testsuite/gas/arm/feat-mp.s
>  create mode 100644 gas/testsuite/gas/arm/feat-mve.fp.s
>  create mode 100644 gas/testsuite/gas/arm/feat-neon-fp16.s
>  create mode 100644 gas/testsuite/gas/arm/feat-pacbti.s
>  create mode 100644 gas/testsuite/gas/arm/feat-sec.s
>  create mode 100644 gas/testsuite/gas/arm/feat-simd.s
>  create mode 100644 gas/testsuite/gas/arm/feat-vfpv3-d16-fp16.s
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a12-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a12-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a15-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a15-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a17-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a17-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a32-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a32-attrs1.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a32-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a32-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a35-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a35-attrs1.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a35-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a35-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a5-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a5-feat-mp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a5-feat-neon-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a5-feat-sec.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a53-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a53-attrs1.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a53-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a53-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a55-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a55-attrs1.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a55-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a55-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a57-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a57-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a57-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a7-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a7-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a710-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a710-feat-bf16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a710-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a710-feat-i8mm.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a72-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a72-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a72-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a73-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a73-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a73-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a75-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a75-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a75-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a76-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a76-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a76-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a76ae-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a77-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a77-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a77-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78ae-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78c-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a8-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a8-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a9-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a9-feat-mp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a9-feat-neon-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-a9-feat-sec.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m33-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m33-feat-dsp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m33-feat-fp-vfpv5.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m35p-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-dsp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-fp-vfpv5.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m4-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m4-feat-fp-vfpv3.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m52-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m52-attrs1.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m52-feat-fp-dp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m52-feat-mve-fp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m52-feat-pacbti.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m55-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m55-attrs1.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m55-feat-fp-dp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m55-feat-mve-fp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m7-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m7-feat-fp-dp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m85-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m85-feat-fp-dp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m85-feat-mve-fp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-m85-feat-pacbti.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r4f-feat-fp-vfpv3.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r5-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r5-feat-fp-vfpv3.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r5-feat-idiv.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r52-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r52-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r52-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r52plus-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r7-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r7-feat-idiv.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r7-feat-vfpv3-d16-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r8-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r8-feat-idiv.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-r8-feat-vfpv3-d16-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-x1-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-x1-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-x1-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-x1c-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-exynos-m1-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-exynos-m1-feat-crc.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-exynos-m1-feat-simd.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-fp-vfpv3.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-mp.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-sec.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n1-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-dotprod.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n2-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-bf16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-i8mm.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-v1-attrs.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-bf16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-fp16.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-i8mm.d
>  create mode 100644 gas/testsuite/gas/arm/mcpu-xgene1-feat-simd.d
> 
> diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
> index 3ff29542411..ba599ef1fda 100644
> --- a/gas/config/tc-arm.c
> +++ b/gas/config/tc-arm.c
> @@ -30495,6 +30495,14 @@ const struct arm_legacy_option_table arm_legacy_opts[] =
>    {NULL, NULL, ARM_ARCH_NONE, NULL}
>  };
>  
> +struct arm_ext_table
> +{
> +  const char *		  name;
> +  size_t		  name_len;
> +  const arm_feature_set	  merge;
> +  const arm_feature_set	  clear;
> +};
> +
>  struct arm_cpu_option_table
>  {
>    const char *           name;
> @@ -30507,11 +30515,339 @@ struct arm_cpu_option_table
>    /* The canonical name of the CPU, or NULL to use NAME converted to upper
>       case.  */
>    const char *           canonical_name;
> +  const struct arm_ext_table *	ext_table;
> +};
> +
> +/* Used to add support for +E and +noE extension.  */
> +#define ARM_EXT(E, M, C) { E, sizeof (E) - 1, M, C }
> +/* Used to add support for a +E extension.  */
> +#define ARM_ADD(E, M) { E, sizeof(E) - 1, M, ARM_ARCH_NONE }
> +/* Used to add support for a +noE extension.  */
> +#define ARM_REMOVE(E, C) { E, sizeof(E) -1, ARM_ARCH_NONE, C }
> +
> +#define ALL_FP ARM_FEATURE (0, ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML, \
> +			    ~0 & ~FPU_ENDIAN_PURE)
> +#define ALL_FP_MVE_FP ARM_FEATURE (0, (ARM_EXT2_FP16_INST		   \
> +					| ARM_EXT2_FP16_FML		   \
> +					| ARM_EXT2_MVE_FP),		   \
> +				   ~0 & ~FPU_ENDIAN_PURE)
> +#define ALL_SIMD ARM_FEATURE_COPROC (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA       \
> +				     | FPU_NEON_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
> +				     | FPU_NEON_EXT_DOTPROD)
> +
> +#define CDE_EXTENSIONS \
> +  ARM_ADD ("cdecp0", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE0)), \
> +  ARM_ADD ("cdecp1", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE1)), \
> +  ARM_ADD ("cdecp2", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE2)), \
> +  ARM_ADD ("cdecp3", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE3)), \
> +  ARM_ADD ("cdecp4", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE4)), \
> +  ARM_ADD ("cdecp5", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE5)), \
> +  ARM_ADD ("cdecp6", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE6)), \
> +  ARM_ADD ("cdecp7", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE7))
> +
> +/* -mcpu extensions.  */
> +static const struct arm_ext_table cortex_a5_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  ARM_REMOVE ("simd", ALL_SIMD),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a7_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  ARM_REMOVE ("simd", ALL_SIMD),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a8_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a9_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  ARM_REMOVE ("simd", ALL_SIMD),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a12_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a15_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a17_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_r5_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",    ALL_FP),
> +  ARM_REMOVE ("fp.dp", ARM_FEATURE_COPROC (FPU_VFP_EXT_V1 | FPU_VFP_EXT_V3
> +					   | FPU_VFP_EXT_ARMV8)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_r7_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",    ALL_FP),
> +  ARM_REMOVE ("fp.dp", ARM_FEATURE_COPROC (FPU_VFP_EXT_V1 | FPU_VFP_EXT_V3
> +					   | FPU_VFP_EXT_ARMV8)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_r8_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",    ALL_FP),
> +  ARM_REMOVE ("fp.dp", ARM_FEATURE_COPROC (FPU_VFP_EXT_V1 | FPU_VFP_EXT_V3
> +					   | FPU_VFP_EXT_ARMV8)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m4_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",    ALL_FP),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m7_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",    ALL_FP),
> +  ARM_REMOVE ("fp.dp", ARM_FEATURE_COPROC (FPU_VFP_EXT_V1 | FPU_VFP_EXT_V3
> +					   | FPU_VFP_EXT_ARMV8)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a32_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",     ALL_FP),
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a35_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",     ALL_FP),
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a53_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",     ALL_FP),
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a57_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a72_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a73_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table exynos_m1_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_r52_ext_table[] =
> +{
> +  ARM_REMOVE ("fp.dp", ARM_FEATURE_COPROC (FPU_VFP_EXT_D32 | FPU_VFP_EXT_ARMV8
> +					   | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA
> +					   | FPU_NEON_EXT_ARMV8 | FPU_NEON_EXT_RDMA
> +					   | FPU_NEON_EXT_DOTPROD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_r52plus_ext_table[] =
> +{
> +  ARM_REMOVE ("fp.dp", ARM_FEATURE_COPROC (FPU_VFP_EXT_D32 | FPU_VFP_EXT_ARMV8
> +					   | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA
> +					   | FPU_NEON_EXT_ARMV8 | FPU_NEON_EXT_RDMA
> +					   | FPU_NEON_EXT_DOTPROD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m33_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",  ALL_FP),
> +  ARM_REMOVE ("dsp", ARM_FEATURE_CORE_LOW (ARM_AEXT_V8M_MAIN_DSP)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m35p_ext_table[] =
> +{
> +  ARM_REMOVE ("fp",  ALL_FP),
> +  ARM_REMOVE ("dsp", ARM_FEATURE_CORE_LOW (ARM_AEXT_V8M_MAIN_DSP)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m52_ext_table[] =
> +{
> +  ARM_REMOVE ("pacbti", ARM_FEATURE_CORE_HIGH_HIGH (ARM_EXT3_PACBTI)),
> +  ARM_REMOVE ("mve.fp", ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE_FP)),
> +  ARM_REMOVE ("mve",    ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE | ARM_EXT2_MVE_FP)),
> +  ARM_REMOVE ("fp",     ALL_FP_MVE_FP),
> +  ARM_REMOVE ("dsp",    ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE | ARM_EXT2_MVE_FP)),
> +  CDE_EXTENSIONS,
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m55_ext_table[] =
> +{
> +  ARM_REMOVE ("mve.fp", ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE_FP)),
> +  ARM_REMOVE ("mve",    ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE | ARM_EXT2_MVE_FP)),
> +  ARM_REMOVE ("fp",     ALL_FP_MVE_FP),
> +  ARM_REMOVE ("dsp",    ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE | ARM_EXT2_MVE_FP)),
> +  CDE_EXTENSIONS,
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_m85_ext_table[] =
> +{
> +  ARM_REMOVE ("pacbti", ARM_FEATURE_CORE_HIGH_HIGH (ARM_EXT3_PACBTI)),
> +  ARM_REMOVE ("mve.fp", ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE_FP)),
> +  ARM_REMOVE ("mve",    ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE | ARM_EXT2_MVE_FP)),
> +  ARM_REMOVE ("fp",     ALL_FP_MVE_FP),
> +  ARM_REMOVE ("dsp",    ARM_FEATURE_CORE_HIGH (ARM_EXT2_MVE | ARM_EXT2_MVE_FP)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a55_ext_table[] =
> +{
> +  ARM_REMOVE ("fp", ALL_FP),
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a75_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a76_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a76ae_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a77_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a78_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a78ae_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a78c_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_x1_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_x1c_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table neoverse_n1_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table neoverse_v1_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table cortex_a710_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
> +};
> +
> +static const struct arm_ext_table neoverse_n2_ext_table[] =
> +{
> +  ARM_ADD ("crypto", ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8
> +					 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)),
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE }
>  };
>  
>  /* This list should, at a minimum, contain all the cpu names
>     recognized by GCC.  */
> -#define ARM_CPU_OPT(N, CN, V, E, DF) { N, sizeof (N) - 1, V, E, DF, CN }
> +#define ARM_CPU_OPT(N, CN, V, E, DF) { N, sizeof (N) - 1, V, E, DF, CN, NULL }
> +#define ARM_CPU_OPT2(N, CN, V, E, DF, ext) \
> +  { N, sizeof (N) - 1, V, E, DF, CN, ext##_ext_table }
>  
>  static const struct arm_cpu_option_table arm_cpus[] =
>  {
> @@ -30764,113 +31100,171 @@ static const struct arm_cpu_option_table arm_cpus[] =
>    ARM_CPU_OPT ("arm1176jzf-s",	  NULL,		       ARM_ARCH_V6KZ,
>  	       ARM_ARCH_NONE,
>  	       FPU_ARCH_VFP_V2),
> -  ARM_CPU_OPT ("cortex-a5",	  "Cortex-A5",	       ARM_ARCH_V7A,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_MP | ARM_EXT_SEC),
> -	       FPU_ARCH_SOFTVFP),
> -  ARM_CPU_OPT ("cortex-a7",	  "Cortex-A7",	       ARM_ARCH_V7VE,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_NEON_VFP_V4),
> -  ARM_CPU_OPT ("cortex-a8",	  "Cortex-A8",	       ARM_ARCH_V7A,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_SEC),
> -	       ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1)),
> -  ARM_CPU_OPT ("cortex-a9",	  "Cortex-A9",	       ARM_ARCH_V7A,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_MP | ARM_EXT_SEC),
> -	       ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1)),
> -  ARM_CPU_OPT ("cortex-a12",	  "Cortex-A12",	       ARM_ARCH_V7VE,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_NEON_VFP_V4),
> -  ARM_CPU_OPT ("cortex-a15",	  "Cortex-A15",	       ARM_ARCH_V7VE,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_NEON_VFP_V4),
> -  ARM_CPU_OPT ("cortex-a17",	  "Cortex-A17",	       ARM_ARCH_V7VE,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_NEON_VFP_V4),
> -  ARM_CPU_OPT ("cortex-a32",	  "Cortex-A32",	       ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a35",	  "Cortex-A35",	       ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a53",	  "Cortex-A53",	       ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a55",    "Cortex-A55",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> -  ARM_CPU_OPT ("cortex-a57",	  "Cortex-A57",	       ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a72",	  "Cortex-A72",	       ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	      FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a73",	  "Cortex-A73",	       ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	      FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a75",    "Cortex-A75",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> -  ARM_CPU_OPT ("cortex-a76",    "Cortex-A76",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> -  ARM_CPU_OPT ("cortex-a76ae",    "Cortex-A76AE",      ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> -  ARM_CPU_OPT ("cortex-a77",    "Cortex-A77",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> -  ARM_CPU_OPT ("cortex-a78",   "Cortex-A78",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST | ARM_EXT2_SB),
> -	       FPU_ARCH_DOTPROD_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a78ae",   "Cortex-A78AE",	   ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST | ARM_EXT2_SB),
> -	       FPU_ARCH_DOTPROD_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a78c",   "Cortex-A78C",	   ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST | ARM_EXT2_SB),
> -	       FPU_ARCH_DOTPROD_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-a710",   "Cortex-A710",	   ARM_ARCH_V9A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
> -				    | ARM_EXT2_BF16
> -				    | ARM_EXT2_I8MM),
> -	       FPU_ARCH_DOTPROD_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("ares",    "Ares",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> +  ARM_CPU_OPT2 ("cortex-a5",	  "Cortex-A5",	       ARM_ARCH_V7A,
> +		ARM_FEATURE ((ARM_EXT_MP | ARM_EXT_SEC),
> +			     ARM_EXT2_FP16_INST,
> +			     (FPU_VFP_V4 | FPU_NEON_EXT_V1
> +			      | FPU_NEON_EXT_FMA)),
> +		FPU_ARCH_NEON_VFP_V4,
> +		cortex_a5),
> +  ARM_CPU_OPT2 ("cortex-a7",	  "Cortex-A7",	       ARM_ARCH_V7VE,
> +		ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1
> +				    | FPU_NEON_EXT_FMA),
> +		FPU_ARCH_NEON_VFP_V4,
> +		cortex_a7),
> +  ARM_CPU_OPT2 ("cortex-a8",	  "Cortex-A8",	       ARM_ARCH_V7A,
> +		ARM_FEATURE_LOW (ARM_EXT_SEC, FPU_VFP_V3 | FPU_NEON_EXT_V1),
> +		ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1),
> +		cortex_a8),
> +  ARM_CPU_OPT2 ("cortex-a9",	  "Cortex-A9",	       ARM_ARCH_V7A,
> +		ARM_FEATURE ((ARM_EXT_MP | ARM_EXT_SEC),
> +			     ARM_EXT2_FP16_INST,
> +			     (FPU_VFP_V4 | FPU_NEON_EXT_V1
> +			      | FPU_NEON_EXT_FMA)),
> +		FPU_ARCH_NEON_VFP_V4,
> +		cortex_a9),
> +  ARM_CPU_OPT2 ("cortex-a12",	  "Cortex-A12",	       ARM_ARCH_V7VE,
> +		ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1
> +				    | FPU_NEON_EXT_FMA),
> +		FPU_ARCH_NEON_VFP_V4,
> +		cortex_a12),
> +  ARM_CPU_OPT2 ("cortex-a15",	  "Cortex-A15",	       ARM_ARCH_V7VE,
> +		ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1
> +				    | FPU_NEON_EXT_FMA),
> +		FPU_ARCH_NEON_VFP_V4,
> +		cortex_a15),
> +  ARM_CPU_OPT2 ("cortex-a17",	  "Cortex-A17",	       ARM_ARCH_V7VE,
> +		ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1
> +				    | FPU_NEON_EXT_FMA),
> +		FPU_ARCH_NEON_VFP_V4,
> +		cortex_a17),
> +  ARM_CPU_OPT2 ("cortex-a32",	  "Cortex-A32",	       ARM_ARCH_V8A,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_a32),
> +  ARM_CPU_OPT2 ("cortex-a35",	  "Cortex-A35",	       ARM_ARCH_V8A,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_a35),
> +  ARM_CPU_OPT2 ("cortex-a53",	  "Cortex-A53",	       ARM_ARCH_V8A,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_a53),
> +  ARM_CPU_OPT2 ("cortex-a55",    "Cortex-A55",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		cortex_a55),
> +  ARM_CPU_OPT2 ("cortex-a57",	  "Cortex-A57",	       ARM_ARCH_V8A,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_a57),
> +  ARM_CPU_OPT2 ("cortex-a72",	  "Cortex-A72",	       ARM_ARCH_V8A,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_a72),
> +  ARM_CPU_OPT2 ("cortex-a73",	  "Cortex-A73",	       ARM_ARCH_V8A,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_a73),
> +  ARM_CPU_OPT2 ("cortex-a75",    "Cortex-A75",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		cortex_a75),
> +  ARM_CPU_OPT2 ("cortex-a76",    "Cortex-A76",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a76),
> +  ARM_CPU_OPT2 ("cortex-a76ae",    "Cortex-A76AE",      ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a76ae),
> +  ARM_CPU_OPT2 ("cortex-a77",    "Cortex-A77",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a77),
> +  ARM_CPU_OPT2 ("cortex-a78",   "Cortex-A78",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a78),
> +  ARM_CPU_OPT2 ("cortex-a78ae",   "Cortex-A78AE",	   ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a78ae),
> +  ARM_CPU_OPT2 ("cortex-a78c",   "Cortex-A78C",	   ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a78c),
>    ARM_CPU_OPT ("cortex-r4",	  "Cortex-R4",	       ARM_ARCH_V7R,
>  	       ARM_ARCH_NONE,
>  	       FPU_ARCH_SOFTVFP),
>    ARM_CPU_OPT ("cortex-r4f",	  "Cortex-R4F",	       ARM_ARCH_V7R,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_VFP_V3D16),
> -  ARM_CPU_OPT ("cortex-r5",	  "Cortex-R5",	       ARM_ARCH_V7R,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV),
> -	       FPU_ARCH_SOFTVFP),
> -  ARM_CPU_OPT ("cortex-r7",	  "Cortex-R7",	       ARM_ARCH_V7R,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV),
> -	       FPU_ARCH_VFP_V3D16),
> -  ARM_CPU_OPT ("cortex-r8",	  "Cortex-R8",	       ARM_ARCH_V7R,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV),
> +	       FPU_ARCH_VFP_V3D16,
>  	       FPU_ARCH_VFP_V3D16),
> -  ARM_CPU_OPT ("cortex-r52",	  "Cortex-R52",	       ARM_ARCH_V8R,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	      FPU_ARCH_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-r52plus",	  "Cortex-R52+",	       ARM_ARCH_V8R,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	      FPU_ARCH_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-m35p",	  "Cortex-M35P",       ARM_ARCH_V8M_MAIN,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP),
> -	       FPU_ARCH_SOFTVFP),
> -  ARM_CPU_OPT ("cortex-m33",	  "Cortex-M33",	       ARM_ARCH_V8M_MAIN,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP),
> -	       FPU_ARCH_SOFTVFP),
> +  ARM_CPU_OPT2 ("cortex-r5",	  "Cortex-R5",	       ARM_ARCH_V7R,
> +		ARM_FEATURE (ARM_EXT_ADIV, 0, FPU_VFP_V3),
> +		FPU_ARCH_VFP_V3,
> +		cortex_r5),
> +  ARM_CPU_OPT2 ("cortex-r7",	  "Cortex-R7",	       ARM_ARCH_V7R,
> +		ARM_FEATURE (ARM_EXT_ADIV, 0, FPU_VFP_V3D16 | FPU_VFP_EXT_FP16),
> +		FPU_ARCH_VFP_V3D16_FP16,
> +		cortex_r7),
> +  ARM_CPU_OPT2 ("cortex-r8",	  "Cortex-R8",	       ARM_ARCH_V7R,
> +		ARM_FEATURE (ARM_EXT_ADIV, 0, FPU_VFP_V3D16 | FPU_VFP_EXT_FP16),
> +		FPU_ARCH_VFP_V3D16_FP16,
> +		cortex_r8),
> +  ARM_CPU_OPT2 ("cortex-r52",	  "Cortex-R52",	       ARM_ARCH_V8R,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_r52),
> +  ARM_CPU_OPT2 ("cortex-r52plus",	  "Cortex-R52+",	ARM_ARCH_V8R,
> +		ARM_FEATURE(0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		cortex_r52plus),
> +  ARM_CPU_OPT2 ("cortex-m85",	 "Cortex-M85",	       ARM_ARCH_V8_1M_MAIN,
> +		ARM_FEATURE_ALL(ARM_AEXT_V8M_MAIN_DSP,
> +				(ARM_EXT2_FP16_INST | ARM_EXT2_MVE
> +				 | ARM_EXT2_MVE_FP),
> +				ARM_EXT3_PACBTI,
> +				(FPU_VFP_V5D16 | FPU_VFP_EXT_FP16
> +				 | FPU_VFP_EXT_FMA)),
> +		FPU_ARCH_SOFTVFP,
> +		cortex_m85),
> +  ARM_CPU_OPT2 ("cortex-m55",	 "Cortex-M55",	       ARM_ARCH_V8_1M_MAIN,
> +		ARM_FEATURE_ALL(ARM_AEXT_V8M_MAIN_DSP,
> +				(ARM_EXT2_FP16_INST | ARM_EXT2_MVE
> +				 | ARM_EXT2_MVE_FP),
> +				0,
> +				(FPU_VFP_V5D16 | FPU_VFP_EXT_FP16
> +				 | FPU_VFP_EXT_FMA)),
> +		FPU_ARCH_SOFTVFP,
> +		cortex_m55),
> +  ARM_CPU_OPT2 ("cortex-m52",	 "Cortex-M52",	       ARM_ARCH_V8_1M_MAIN,
> +		ARM_FEATURE_ALL (ARM_AEXT_V8M_MAIN_DSP,
> +				 (ARM_EXT2_FP16_INST | ARM_EXT2_MVE
> +				  | ARM_EXT2_MVE_FP),
> +				 ARM_EXT3_PACBTI,
> +				 (FPU_VFP_V5D16 | FPU_VFP_EXT_FP16
> +				  | FPU_VFP_EXT_FMA)),
> +		FPU_ARCH_SOFTVFP,
> +		cortex_m52),
> +  ARM_CPU_OPT2 ("cortex-m35p",	  "Cortex-M35P",       ARM_ARCH_V8M_MAIN,
> +		ARM_FEATURE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP, FPU_VFP_V4D16),
> +		FPU_ARCH_VFP_V3D16,
> +		cortex_m35p),
> +  ARM_CPU_OPT2 ("cortex-m33",	  "Cortex-M33",	       ARM_ARCH_V8M_MAIN,
> +		ARM_FEATURE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP, FPU_VFP_V4D16),
> +		FPU_ARCH_VFP_V3D16, cortex_m33),
>    ARM_CPU_OPT ("cortex-m23",	  "Cortex-M23",	       ARM_ARCH_V8M_BASE,
>  	       ARM_ARCH_NONE,
>  	       FPU_ARCH_SOFTVFP),
> -  ARM_CPU_OPT ("cortex-m7",	  "Cortex-M7",	       ARM_ARCH_V7EM,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_SOFTVFP),
> -  ARM_CPU_OPT ("cortex-m4",	  "Cortex-M4",	       ARM_ARCH_V7EM,
> -	       ARM_ARCH_NONE,
> -	       FPU_ARCH_SOFTVFP),
> +  ARM_CPU_OPT2 ("cortex-m7",	  "Cortex-M7",	       ARM_ARCH_V7EM,
> +		ARM_FEATURE_COPROC (FPU_VFP_V5D16),
> +		FPU_ARCH_VFP_V5D16,
> +		cortex_m7),
> +  ARM_CPU_OPT2 ("cortex-m4",	  "Cortex-M4",	       ARM_ARCH_V7EM,
> +		ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16),
> +		FPU_ARCH_VFP_V4_SP_D16,
> +		cortex_m4),
>    ARM_CPU_OPT ("cortex-m3",	  "Cortex-M3",	       ARM_ARCH_V7M,
>  	       ARM_ARCH_NONE,
>  	       FPU_ARCH_SOFTVFP),
> @@ -30883,28 +31277,50 @@ static const struct arm_cpu_option_table arm_cpus[] =
>    ARM_CPU_OPT ("cortex-m0plus",	  "Cortex-M0+",	       ARM_ARCH_V6SM,
>  	       ARM_ARCH_NONE,
>  	       FPU_ARCH_SOFTVFP),
> -  ARM_CPU_OPT ("cortex-x1",   "Cortex-X1",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST | ARM_EXT2_SB),
> -	       FPU_ARCH_DOTPROD_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("cortex-x1c",   "Cortex-X1C",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST | ARM_EXT2_SB),
> -	       FPU_ARCH_DOTPROD_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("exynos-m1",	  "Samsung Exynos M1", ARM_ARCH_V8A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
> -  ARM_CPU_OPT ("neoverse-n1",    "Neoverse N1",	       ARM_ARCH_V8_2A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
> -  ARM_CPU_OPT ("neoverse-n2",	 "Neoverse N2",	       ARM_ARCH_V8_5A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
> -				    | ARM_EXT2_BF16
> -				    | ARM_EXT2_I8MM),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4),
> -  ARM_CPU_OPT ("neoverse-v1", "Neoverse V1", ARM_ARCH_V8_4A,
> -	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
> -				    | ARM_EXT2_BF16
> -				    | ARM_EXT2_I8MM),
> -	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4),
> +  ARM_CPU_OPT2 ("cortex-x1",   "Cortex-X1",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_x1),
> +  ARM_CPU_OPT2 ("cortex-x1c",   "Cortex-X1C",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_x1c),
> +  ARM_CPU_OPT2 ("exynos-m1",	  "Samsung Exynos M1", ARM_ARCH_V8A,
> +		ARM_FEATURE (0, ARM_EXT2_CRC, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
> +		FPU_ARCH_NEON_VFP_ARMV8,
> +		exynos_m1),
> +  ARM_CPU_OPT2 ("neoverse-n1",	 "Neoverse N1",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		neoverse_n1),
> +  ARM_CPU_OPT2 ("ares",    "Ares",	       ARM_ARCH_V8_2A,
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		neoverse_n1),
> +  ARM_CPU_OPT2 ("neoverse-n2",	 "Neoverse N2",	       ARM_ARCH_V9A,
> +		ARM_FEATURE(0,
> +			    (ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML
> +			     | ARM_EXT2_BF16 | ARM_EXT2_I8MM),
> +			    (FPU_NEON_ARMV8_1 | FPU_VFP_ARMV8
> +			     | FPU_NEON_EXT_DOTPROD | FPU_NEON_EXT_RDMA)),
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		neoverse_n2),
> +  ARM_CPU_OPT2 ("cortex-a710",	 "Cortex-A710",	   ARM_ARCH_V9A,
> +		ARM_FEATURE(0,
> +			    (ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML
> +			     | ARM_EXT2_BF16 | ARM_EXT2_I8MM),
> +			    (FPU_NEON_ARMV8_1 | FPU_VFP_ARMV8
> +			     | FPU_NEON_EXT_DOTPROD | FPU_NEON_EXT_RDMA)),
> +		FPU_ARCH_VFP_V5_SP_D16,
> +		cortex_a710),
> +  ARM_CPU_OPT2 ("neoverse-v1",	 "Neoverse V1",	       ARM_ARCH_V8_4A,
> +		ARM_FEATURE(0,
> +			    (ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML
> +			     | ARM_EXT2_BF16 | ARM_EXT2_I8MM),
> +			    (FPU_NEON_ARMV8_1 | FPU_VFP_ARMV8
> +			     | FPU_NEON_EXT_DOTPROD)),
> +		FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML,
> +		neoverse_v1),
>    /* ??? XSCALE is really an architecture.  */
>    ARM_CPU_OPT ("xscale",	  NULL,		       ARM_ARCH_XSCALE,
>  	       ARM_ARCH_NONE,
> @@ -30928,31 +31344,24 @@ static const struct arm_cpu_option_table arm_cpus[] =
>  
>    /* Marvell processors.  */
>    ARM_CPU_OPT ("marvell-pj4",	  NULL,		       ARM_ARCH_V7A,
> -	       ARM_FEATURE_CORE_LOW (ARM_EXT_MP | ARM_EXT_SEC),
> -	       FPU_ARCH_VFP_V3D16),
> +	       ARM_FEATURE (ARM_EXT_MP | ARM_EXT_SEC, 0, FPU_VFP_V3),
> +	       FPU_ARCH_VFP_V3),
>    ARM_CPU_OPT ("marvell-whitney", NULL,		       ARM_ARCH_V7A,
>  	       ARM_FEATURE_CORE_LOW (ARM_EXT_MP | ARM_EXT_SEC),
>  	       FPU_ARCH_NEON_VFP_V4),
>  
>    /* APM X-Gene family.  */
>    ARM_CPU_OPT ("xgene1",	  "APM X-Gene 1",      ARM_ARCH_V8A,
> -	       ARM_ARCH_NONE,
> +	       ARM_FEATURE (0, 0, FPU_NEON_ARMV8 | FPU_VFP_ARMV8),
>  	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
>    ARM_CPU_OPT ("xgene2",	  "APM X-Gene 2",      ARM_ARCH_V8A,
>  	       ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
>  	       FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
>  
> -  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE, ARM_ARCH_NONE, NULL }
> +  { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE, ARM_ARCH_NONE, NULL, NULL }
>  };
>  #undef ARM_CPU_OPT
> -
> -struct arm_ext_table
> -{
> -  const char *		  name;
> -  size_t		  name_len;
> -  const arm_feature_set	  merge;
> -  const arm_feature_set	  clear;
> -};
> +#undef ARM_CPU_OPT2
>  
>  struct arm_arch_option_table
>  {
> @@ -30963,16 +31372,6 @@ struct arm_arch_option_table
>    const struct arm_ext_table *	ext_table;
>  };
>  
> -/* Used to add support for +E and +noE extension.  */
> -#define ARM_EXT(E, M, C) { E, sizeof (E) - 1, M, C }
> -/* Used to add support for a +E extension.  */
> -#define ARM_ADD(E, M) { E, sizeof(E) - 1, M, ARM_ARCH_NONE }
> -/* Used to add support for a +noE extension.  */
> -#define ARM_REMOVE(E, C) { E, sizeof(E) -1, ARM_ARCH_NONE, C }
> -
> -#define ALL_FP ARM_FEATURE (0, ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML, \
> -			    ~0 & ~FPU_ENDIAN_PURE)
> -
>  static const struct arm_ext_table armv5te_ext_table[] =
>  {
>    ARM_EXT ("fp", FPU_ARCH_VFP_V2, ALL_FP),
> @@ -31169,16 +31568,6 @@ static const struct arm_ext_table armv9a_ext_table[] =
>  #define armv94a_ext_table armv93a_ext_table
>  #define armv95a_ext_table armv94a_ext_table
>  
> -#define CDE_EXTENSIONS \
> -  ARM_ADD ("cdecp0", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE0)), \
> -  ARM_ADD ("cdecp1", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE1)), \
> -  ARM_ADD ("cdecp2", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE2)), \
> -  ARM_ADD ("cdecp3", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE3)), \
> -  ARM_ADD ("cdecp4", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE4)), \
> -  ARM_ADD ("cdecp5", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE5)), \
> -  ARM_ADD ("cdecp6", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE6)), \
> -  ARM_ADD ("cdecp7", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CDE | ARM_EXT2_CDE7))
> -
>  static const struct arm_ext_table armv8m_main_ext_table[] =
>  {
>    ARM_EXT ("dsp", ARM_FEATURE_CORE_LOW (ARM_AEXT_V8M_MAIN_DSP),
> @@ -31755,7 +32144,7 @@ arm_parse_cpu (const char *str)
>  	  }
>  
>  	if (ext != NULL)
> -	  return arm_parse_extension (ext, mcpu_cpu_opt, mcpu_ext_opt, NULL);
> +	  return arm_parse_extension (ext, mcpu_cpu_opt, mcpu_ext_opt, opt->ext_table);
>  
>  	return true;
>        }
> diff --git a/gas/testsuite/gas/arm/attr-cpu-directive.d b/gas/testsuite/gas/arm/attr-cpu-directive.d
> index a2ab435fc0a..62a07adb4de 100644
> --- a/gas/testsuite/gas/arm/attr-cpu-directive.d
> +++ b/gas/testsuite/gas/arm/attr-cpu-directive.d
> @@ -12,4 +12,6 @@ File Attributes
>    Tag_CPU_arch_profile: Application
>    Tag_ARM_ISA_use: Yes
>    Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_Advanced_SIMD_arch: NEONv1
>    Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/feat-bf16.s b/gas/testsuite/gas/arm/feat-bf16.s
> new file mode 100644
> index 00000000000..46fc48ba567
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-bf16.s
> @@ -0,0 +1,5 @@
> +.syntax unified
> +.thumb
> +
> +@ feat FP16
> +vdot.bf16 q0, q1, q2
> diff --git a/gas/testsuite/gas/arm/feat-crc.s b/gas/testsuite/gas/arm/feat-crc.s
> new file mode 100644
> index 00000000000..671ac14ebcb
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-crc.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat CRC
> +crc32w  r0, r0, r1
> diff --git a/gas/testsuite/gas/arm/feat-dotprod.s b/gas/testsuite/gas/arm/feat-dotprod.s
> new file mode 100644
> index 00000000000..775c3ba4c02
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-dotprod.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat DOTPROD
> +vudot.u8 q0, q1, q2
> diff --git a/gas/testsuite/gas/arm/feat-dsp.s b/gas/testsuite/gas/arm/feat-dsp.s
> new file mode 100644
> index 00000000000..2f54c7327d1
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-dsp.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat DSP
> +smlad   r0, r1, r2, r3
> diff --git a/gas/testsuite/gas/arm/feat-fp-vfpv3.s b/gas/testsuite/gas/arm/feat-fp-vfpv3.s
> new file mode 100644
> index 00000000000..4435db35690
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-fp-vfpv3.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat FP (VFP-v3)
> +vmla.f32 s0, s1, s2
> diff --git a/gas/testsuite/gas/arm/feat-fp-vfpv5.s b/gas/testsuite/gas/arm/feat-fp-vfpv5.s
> new file mode 100644
> index 00000000000..13a2e7aca9e
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-fp-vfpv5.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat FP (VFP-v5)
> +vfma.f32 s0, s1, s2
> diff --git a/gas/testsuite/gas/arm/feat-fp.dp.s b/gas/testsuite/gas/arm/feat-fp.dp.s
> new file mode 100644
> index 00000000000..34b68cd8603
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-fp.dp.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat FP.DP
> +vadd.f64 d0, d1, d2
> diff --git a/gas/testsuite/gas/arm/feat-fp.s b/gas/testsuite/gas/arm/feat-fp.s
> new file mode 100644
> index 00000000000..5cf49af0e9f
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-fp.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat FP
> +vadd.f32 s0, s1, s2
> diff --git a/gas/testsuite/gas/arm/feat-fp16.s b/gas/testsuite/gas/arm/feat-fp16.s
> new file mode 100644
> index 00000000000..6780678e8ca
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-fp16.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat FP16
> +vadd.f16 q0, q1, q2
> diff --git a/gas/testsuite/gas/arm/feat-i8mm.s b/gas/testsuite/gas/arm/feat-i8mm.s
> new file mode 100644
> index 00000000000..bb3818726a8
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-i8mm.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat I8MM
> +vusmmla.s8  q6, q7, q8
> diff --git a/gas/testsuite/gas/arm/feat-idiv.s b/gas/testsuite/gas/arm/feat-idiv.s
> new file mode 100644
> index 00000000000..8b289fa817d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-idiv.s
> @@ -0,0 +1,3 @@
> +.syntax unified
> +
> +sdiv r0, r1, r2
> diff --git a/gas/testsuite/gas/arm/feat-mp.s b/gas/testsuite/gas/arm/feat-mp.s
> new file mode 100644
> index 00000000000..db365d7f282
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-mp.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat MP
> +ldrex r0, [r1]
> diff --git a/gas/testsuite/gas/arm/feat-mve.fp.s b/gas/testsuite/gas/arm/feat-mve.fp.s
> new file mode 100644
> index 00000000000..81c23300dc3
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-mve.fp.s
> @@ -0,0 +1,5 @@
> +.syntax unified
> +.thumb
> +
> +@ MVE.FP
> +vmul.f32 q0, q1, q2
> diff --git a/gas/testsuite/gas/arm/feat-neon-fp16.s b/gas/testsuite/gas/arm/feat-neon-fp16.s
> new file mode 100644
> index 00000000000..55ab08553bf
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-neon-fp16.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat NEON-FP16
> +vadd.f16 q0, q1, q2
> diff --git a/gas/testsuite/gas/arm/feat-pacbti.s b/gas/testsuite/gas/arm/feat-pacbti.s
> new file mode 100644
> index 00000000000..2399f0ca230
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-pacbti.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ PACBTI
> +pac     r12, lr, sp
> diff --git a/gas/testsuite/gas/arm/feat-sec.s b/gas/testsuite/gas/arm/feat-sec.s
> new file mode 100644
> index 00000000000..bdb516a30f4
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-sec.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat SEC
> +smc     #0
> diff --git a/gas/testsuite/gas/arm/feat-simd.s b/gas/testsuite/gas/arm/feat-simd.s
> new file mode 100644
> index 00000000000..871f5490902
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-simd.s
> @@ -0,0 +1,5 @@
> +.syntax unified
> +.text
> +
> +@ feat SIMD
> +vadd.i32 q0, q1, q2
> diff --git a/gas/testsuite/gas/arm/feat-vfpv3-d16-fp16.s b/gas/testsuite/gas/arm/feat-vfpv3-d16-fp16.s
> new file mode 100644
> index 00000000000..41ccd2d9414
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/feat-vfpv3-d16-fp16.s
> @@ -0,0 +1,4 @@
> +.syntax unified
> +
> +@ feat VFP3-D16-FP16
> +vcvtt.f16.f32 s0, s1
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a12-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a12-attrs.d
> new file mode 100644
> index 00000000000..953175f6eba
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a12-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-A12 Attributes
> +#as: -mcpu=cortex-a12+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A12"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a12-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a12-feat-simd.d
> new file mode 100644
> index 00000000000..e8d96c21f04
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a12-feat-simd.d
> @@ -0,0 +1,19 @@
> +#name: Cortex-A12 feat-simd
> +#as: -mcpu=cortex-a12
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A12"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a15-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a15-attrs.d
> new file mode 100644
> index 00000000000..c780f280b0c
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a15-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-A15 Attributes
> +#as: -mcpu=cortex-a15+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A15"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a15-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a15-feat-simd.d
> new file mode 100644
> index 00000000000..796f8d3fb04
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a15-feat-simd.d
> @@ -0,0 +1,19 @@
> +#name: Cortex-A15 feat-simd
> +#as: -mcpu=cortex-a15
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A15"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a17-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a17-attrs.d
> new file mode 100644
> index 00000000000..c8b56ff58c2
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a17-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-A17 Attributes
> +#as: -mcpu=cortex-a17+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A17"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a17-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a17-feat-simd.d
> new file mode 100644
> index 00000000000..37e3444d237
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a17-feat-simd.d
> @@ -0,0 +1,19 @@
> +#name: Cortex-A17 feat-simd
> +#as: -mcpu=cortex-a17
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A17"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a32-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a32-attrs.d
> new file mode 100644
> index 00000000000..6979aff8835
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a32-attrs.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-A32 Attributes
> +#as: -mcpu=cortex-a32+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A32"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a32-attrs1.d b/gas/testsuite/gas/arm/mcpu-cortex-a32-attrs1.d
> new file mode 100644
> index 00000000000..98dc43bde01
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a32-attrs1.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A32 Attributes 1
> +#as: -mcpu=cortex-a32+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A32"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a32-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-a32-feat-crc.d
> new file mode 100644
> index 00000000000..dfa191bd52c
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a32-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A32 feat-crc
> +#as: -mcpu=cortex-a32
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A32"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a32-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a32-feat-simd.d
> new file mode 100644
> index 00000000000..20b6a34a8fb
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a32-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A32 feat-simd
> +#as: -mcpu=cortex-a32
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A32"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a35-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a35-attrs.d
> new file mode 100644
> index 00000000000..5743016e2e3
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a35-attrs.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-A35 Attributes
> +#as: -mcpu=cortex-a35+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A35"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a35-attrs1.d b/gas/testsuite/gas/arm/mcpu-cortex-a35-attrs1.d
> new file mode 100644
> index 00000000000..97160cf2f8a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a35-attrs1.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A35 Attributes 1
> +#as: -mcpu=cortex-a35+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A35"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a35-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-a35-feat-crc.d
> new file mode 100644
> index 00000000000..eb61f3b0f36
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a35-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A35 feat-crc
> +#as: -mcpu=cortex-a35
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A35"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a35-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a35-feat-simd.d
> new file mode 100644
> index 00000000000..3c92517c90f
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a35-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A35 feat-simd
> +#as: -mcpu=cortex-a35
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A35"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a5-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a5-attrs.d
> new file mode 100644
> index 00000000000..d1ab26e87aa
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a5-attrs.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-A5 Attributes
> +#as: -mcpu=cortex-a5+nofp+nosimd
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-mp.d b/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-mp.d
> new file mode 100644
> index 00000000000..3b34ffb508b
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-mp.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A5 feat-mp
> +#as: -mcpu=cortex-a5
> +#source: feat-mp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-neon-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-neon-fp16.d
> new file mode 100644
> index 00000000000..36571e2aed3
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-neon-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A5 feat-neon-fp16
> +#as: -mcpu=cortex-a5
> +#source: feat-neon-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-sec.d b/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-sec.d
> new file mode 100644
> index 00000000000..dad84126dec
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a5-feat-sec.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A5 feat-sec
> +#as: -mcpu=cortex-a5
> +#source: feat-sec.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a53-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a53-attrs.d
> new file mode 100644
> index 00000000000..754eca0570e
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a53-attrs.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-A53 Attributes
> +#as: -mcpu=cortex-a53+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A53"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a53-attrs1.d b/gas/testsuite/gas/arm/mcpu-cortex-a53-attrs1.d
> new file mode 100644
> index 00000000000..ad52b9278fb
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a53-attrs1.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A53 Attributes 1
> +#as: -mcpu=cortex-a53+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A53"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a53-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-a53-feat-crc.d
> new file mode 100644
> index 00000000000..70a688c1116
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a53-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A53 feat-crc
> +#as: -mcpu=cortex-a53
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A53"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a53-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a53-feat-simd.d
> new file mode 100644
> index 00000000000..0c423b767bf
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a53-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A53 feat-simd
> +#as: -mcpu=cortex-a53
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A53"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a55-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a55-attrs.d
> new file mode 100644
> index 00000000000..247e146fc23
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a55-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-A55 Attributes
> +#as: -mcpu=cortex-a55+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A55"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a55-attrs1.d b/gas/testsuite/gas/arm/mcpu-cortex-a55-attrs1.d
> new file mode 100644
> index 00000000000..595a677bc73
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a55-attrs1.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A55 Attributes 1
> +#as: -mcpu=cortex-a55+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A55"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a55-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a55-feat-dotprod.d
> new file mode 100644
> index 00000000000..bd95929778c
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a55-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A55 feat-dotprod
> +#as: -mcpu=cortex-a55
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A55"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a55-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a55-feat-fp16.d
> new file mode 100644
> index 00000000000..79ec5bc418f
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a55-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A55 feat-fp16
> +#as: -mcpu=cortex-a55
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A55"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a57-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a57-attrs.d
> new file mode 100644
> index 00000000000..0d7e1200e7d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a57-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A57 Attributes
> +#as: -mcpu=cortex-a57+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A57"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a57-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-a57-feat-crc.d
> new file mode 100644
> index 00000000000..49be31c5c15
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a57-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A57 feat-crc
> +#as: -mcpu=cortex-a57
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A57"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a57-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a57-feat-simd.d
> new file mode 100644
> index 00000000000..48fc50eaf60
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a57-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A57 feat-simd
> +#as: -mcpu=cortex-a57
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A57"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a7-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a7-attrs.d
> new file mode 100644
> index 00000000000..20f0d4b02c8
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a7-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-A7 Attributes
> +#as: -mcpu=cortex-a7+nofp+nosimd
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A7"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a7-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a7-feat-simd.d
> new file mode 100644
> index 00000000000..b0c59f22900
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a7-feat-simd.d
> @@ -0,0 +1,19 @@
> +#name: Cortex-A7 feat-simd
> +#as: -mcpu=cortex-a7
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A7"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a710-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a710-attrs.d
> new file mode 100644
> index 00000000000..dac147dfb51
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a710-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A710 Attributes
> +#as: -mcpu=cortex-a710+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A710"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-bf16.d b/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-bf16.d
> new file mode 100644
> index 00000000000..b53d648d5ad
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-bf16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A710 feat-bf16
> +#as: -mcpu=cortex-a710
> +#source: feat-bf16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A710"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-fp16.d
> new file mode 100644
> index 00000000000..b2a2c376c64
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A710 feat-fp16
> +#as: -mcpu=cortex-a710
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A710"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-i8mm.d b/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-i8mm.d
> new file mode 100644
> index 00000000000..c682f38d31c
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a710-feat-i8mm.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A710 feat-i8mm
> +#as: -mcpu=cortex-a710
> +#source: feat-i8mm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A710"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a72-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a72-attrs.d
> new file mode 100644
> index 00000000000..6c16d2ae6d6
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a72-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A72 Attributes
> +#as: -mcpu=cortex-a72+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A72"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a72-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-a72-feat-crc.d
> new file mode 100644
> index 00000000000..8f3b7002250
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a72-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A72 feat-crc
> +#as: -mcpu=cortex-a72
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A72"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a72-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a72-feat-simd.d
> new file mode 100644
> index 00000000000..3cad2ec1b5e
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a72-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A72 feat-simd
> +#as: -mcpu=cortex-a72
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A72"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a73-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a73-attrs.d
> new file mode 100644
> index 00000000000..07df89b796a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a73-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A73 Attributes
> +#as: -mcpu=cortex-a73+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A73"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a73-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-a73-feat-crc.d
> new file mode 100644
> index 00000000000..ca750aaf6fd
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a73-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A73 feat-crc
> +#as: -mcpu=cortex-a73
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A73"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a73-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a73-feat-simd.d
> new file mode 100644
> index 00000000000..7475b25de40
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a73-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A73 feat-simd
> +#as: -mcpu=cortex-a73
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A73"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a75-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a75-attrs.d
> new file mode 100644
> index 00000000000..cc88ad25c11
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a75-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A75 Attributes
> +#as: -mcpu=cortex-a75+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A75"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a75-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a75-feat-dotprod.d
> new file mode 100644
> index 00000000000..83ee9088ad0
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a75-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A75 feat-dotprod
> +#as: -mcpu=cortex-a75
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A75"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a75-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a75-feat-fp16.d
> new file mode 100644
> index 00000000000..c996200a244
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a75-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A75 feat-fp16
> +#as: -mcpu=cortex-a75
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A75"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a76-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a76-attrs.d
> new file mode 100644
> index 00000000000..088939c0559
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a76-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A76 Attributes
> +#as: -mcpu=cortex-a76+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A76"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a76-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a76-feat-dotprod.d
> new file mode 100644
> index 00000000000..720ea69608f
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a76-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A76 feat-dotprod
> +#as: -mcpu=cortex-a76
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A76"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a76-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a76-feat-fp16.d
> new file mode 100644
> index 00000000000..c9632960f64
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a76-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A76 feat-fp16
> +#as: -mcpu=cortex-a76
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A76"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a76ae-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a76ae-attrs.d
> new file mode 100644
> index 00000000000..ed050b3e2da
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a76ae-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A76AE Attributes
> +#as: -mcpu=cortex-a76ae+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A76AE"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-dotprod.d
> new file mode 100644
> index 00000000000..449e70ccf5e
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A76AE feat-dotprod
> +#as: -mcpu=cortex-a76ae
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A76AE"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-fp16.d
> new file mode 100644
> index 00000000000..43af92dd16a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a76ae-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A76AE feat-fp16
> +#as: -mcpu=cortex-a76ae
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A76AE"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a77-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a77-attrs.d
> new file mode 100644
> index 00000000000..e014c789449
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a77-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A77 Attributes
> +#as: -mcpu=cortex-a77+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A77"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a77-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a77-feat-dotprod.d
> new file mode 100644
> index 00000000000..7cccf0feec1
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a77-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A77 feat-dotprod
> +#as: -mcpu=cortex-a77
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A77"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a77-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a77-feat-fp16.d
> new file mode 100644
> index 00000000000..97fe61e0f09
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a77-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A77 feat-fp16
> +#as: -mcpu=cortex-a77
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A77"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a78-attrs.d
> new file mode 100644
> index 00000000000..73c5e070aaf
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78 Attributes
> +#as: -mcpu=cortex-a78+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a78-feat-dotprod.d
> new file mode 100644
> index 00000000000..eeb2260163b
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78 feat-dotprod
> +#as: -mcpu=cortex-a78
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a78-feat-fp16.d
> new file mode 100644
> index 00000000000..88936f78c3f
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78 feat-fp16
> +#as: -mcpu=cortex-a78
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78ae-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a78ae-attrs.d
> new file mode 100644
> index 00000000000..944c21f2530
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78ae-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78AE Attributes
> +#as: -mcpu=cortex-a78ae+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78AE"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-dotprod.d
> new file mode 100644
> index 00000000000..8d24972514d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78AE feat-dotprod
> +#as: -mcpu=cortex-a78ae
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78AE"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-fp16.d
> new file mode 100644
> index 00000000000..07d142b24fe
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78ae-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78AE feat-fp16
> +#as: -mcpu=cortex-a78ae
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78AE"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78c-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a78c-attrs.d
> new file mode 100644
> index 00000000000..bd0a9d8a455
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78c-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78C Attributes
> +#as: -mcpu=cortex-a78c+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78C"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-dotprod.d
> new file mode 100644
> index 00000000000..67027068b23
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78C feat-dotprod
> +#as: -mcpu=cortex-a78c
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78C"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-fp16.d
> new file mode 100644
> index 00000000000..f45fc34dc2a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a78c-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A78C feat-fp16
> +#as: -mcpu=cortex-a78c
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A78C"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a8-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a8-attrs.d
> new file mode 100644
> index 00000000000..5b1696f3f0a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a8-attrs.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-A8 Attributes
> +#as: -mcpu=cortex-a8+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A8"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a8-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-a8-feat-simd.d
> new file mode 100644
> index 00000000000..e8de97b31da
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a8-feat-simd.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-A8 feat-simd
> +#as: -mcpu=cortex-a8
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A8"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_Advanced_SIMD_arch: NEONv1
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a9-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-a9-attrs.d
> new file mode 100644
> index 00000000000..4d1ebaa9dab
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a9-attrs.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-A9 Attributes
> +#as: -mcpu=cortex-a9+nofp+nosimd
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A9"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-mp.d b/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-mp.d
> new file mode 100644
> index 00000000000..96ecaaf32b7
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-mp.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A9 feat-mp
> +#as: -mcpu=cortex-a9
> +#source: feat-mp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A9"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-neon-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-neon-fp16.d
> new file mode 100644
> index 00000000000..83ecc83db6f
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-neon-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A9 feat-neon-fp16
> +#as: -mcpu=cortex-a9
> +#source: feat-neon-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A9"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-sec.d b/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-sec.d
> new file mode 100644
> index 00000000000..73386c2bb82
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-a9-feat-sec.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-A9 feat-sec
> +#as: -mcpu=cortex-a9
> +#source: feat-sec.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-A9"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4
> +  Tag_Advanced_SIMD_arch: NEONv1 with Fused-MAC
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m33-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m33-attrs.d
> new file mode 100644
> index 00000000000..d2195500a43
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m33-attrs.d
> @@ -0,0 +1,13 @@
> +#name: Cortex-M33 Attributes
> +#as: -mcpu=cortex-m33+nofp+nodsp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M33"
> +  Tag_CPU_arch: v8-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m33-feat-dsp.d b/gas/testsuite/gas/arm/mcpu-cortex-m33-feat-dsp.d
> new file mode 100644
> index 00000000000..521846cdcc2
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m33-feat-dsp.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-M33 feat-dsp
> +#as: -mcpu=cortex-m33
> +#source: feat-dsp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M33"
> +  Tag_CPU_arch: v8-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: VFPv4-D16
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m33-feat-fp-vfpv5.d b/gas/testsuite/gas/arm/mcpu-cortex-m33-feat-fp-vfpv5.d
> new file mode 100644
> index 00000000000..6624dbac797
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m33-feat-fp-vfpv5.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-M33 feat-fp-vfpv5
> +#as: -mcpu=cortex-m33
> +#source: feat-fp-vfpv5.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M33"
> +  Tag_CPU_arch: v8-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: VFPv4-D16
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m35p-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m35p-attrs.d
> new file mode 100644
> index 00000000000..e8bb5884eac
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m35p-attrs.d
> @@ -0,0 +1,13 @@
> +#name: Cortex-M35P Attributes
> +#as: -mcpu=cortex-m35p+nofp+nodsp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M35P"
> +  Tag_CPU_arch: v8-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-dsp.d b/gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-dsp.d
> new file mode 100644
> index 00000000000..12b6b6dfbfa
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-dsp.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-M35P feat-dsp
> +#as: -mcpu=cortex-m35p
> +#source: feat-dsp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M35P"
> +  Tag_CPU_arch: v8-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: VFPv4-D16
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-fp-vfpv5.d b/gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-fp-vfpv5.d
> new file mode 100644
> index 00000000000..918942ba693
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m35p-feat-fp-vfpv5.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-M35P feat-fp-vfpv5
> +#as: -mcpu=cortex-m35p
> +#source: feat-fp-vfpv5.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M35P"
> +  Tag_CPU_arch: v8-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: VFPv4-D16
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m4-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m4-attrs.d
> new file mode 100644
> index 00000000000..e27944539d7
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m4-attrs.d
> @@ -0,0 +1,13 @@
> +#name: Cortex-M4 Attributes
> +#as: -mcpu=cortex-m4+nofp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M4"
> +  Tag_CPU_arch: v7E-M
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Thumb-2
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m4-feat-fp-vfpv3.d b/gas/testsuite/gas/arm/mcpu-cortex-m4-feat-fp-vfpv3.d
> new file mode 100644
> index 00000000000..c66e37244bc
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m4-feat-fp-vfpv3.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-M4 feat-fp-vfpv3
> +#as: -mcpu=cortex-m4
> +#source: feat-fp-vfpv3.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M4"
> +  Tag_CPU_arch: v7E-M
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv4-D16
> +  Tag_ABI_HardFP_use: SP only
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m52-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m52-attrs.d
> new file mode 100644
> index 00000000000..3e32853c951
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m52-attrs.d
> @@ -0,0 +1,14 @@
> +#name: Cortex-M52 Attributes
> +#as: -mcpu=cortex-m52+nopacbti+nomve.fp+nomve+nofp+nodsp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M52"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m52-attrs1.d b/gas/testsuite/gas/arm/mcpu-cortex-m52-attrs1.d
> new file mode 100644
> index 00000000000..d378a5d4e01
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m52-attrs1.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M52 Attributes 1
> +#as: -mcpu=cortex-m52+cdecp0+cdecp1+cdecp2+cdecp3+cdecp4+cdecp5+cdecp6+cdecp7
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M52"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-fp-dp.d b/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-fp-dp.d
> new file mode 100644
> index 00000000000..fe47c58bd0d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-fp-dp.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M52 feat-fp.dp
> +#as: -mcpu=cortex-m52
> +#source: feat-fp.dp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M52"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-mve-fp.d b/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-mve-fp.d
> new file mode 100644
> index 00000000000..e87ce8184fe
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-mve-fp.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M52 feat-mve.fp
> +#as: -mcpu=cortex-m52
> +#source: feat-mve.fp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M52"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-pacbti.d b/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-pacbti.d
> new file mode 100644
> index 00000000000..e04aae72a08
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m52-feat-pacbti.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M52 feat-pacbti
> +#as: -mcpu=cortex-m52
> +#source: feat-pacbti.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M52"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m55-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m55-attrs.d
> new file mode 100644
> index 00000000000..b873ecdb2f5
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m55-attrs.d
> @@ -0,0 +1,14 @@
> +#name: Cortex-M55 Attributes
> +#as: -mcpu=cortex-m55+nomve.fp+nomve+nofp+nodsp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M55"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m55-attrs1.d b/gas/testsuite/gas/arm/mcpu-cortex-m55-attrs1.d
> new file mode 100644
> index 00000000000..a5b181fc067
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m55-attrs1.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M55 Attributes 1
> +#as: -mcpu=cortex-m55+cdecp0+cdecp1+cdecp2+cdecp3+cdecp4+cdecp5+cdecp6+cdecp7
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M55"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m55-feat-fp-dp.d b/gas/testsuite/gas/arm/mcpu-cortex-m55-feat-fp-dp.d
> new file mode 100644
> index 00000000000..29e7bc9f8b6
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m55-feat-fp-dp.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M55 feat-fp.dp
> +#as: -mcpu=cortex-m55
> +#source: feat-fp.dp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M55"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m55-feat-mve-fp.d b/gas/testsuite/gas/arm/mcpu-cortex-m55-feat-mve-fp.d
> new file mode 100644
> index 00000000000..9ec48163df6
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m55-feat-mve-fp.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M55 feat-mve.fp
> +#as: -mcpu=cortex-m55
> +#source: feat-mve.fp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M55"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m7-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m7-attrs.d
> new file mode 100644
> index 00000000000..ad3faf91c1e
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m7-attrs.d
> @@ -0,0 +1,13 @@
> +#name: Cortex-M7 Attributes
> +#as: -mcpu=cortex-m7+nofp+nofp.dp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M7"
> +  Tag_CPU_arch: v7E-M
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Thumb-2
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m7-feat-fp-dp.d b/gas/testsuite/gas/arm/mcpu-cortex-m7-feat-fp-dp.d
> new file mode 100644
> index 00000000000..46045a1a3a5
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m7-feat-fp-dp.d
> @@ -0,0 +1,14 @@
> +#name: Cortex-M7 feat-fp.dp
> +#as: -mcpu=cortex-m7
> +#source: feat-fp.dp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M7"
> +  Tag_CPU_arch: v7E-M
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m85-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-m85-attrs.d
> new file mode 100644
> index 00000000000..558cacd4ba8
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m85-attrs.d
> @@ -0,0 +1,14 @@
> +#name: Cortex-M85 Attributes
> +#as: -mcpu=cortex-m85+nopacbti+nomve.fp+nomve+nofp+nodsp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M85"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_DSP_extension: Allowed
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-fp-dp.d b/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-fp-dp.d
> new file mode 100644
> index 00000000000..711bea59a91
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-fp-dp.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M85 feat-fp.dp
> +#as: -mcpu=cortex-m85
> +#source: feat-fp.dp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M85"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-mve-fp.d b/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-mve-fp.d
> new file mode 100644
> index 00000000000..6533fc66e4e
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-mve-fp.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M85 feat-mve.fp
> +#as: -mcpu=cortex-m85
> +#source: feat-mve.fp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M85"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-pacbti.d b/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-pacbti.d
> new file mode 100644
> index 00000000000..dc615de9327
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-m85-feat-pacbti.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-M85 feat-pacbti
> +#as: -mcpu=cortex-m85
> +#source: feat-pacbti.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-M85"
> +  Tag_CPU_arch: v8.1-M.mainline
> +  Tag_CPU_arch_profile: Microcontroller
> +  Tag_THUMB_ISA_use: Yes
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_DSP_extension: Allowed
> +  Tag_MVE_arch: MVE Integer and FP
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r4f-feat-fp-vfpv3.d b/gas/testsuite/gas/arm/mcpu-cortex-r4f-feat-fp-vfpv3.d
> new file mode 100644
> index 00000000000..a6361398eb9
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r4f-feat-fp-vfpv3.d
> @@ -0,0 +1,15 @@
> +#name: Cortex R4F feat-fp-vfpv3
> +#as: -mcpu=cortex-r4f
> +#source: feat-fp-vfpv3.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R4F"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3-D16
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r5-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-r5-attrs.d
> new file mode 100644
> index 00000000000..802ee1cb00a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r5-attrs.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-R5 Attributes
> +#as: -mcpu=cortex-r5+nofp+nofp.dp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r5-feat-fp-vfpv3.d b/gas/testsuite/gas/arm/mcpu-cortex-r5-feat-fp-vfpv3.d
> new file mode 100644
> index 00000000000..4ee716dfe6a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r5-feat-fp-vfpv3.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-R5 feat-fp-vfpv3
> +#as: -mcpu=cortex-r5
> +#source: feat-fp-vfpv3.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r5-feat-idiv.d b/gas/testsuite/gas/arm/mcpu-cortex-r5-feat-idiv.d
> new file mode 100644
> index 00000000000..71b2d2ee073
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r5-feat-idiv.d
> @@ -0,0 +1,16 @@
> +#name: Cortex-R5 feat-idiv
> +#as: -mcpu=cortex-r5
> +#source: feat-idiv.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R5"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r52-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-r52-attrs.d
> new file mode 100644
> index 00000000000..33422be2cce
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r52-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-R52 Attributes
> +#as: -mcpu=cortex-r52+nofp.dp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R52"
> +  Tag_CPU_arch: v8-R
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r52-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-r52-feat-crc.d
> new file mode 100644
> index 00000000000..71055cce2a2
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r52-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-R52 feat-crc
> +#as: -mcpu=cortex-r52
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R52"
> +  Tag_CPU_arch: v8-R
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r52-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-r52-feat-simd.d
> new file mode 100644
> index 00000000000..148400ef1d9
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r52-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-R52 feat-simd
> +#as: -mcpu=cortex-r52
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R52"
> +  Tag_CPU_arch: v8-R
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r52plus-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-r52plus-attrs.d
> new file mode 100644
> index 00000000000..e2eb9c35fe7
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r52plus-attrs.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-R52plus Attributes
> +#as: -mcpu=cortex-r52plus+nofp.dp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R52\+"
> +  Tag_CPU_arch: v8-R
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FPv5/FP-D16 for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-crc.d b/gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-crc.d
> new file mode 100644
> index 00000000000..2666aaf1588
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-R52plus feat-crc
> +#as: -mcpu=cortex-r52plus
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R52\+"
> +  Tag_CPU_arch: v8-R
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-simd.d b/gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-simd.d
> new file mode 100644
> index 00000000000..1af6862ca1c
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r52plus-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-R52plus feat-simd
> +#as: -mcpu=cortex-r52plus
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R52\+"
> +  Tag_CPU_arch: v8-R
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r7-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-r7-attrs.d
> new file mode 100644
> index 00000000000..b8fa7c90c1b
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r7-attrs.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-R7 Attributes
> +#as: -mcpu=cortex-r7+nofp+nofp.dp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R7"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r7-feat-idiv.d b/gas/testsuite/gas/arm/mcpu-cortex-r7-feat-idiv.d
> new file mode 100644
> index 00000000000..ac04305c3a3
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r7-feat-idiv.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-R7 feat-idiv
> +#as: -mcpu=cortex-r7
> +#source: feat-idiv.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R7"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3-D16
> +  Tag_FP_HP_extension: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r7-feat-vfpv3-d16-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-r7-feat-vfpv3-d16-fp16.d
> new file mode 100644
> index 00000000000..9361607a70c
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r7-feat-vfpv3-d16-fp16.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-R7 feat-vfpv3-d16-fp16
> +#as: -mcpu=cortex-r7
> +#source: feat-vfpv3-d16-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R7"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3-D16
> +  Tag_FP_HP_extension: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r8-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-r8-attrs.d
> new file mode 100644
> index 00000000000..2bd0bf4378d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r8-attrs.d
> @@ -0,0 +1,15 @@
> +#name: Cortex-R8 Attributes
> +#as: -mcpu=cortex-r8+nofp+nofp.dp
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R8"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r8-feat-idiv.d b/gas/testsuite/gas/arm/mcpu-cortex-r8-feat-idiv.d
> new file mode 100644
> index 00000000000..df3f2b561ef
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r8-feat-idiv.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-R8 feat-idiv
> +#as: -mcpu=cortex-r8
> +#source: feat-idiv.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R8"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3-D16
> +  Tag_FP_HP_extension: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-r8-feat-vfpv3-d16-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-r8-feat-vfpv3-d16-fp16.d
> new file mode 100644
> index 00000000000..09a254d76ca
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-r8-feat-vfpv3-d16-fp16.d
> @@ -0,0 +1,17 @@
> +#name: Cortex-R8 feat-vfpv3-d16-fp16
> +#as: -mcpu=cortex-r8
> +#source: feat-vfpv3-d16-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-R8"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Realtime
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3-D16
> +  Tag_FP_HP_extension: Allowed
> +  Tag_DIV_use: Allowed in v7-A with integer division extension
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-x1-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-x1-attrs.d
> new file mode 100644
> index 00000000000..960aed9ac94
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-x1-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-X1 Attributes
> +#as: -mcpu=cortex-x1+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-X1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-x1-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-x1-feat-dotprod.d
> new file mode 100644
> index 00000000000..e49e914757d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-x1-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-X1 feat-dotprod
> +#as: -mcpu=cortex-x1
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-X1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-x1-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-x1-feat-fp16.d
> new file mode 100644
> index 00000000000..3bdf1c2557b
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-x1-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-X1 feat-fp16
> +#as: -mcpu=cortex-x1
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-X1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-x1c-attrs.d b/gas/testsuite/gas/arm/mcpu-cortex-x1c-attrs.d
> new file mode 100644
> index 00000000000..1e9d8e147eb
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-x1c-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-X1C Attributes
> +#as: -mcpu=cortex-x1c+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-X1C"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-dotprod.d
> new file mode 100644
> index 00000000000..186b4068b0a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-X1C feat-dotprod
> +#as: -mcpu=cortex-x1c
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-X1C"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-fp16.d
> new file mode 100644
> index 00000000000..23c70c14a23
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-cortex-x1c-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Cortex-X1C feat-fp16
> +#as: -mcpu=cortex-x1c
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Cortex-X1C"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-exynos-m1-attrs.d b/gas/testsuite/gas/arm/mcpu-exynos-m1-attrs.d
> new file mode 100644
> index 00000000000..f898b63bef3
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-exynos-m1-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Exynos-M1 Attributes
> +#as: -mcpu=exynos-m1+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Samsung Exynos M1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-exynos-m1-feat-crc.d b/gas/testsuite/gas/arm/mcpu-exynos-m1-feat-crc.d
> new file mode 100644
> index 00000000000..ca932b7330a
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-exynos-m1-feat-crc.d
> @@ -0,0 +1,18 @@
> +#name: Exynos-M1 feat-crc
> +#as: -mcpu=exynos-m1
> +#source: feat-crc.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Samsung Exynos M1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-exynos-m1-feat-simd.d b/gas/testsuite/gas/arm/mcpu-exynos-m1-feat-simd.d
> new file mode 100644
> index 00000000000..0e2976aa4f9
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-exynos-m1-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: Exynos-M1 feat-simd
> +#as: -mcpu=exynos-m1
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Samsung Exynos M1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-fp-vfpv3.d b/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-fp-vfpv3.d
> new file mode 100644
> index 00000000000..2f0e17e4338
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-fp-vfpv3.d
> @@ -0,0 +1,17 @@
> +#name: Marvell-PJ4 feat-fp-vfpv3
> +#as: -mcpu=marvell-pj4
> +#source: feat-fp-vfpv3.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "MARVELL-PJ4"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-mp.d b/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-mp.d
> new file mode 100644
> index 00000000000..67bbd6c916d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-mp.d
> @@ -0,0 +1,17 @@
> +#name: Marvell-PJ4 feat-mp
> +#as: -mcpu=marvell-pj4
> +#source: feat-mp.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "MARVELL-PJ4"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-sec.d b/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-sec.d
> new file mode 100644
> index 00000000000..aa41494cf7d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-marvell-pj4-feat-sec.d
> @@ -0,0 +1,17 @@
> +#name: Marvell-PJ4 feat-sec
> +#as: -mcpu=marvell-pj4
> +#source: feat-sec.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "MARVELL-PJ4"
> +  Tag_CPU_arch: v7
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: VFPv3
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n1-attrs.d b/gas/testsuite/gas/arm/mcpu-neoverse-n1-attrs.d
> new file mode 100644
> index 00000000000..c850ee0b139
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n1-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N1 Attributes
> +#as: -mcpu=neoverse-n1+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-dotprod.d b/gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-dotprod.d
> new file mode 100644
> index 00000000000..b35d1ee4c44
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-dotprod.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N1 feat-dotprod
> +#as: -mcpu=neoverse-n1
> +#source: feat-dotprod.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-fp16.d
> new file mode 100644
> index 00000000000..36a02e8dc24
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n1-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N1 feat-fp16
> +#as: -mcpu=neoverse-n1
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n2-attrs.d b/gas/testsuite/gas/arm/mcpu-neoverse-n2-attrs.d
> new file mode 100644
> index 00000000000..9a4360e35b1
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n2-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N2 Attributes
> +#as: -mcpu=neoverse-n2+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N2"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-bf16.d b/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-bf16.d
> new file mode 100644
> index 00000000000..955130e1102
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-bf16.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N2 feat-bf16
> +#as: -mcpu=neoverse-n2
> +#source: feat-bf16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N2"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-fp16.d
> new file mode 100644
> index 00000000000..72e15f84577
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N2 feat-fp16
> +#as: -mcpu=neoverse-n2
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N2"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-i8mm.d b/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-i8mm.d
> new file mode 100644
> index 00000000000..380e4ce850d
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-n2-feat-i8mm.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-N2 feat-i8mm
> +#as: -mcpu=neoverse-n2
> +#source: feat-i8mm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse N2"
> +  Tag_CPU_arch: v9
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-v1-attrs.d b/gas/testsuite/gas/arm/mcpu-neoverse-v1-attrs.d
> new file mode 100644
> index 00000000000..9478192edfe
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-v1-attrs.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-V1 Attributes
> +#as: -mcpu=neoverse-v1+crypto
> +#source: nop-asm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse V1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-bf16.d b/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-bf16.d
> new file mode 100644
> index 00000000000..48efeeabba7
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-bf16.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-V1 feat-bf16
> +#as: -mcpu=neoverse-v1
> +#source: feat-bf16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse V1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-fp16.d b/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-fp16.d
> new file mode 100644
> index 00000000000..59040dc0660
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-fp16.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-V1 feat-fp16
> +#as: -mcpu=neoverse-v1
> +#source: feat-fp16.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse V1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-i8mm.d b/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-i8mm.d
> new file mode 100644
> index 00000000000..be46641d570
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-neoverse-v1-feat-i8mm.d
> @@ -0,0 +1,18 @@
> +#name: Neoverse-V1 feat-i8mm
> +#as: -mcpu=neoverse-v1
> +#source: feat-i8mm.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "Neoverse V1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8.1
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions
> diff --git a/gas/testsuite/gas/arm/mcpu-xgene1-feat-simd.d b/gas/testsuite/gas/arm/mcpu-xgene1-feat-simd.d
> new file mode 100644
> index 00000000000..e8ef6a837a2
> --- /dev/null
> +++ b/gas/testsuite/gas/arm/mcpu-xgene1-feat-simd.d
> @@ -0,0 +1,18 @@
> +#name: XGene1 feat-simd
> +#as: -mcpu=xgene1
> +#source: feat-simd.s
> +#readelf: -A
> +# This test is only valid on EABI based ports.
> +# target: *-*-*eabi*
> +
> +Attribute Section: aeabi
> +File Attributes
> +  Tag_CPU_name: "APM X-Gene 1"
> +  Tag_CPU_arch: v8
> +  Tag_CPU_arch_profile: Application
> +  Tag_ARM_ISA_use: Yes
> +  Tag_THUMB_ISA_use: Thumb-2
> +  Tag_FP_arch: FP for ARMv8
> +  Tag_Advanced_SIMD_arch: NEON for ARMv8
> +  Tag_MPextension_use: Allowed
> +  Tag_Virtualization_use: TrustZone and Virtualization Extensions