[PATCH] RISC-V: Support Zvabd extension instructions.
Jeffrey Law
jeffrey.law@oss.qualcomm.com
Tue Jun 2 19:04:38 GMT 2026
On 5/28/2026 4:06 AM, Jiawei wrote:
> This patch adds support for the Zvabd extension instructions:
> https://github.com/riscv/integer-vector-absolute-difference
>
> The Zvabd extension provides RISC-V vector integer absolute difference
> operations.
>
> The widening accumulate mnemonics follow the current frozen specification
> are vwabda.vv and vwabdau.vv.
>
> bfd/ChangeLog:
>
> * elfxx-riscv.c (riscv_multi_subset_supports): Add Zvabd implication
> of zve32x.
> (riscv_multi_subset_supports_ext): Add Zvabd.
>
> gas/ChangeLog:
>
> * NEWS:
> * testsuite/gas/riscv/march-help.l: Add Zvabd.
> * testsuite/gas/riscv/zvabd.d: New test.
> * testsuite/gas/riscv/zvabd.s: New test.
>
> include/ChangeLog:
>
> * opcode/riscv-opc.h (MATCH_VABS_V): New macro.
> (MASK_VABS_V): Ditto.
> (MATCH_VABD_VV): Ditto.
> (MASK_VABD_VV): Ditto.
> (MATCH_VABDU_VV): Ditto.
> (MASK_VABDU_VV): Ditto.
> (MATCH_VWABDA_VV): Ditto.
> (MASK_VWABDA_VV): Ditto.
> (MATCH_VWABDAU_VV): Ditto.
> (MASK_VWABDAU_VV): Ditto.
> * opcode/riscv.h (enum riscv_insn_class): New extension.
>
> opcodes/ChangeLog:
>
> * riscv-opc.c: New instructions.
OK. Thanks for taking care of this.
jeff
More information about the Binutils
mailing list