[PATCH v3 6/7] aarch64: Remove +mpamv2 feature option
Alice Carlotti
alice.carlotti@arm.com
Wed Jul 1 17:21:15 GMT 2026
On Tue, Jun 30, 2026 at 10:42:02AM +0100, Richard Earnshaw wrote:
> The remaining mpamv2 details only use system registers; so by our
> conventions we do not use a feature option to enable them. Remove the
> now +mpamv2 architecture option and adjust the tests accordingly.
Is "now" a typo?
...
> diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
> index 6f9f2b4c0a8..1fbf56f0926 100644
> --- a/opcodes/aarch64-sys-regs.def
> +++ b/opcodes/aarch64-sys-regs.def
> @@ -922,10 +922,10 @@
> SYSREG ("mpambwcap_el2", CPENC (3,4,10,5,6), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
> SYSREG ("mpambwidr_el1", CPENC (3,0,10,4,5), F_REG_READ, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
> SYSREG ("mpambwsm_el1", CPENC (3,0,10,5,7), 0, AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */
> - SYSREG ("mpamctl_el1", CPENC (3,0,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
> - SYSREG ("mpamctl_el12", CPENC (3,5,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
> - SYSREG ("mpamctl_el2", CPENC (3,4,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
> - SYSREG ("mpamctl_el3", CPENC (3,6,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
> + SYSREG ("mpamctl_el1", CPENC (3,0,10,5,2), 0, AARCH64_FEATURE (V9_4A)) /* MPAMv2 */
> + SYSREG ("mpamctl_el12", CPENC (3,5,10,5,2), 0, AARCH64_FEATURE (V9_4A)) /* MPAMv2 */
> + SYSREG ("mpamctl_el2", CPENC (3,4,10,5,2), 0, AARCH64_FEATURE (V9_4A)) /* MPAMv2 */
> + SYSREG ("mpamctl_el3", CPENC (3,6,10,5,2), 0, AARCH64_FEATURE (V9_4A)) /* MPAMv2 */
MPAMv2 is now optional from Armv9.3-a. This series is ok with that change.
Alice
> SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */
> SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_FEATURE (V8_2A)) /* MPAM */
> SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), 0, AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */
> --
> 2.43.0
>
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