RFC: Risc-V: Allow assembler to adjust relocs against symbols in mergeable sections

[Mark Wielaard]

Hi Jan,

On Fri, Jan 23, 2026 at 09:41:56AM +0100, Jan Beulich wrote:
> Retaining this many symbols in RISC-V is for relaxation, aiui. Relaxation
> is done on code (text) only, isn't it? In particular it isn't done on any
> debug info. Hence I'd like to re-propose by SEC_DEBUGGING suggestion,
> albeit not even limited to mergeable sections. That would likely reduce
> symbol table sizes even further.

I am certainly no expert on relaxations, but I don't think this
generalizes to all debug sections. Some debug sections describe
ranges/sizes expressed as uleb128. For this RISC-V has
R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128 relocation pairs. The size
of the uleb128 is variable. So it seems to me that relocations into
such (non-string, non-mergable) debug sections could still need a
local symbol for indexing instead of an addend/offset against a
section symbol.

Cheers,

Mark