RFC: Risc-V: Allow assembler to adjust relocs against symbols in mergeable sections

[Florian Weimer]

* Nick Clifton:

> Hi Guys,
>
>   Attached is a small patch which allows the Risc-V assembler to adjust
>   fixups against symbols in mergeable sections.  Doing this results in
>   relocations against the section's symbol instead of local symbols.
>
>   In theory this would workaround the problem reported in PR 33723 and
>   PR 33789, although I have not actually checked this.  In addition I do
>   not know if the change would break something important for Risc-V.
>   (Although the change does not introduce any new testsuite failures,
>   but I am testing in a cross-compilation environment so native tests
>   were not run).
>
>   The patch does also help to reduce the size of the symbol table in
>   object files as some local symbols can now be dropped.
>
>   I am not going to apply the patch - I will leave that up to you to
>   decide if it is suitable.  But I just thought that it might help...
>
> Cheers
>   Nick
>
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index f1a48bfc0e4..83e934c7fb4 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -5926,3 +5926,15 @@ riscv_pop_insert (void)
>  
>    pop_insert (riscv_pseudo_table);
>  }
> +
> +bool
> +riscv_fix_adjustable (fixS * fixP)
> +{
> +  /* PR33723 and 33789: Allow fixups that reference symbols in
> +     mergeable sections to be adjusted.  Disallow all others.  */
> +  if (fixP->fx_addsy != NULL
> +      && (S_GET_SEGMENT (fixP->fx_addsy)->flags & SEC_MERGE) != 0)
> +    return true;
> +
> +  return false;
> +}

Is this actually correct for RISC-V, though?  I thought that RISC-V
relocations can significantly alter section layout, which means that the
offset from the section start that the assembler sees may not match
reality after relaxation.

Thanks,
Florian