[PATCH v2] aarch64: Add FEAT_MPAMv2 system registers
Ezra.Sitorus@arm.com
Ezra.Sitorus@arm.com
Thu Jan 15 16:30:56 GMT 2026
From: Ezra Sitorus <ezra.sitorus@arm.com>
---
Changes from v1:
* Add mpamctl_el12 system register
* Add +mpamv2 feature flag and update documentation
FEAT_MPAMv2_VID will be handled in a different patch.
Regression tested on aarch64-none-linux-gnu.
Ezra
gas/config/tc-aarch64.c | 1 +
gas/doc/c-aarch64.texi | 2 ++
gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d | 3 +++
gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.l | 17 +++++++++++++++++
gas/testsuite/gas/aarch64/sysreg/mpamv2.d | 16 ++++++++++++++++
gas/testsuite/gas/aarch64/sysreg/mpamv2.s | 6 ++++++
include/opcode/aarch64.h | 2 ++
opcodes/aarch64-sys-regs.def | 4 ++++
8 files changed, 51 insertions(+)
create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d
create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.l
create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpamv2.d
create mode 100644 gas/testsuite/gas/aarch64/sysreg/mpamv2.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 7b0d5d22b0c..9c641b95fc1 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10986,6 +10986,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"f16f32mm", AARCH64_FEATURE (F16F32MM), AARCH64_FEATURES (2, SIMD, F16)},
{"f16mm", AARCH64_FEATURE (F16MM), AARCH64_FEATURES (2, SIMD, F16)},
{"sve-b16mm", AARCH64_FEATURE (SVE_B16MM), AARCH64_FEATURE (SVE)},
+ {"mpamv2", AARCH64_FEATURE (MPAMv2), AARCH64_NO_FEATURES},
{NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
};
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index c4e217f9fc5..ddb4c610922 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -261,6 +261,8 @@ automatically cause those extensions to be disabled.
@tab Enable Armv8.5-A Memory Tagging Extensions.
@item @code{mops} @tab
@tab Enable Armv8.8-A memcpy and memset acceleration instructions
+@item @code{mpamv2} @tab
+ @tab Enable MPAMv2 system registers.
@item @code{occmo} @tab
@tab Enable Outer Cacheable Cache Maintenance Operations.
@item @code{pan} @tab
diff --git a/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d b/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d
new file mode 100644
index 00000000000..af47db767c9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d
@@ -0,0 +1,3 @@
+#as: -march=armv9.4-a -menable-sysreg-checking -I$srcdir/$subdir
+#source: mpamv2.s
+#error_output: mpamv2-bad.l
diff --git a/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.l b/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.l
new file mode 100644
index 00000000000..a665bc18148
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.l
@@ -0,0 +1,17 @@
+.*: Assembler messages:
+.*: Error: selected processor does not support system register name 'mpamctl_el1'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el1'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el12'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el12'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el2'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el2'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el3'
+.*: Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'mpamctl_el3'
+.*: Info: macro invoked from here
diff --git a/gas/testsuite/gas/aarch64/sysreg/mpamv2.d b/gas/testsuite/gas/aarch64/sysreg/mpamv2.d
new file mode 100644
index 00000000000..159f6a3ec61
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpamv2.d
@@ -0,0 +1,16 @@
+#as: -menable-sysreg-checking -march=armv8-a+mpamv2 -I$srcdir/$subdir
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d518a540 msr mpamctl_el1, x0
+.*: d538a540 mrs x0, mpamctl_el1
+.*: d51da540 msr mpamctl_el12, x0
+.*: d53da540 mrs x0, mpamctl_el12
+.*: d51ca540 msr mpamctl_el2, x0
+.*: d53ca540 mrs x0, mpamctl_el2
+.*: d51ea540 msr mpamctl_el3, x0
+.*: d53ea540 mrs x0, mpamctl_el3
diff --git a/gas/testsuite/gas/aarch64/sysreg/mpamv2.s b/gas/testsuite/gas/aarch64/sysreg/mpamv2.s
new file mode 100644
index 00000000000..4fda3e915fe
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpamv2.s
@@ -0,0 +1,6 @@
+.include "sysreg-test-utils.inc"
+
+ rw_sys_reg mpamctl_el1
+ rw_sys_reg mpamctl_el12
+ rw_sys_reg mpamctl_el2
+ rw_sys_reg mpamctl_el3
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index b885a06f526..e12296fc71a 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -283,6 +283,8 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_POE2,
/* TEV instructions. */
AARCH64_FEATURE_TEV,
+ /* MPAMv2. */
+ AARCH64_FEATURE_MPAMv2,
/* Virtual features. These are used to gate instructions that are enabled
by either of two (or more) sets of command line flags. */
diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 818c2adbec7..1c57598d52d 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -922,6 +922,10 @@
SYSREG ("mpambwcap_el2", CPENC (3,4,10,5,6), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
SYSREG ("mpambwidr_el1", CPENC (3,0,10,4,5), F_REG_READ, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
SYSREG ("mpambwsm_el1", CPENC (3,0,10,5,7), 0, AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */
+ SYSREG ("mpamctl_el1", CPENC (3,0,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamctl_el12", CPENC (3,5,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamctl_el2", CPENC (3,4,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
+ SYSREG ("mpamctl_el3", CPENC (3,6,10,5,2), 0, AARCH64_FEATURE (MPAMv2))
SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), 0, AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */
--
2.43.0
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