[PATCH] aarch64: Fix TLBIP and SYSP instructions operands
richard.ball@arm.com
richard.ball@arm.com
Tue Feb 3 10:21:21 GMT 2026
From: Richard Ball <Richard.Ball@arm.com>
These instruction should accept only 3 operands, previously it
was possible to provide only 1 of the pair of registers.
---
gas/config/tc-aarch64.c | 8 -
.../gas/aarch64/illegal-sysp-tlbip-optional.d | 4 -
.../gas/aarch64/illegal-sysp-tlbip-optional.l | 2 -
.../gas/aarch64/illegal-sysp-tlbip-optional.s | 5 -
.../gas/aarch64/sysp-tlbip-optional.d | 16 --
.../gas/aarch64/sysp-tlbip-optional.s | 17 --
gas/testsuite/gas/aarch64/tlbip-invalid-2.d | 3 +
gas/testsuite/gas/aarch64/tlbip-invalid-2.l | 241 ++++++++++++++++++
gas/testsuite/gas/aarch64/tlbip-invalid-2.s | 130 ++++++++++
opcodes/aarch64-tbl.h | 4 +-
10 files changed, 376 insertions(+), 54 deletions(-)
delete mode 100644 gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.d
delete mode 100644 gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.l
delete mode 100644 gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.s
delete mode 100644 gas/testsuite/gas/aarch64/sysp-tlbip-optional.d
delete mode 100644 gas/testsuite/gas/aarch64/sysp-tlbip-optional.s
create mode 100644 gas/testsuite/gas/aarch64/tlbip-invalid-2.d
create mode 100644 gas/testsuite/gas/aarch64/tlbip-invalid-2.l
create mode 100644 gas/testsuite/gas/aarch64/tlbip-invalid-2.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index ca9387dcfd8..eeb10963440 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6407,14 +6407,6 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode,
case AARCH64_OPND_VnD1:
operand->reg.regno = default_value;
break;
- case AARCH64_OPND_PAIRREG_OR_XZR:
- if (inst.base.operands[idx - 1].reg.regno == 0x1f)
- {
- operand->reg.regno = 0x1f;
- break;
- }
- operand->reg.regno = inst.base.operands[idx - 1].reg.regno + 1;
- break;
case AARCH64_OPND_PAIRREG:
operand->reg.regno = inst.base.operands[idx - 1].reg.regno + 1;
break;
diff --git a/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.d b/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.d
deleted file mode 100644
index 0bf5af405cb..00000000000
--- a/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.d
+++ /dev/null
@@ -1,4 +0,0 @@
-#name: Illegal optional operand pair use
-#as: -mno-verbose-error
-#source: illegal-sysp-tlbip-optional.s
-#error_output: illegal-sysp-tlbip-optional.l
diff --git a/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.l b/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.l
deleted file mode 100644
index 3d87cdbac4d..00000000000
--- a/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.l
+++ /dev/null
@@ -1,2 +0,0 @@
-[^:]*: Assembler messages:
-[^:]*:5: Error: missing register at operand 2 -- `tlbip vale3nxs'
diff --git a/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.s b/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.s
deleted file mode 100644
index 538fe94b796..00000000000
--- a/gas/testsuite/gas/aarch64/illegal-sysp-tlbip-optional.s
+++ /dev/null
@@ -1,5 +0,0 @@
- .arch armv9.4-a+d128
-
- /* TLBIP operands marked with the F_HASXT don not allow xzr to be used
- as GPR arguments and so require at least one register to be specified. */
- tlbip vale3nxs
diff --git a/gas/testsuite/gas/aarch64/sysp-tlbip-optional.d b/gas/testsuite/gas/aarch64/sysp-tlbip-optional.d
deleted file mode 100644
index 0aeeb79a1e7..00000000000
--- a/gas/testsuite/gas/aarch64/sysp-tlbip-optional.d
+++ /dev/null
@@ -1,16 +0,0 @@
-#objdump: -dr
-
-.*
-
-Disassembly of section \.text:
-
-0+ <\.text>:
-[^:]*: d54e97a0 tlbip vale3nxs, x0, x1
-[^:]*: d54e97a0 tlbip vale3nxs, x0, x1
-[^:]*: d54e97a2 tlbip vale3nxs, x2, x3
-[^:]*: d54e97a2 tlbip vale3nxs, x2, x3
-[^:]*: d54e97bf tlbip vale3nxs, xzr
-[^:]*: d54e97a0 tlbip vale3nxs, x0, x1
-[^:]*: d54e97a0 tlbip vale3nxs, x0, x1
-[^:]*: d54e97a2 tlbip vale3nxs, x2, x3
-[^:]*: d54e97a2 tlbip vale3nxs, x2, x3
diff --git a/gas/testsuite/gas/aarch64/sysp-tlbip-optional.s b/gas/testsuite/gas/aarch64/sysp-tlbip-optional.s
deleted file mode 100644
index afb5bf385c2..00000000000
--- a/gas/testsuite/gas/aarch64/sysp-tlbip-optional.s
+++ /dev/null
@@ -1,17 +0,0 @@
- .arch armv9.4-a+d128
-
- /* TLBIP operands marked with the F_HASXT don not allow xzr to be used
- as GPR arguments and so require at least one register to be specified. */
- tlbip vale3nxs, x0
- tlbip vale3nxs, x0, x1
- tlbip vale3nxs, x2
- tlbip vale3nxs, x2, x3
-
- /* No such checking is carried out when the same instruction is issued
- directly via the sysp implementation defined maintenance instruction,
- such that both GRPs are optional. */
- sysp #6, C9, C7, #5
- sysp #6, C9, C7, #5, x0
- sysp #6, C9, C7, #5, x0, x1
- sysp #6, c9, c7, #5, x2
- sysp #6, c9, c7, #5, x2, x3
diff --git a/gas/testsuite/gas/aarch64/tlbip-invalid-2.d b/gas/testsuite/gas/aarch64/tlbip-invalid-2.d
new file mode 100644
index 00000000000..d6e02d938fd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tlbip-invalid-2.d
@@ -0,0 +1,3 @@
+#name: Invalid TLBIP instructions.
+#as: -march=armv9.4-a+d128
+#error_output: tlbip-invalid-2.l
diff --git a/gas/testsuite/gas/aarch64/tlbip-invalid-2.l b/gas/testsuite/gas/aarch64/tlbip-invalid-2.l
new file mode 100644
index 00000000000..0a1b51914ce
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tlbip-invalid-2.l
@@ -0,0 +1,241 @@
+.*: Assembler messages:
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaae1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaale1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaae1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaale1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaae1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaale1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaae1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaale1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaae1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaale1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaae1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaale1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaae1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaale1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaae1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaale1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaae1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaale1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaae1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaale1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaae1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvaale1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaae1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vaale1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2e1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2e1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2le1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2le1is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae2os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale2os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae2is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale2is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae2is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale2is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2e1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2e1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2e1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2e1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2le1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2le1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2le1,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2le1os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae2os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale2os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae2,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale2,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae2,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale2,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2e1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2e1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2le1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2le1isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae2osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale2osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae2isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale2isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae2isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale2isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2e1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2e1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2e1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2e1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2le1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ipas2le1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2le1nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip ripas2le1osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae2osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale2osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae2nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale2nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae2nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale2nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae3os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale3os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae3is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale3is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae3is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale3is,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae3os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale3os,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae3,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale3,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae3,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale3,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae3osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale3osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae3isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale3isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae3isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale3isnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae3osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale3osnxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvae3nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip rvale3nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vae3nxs,x0,'
+.*: Info: macro invoked from here
+.*: Error: expected an integer or zero register at operand 3 -- `tlbip vale3nxs,x0,'
+.*: Info: macro invoked from here
diff --git a/gas/testsuite/gas/aarch64/tlbip-invalid-2.s b/gas/testsuite/gas/aarch64/tlbip-invalid-2.s
new file mode 100644
index 00000000000..6d9a51609a5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tlbip-invalid-2.s
@@ -0,0 +1,130 @@
+ // Test file for AArch64 GAS -- Invalid TLB invalidation instructions.
+
+ .macro tlbip_m op expl
+ .ifc \expl, 1
+ tlbip \op, x0,
+ .else
+ tlbip \op
+ .endif
+ .endm
+
+ tlbip_m vae1os 1
+ tlbip_m vaae1os 1
+ tlbip_m vale1os 1
+ tlbip_m vaale1os 1
+ tlbip_m rvae1is 1
+ tlbip_m rvaae1is 1
+ tlbip_m rvale1is 1
+ tlbip_m rvaale1is 1
+ tlbip_m vae1is 1
+ tlbip_m vaae1is 1
+ tlbip_m vale1is 1
+ tlbip_m vaale1is 1
+ tlbip_m rvae1os 1
+ tlbip_m rvaae1os 1
+ tlbip_m rvale1os 1
+ tlbip_m rvaale1os 1
+ tlbip_m rvae1 1
+ tlbip_m rvaae1 1
+ tlbip_m rvale1 1
+ tlbip_m rvaale1 1
+ tlbip_m vae1 1
+ tlbip_m vaae1 1
+ tlbip_m vale1 1
+ tlbip_m vaale1 1
+ tlbip_m vae1osnxs 1
+ tlbip_m vaae1osnxs 1
+ tlbip_m vale1osnxs 1
+ tlbip_m vaale1osnxs 1
+ tlbip_m rvae1isnxs 1
+ tlbip_m rvaae1isnxs 1
+ tlbip_m rvale1isnxs 1
+ tlbip_m rvaale1isnxs 1
+ tlbip_m vae1isnxs 1
+ tlbip_m vaae1isnxs 1
+ tlbip_m vale1isnxs 1
+ tlbip_m vaale1isnxs 1
+ tlbip_m rvae1osnxs 1
+ tlbip_m rvaae1osnxs 1
+ tlbip_m rvale1osnxs 1
+ tlbip_m rvaale1osnxs 1
+ tlbip_m rvae1nxs 1
+ tlbip_m rvaae1nxs 1
+ tlbip_m rvale1nxs 1
+ tlbip_m rvaale1nxs 1
+ tlbip_m vae1nxs 1
+ tlbip_m vaae1nxs 1
+ tlbip_m vale1nxs 1
+ tlbip_m vaale1nxs 1
+ tlbip_m ipas2e1is 1
+ tlbip_m ripas2e1is 1
+ tlbip_m ipas2le1is 1
+ tlbip_m ripas2le1is 1
+ tlbip_m vae2os 1
+ tlbip_m vale2os 1
+ tlbip_m rvae2is 1
+ tlbip_m rvale2is 1
+ tlbip_m vae2is 1
+ tlbip_m vale2is 1
+ tlbip_m ipas2e1os 1
+ tlbip_m ipas2e1 1
+ tlbip_m ripas2e1 1
+ tlbip_m ripas2e1os 1
+ tlbip_m ipas2le1os 1
+ tlbip_m ipas2le1 1
+ tlbip_m ripas2le1 1
+ tlbip_m ripas2le1os 1
+ tlbip_m rvae2os 1
+ tlbip_m rvale2os 1
+ tlbip_m rvae2 1
+ tlbip_m rvale2 1
+ tlbip_m vae2 1
+ tlbip_m vale2 1
+ tlbip_m ipas2e1isnxs 1
+ tlbip_m ripas2e1isnxs 1
+ tlbip_m ipas2le1isnxs 1
+ tlbip_m ripas2le1isnxs 1
+ tlbip_m vae2osnxs 1
+ tlbip_m vale2osnxs 1
+ tlbip_m rvae2isnxs 1
+ tlbip_m rvale2isnxs 1
+ tlbip_m vae2isnxs 1
+ tlbip_m vale2isnxs 1
+ tlbip_m ipas2e1osnxs 1
+ tlbip_m ipas2e1nxs 1
+ tlbip_m ripas2e1nxs 1
+ tlbip_m ripas2e1osnxs 1
+ tlbip_m ipas2le1osnxs 1
+ tlbip_m ipas2le1nxs 1
+ tlbip_m ripas2le1nxs 1
+ tlbip_m ripas2le1osnxs 1
+ tlbip_m rvae2osnxs 1
+ tlbip_m rvale2osnxs 1
+ tlbip_m rvae2nxs 1
+ tlbip_m rvale2nxs 1
+ tlbip_m vae2nxs 1
+ tlbip_m vale2nxs 1
+ tlbip_m vae3os 1
+ tlbip_m vale3os 1
+ tlbip_m rvae3is 1
+ tlbip_m rvale3is 1
+ tlbip_m vae3is 1
+ tlbip_m vale3is 1
+ tlbip_m rvae3os 1
+ tlbip_m rvale3os 1
+ tlbip_m rvae3 1
+ tlbip_m rvale3 1
+ tlbip_m vae3 1
+ tlbip_m vale3 1
+ tlbip_m vae3osnxs 1
+ tlbip_m vale3osnxs 1
+ tlbip_m rvae3isnxs 1
+ tlbip_m rvale3isnxs 1
+ tlbip_m vae3isnxs 1
+ tlbip_m vale3isnxs 1
+ tlbip_m rvae3osnxs 1
+ tlbip_m rvale3osnxs 1
+ tlbip_m rvae3nxs 1
+ tlbip_m rvale3nxs 1
+ tlbip_m vae3nxs 1
+ tlbip_m vale3nxs 1
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 1bd90a93c5d..4681b03b009 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5152,12 +5152,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
GCS_INSN ("gcssttr", 0xd91f1c00, 0xfffffc00, OP2 (Rt, ADDR_SIMPLE), QL_DST_X, 0),
CORE_INSN ("gcsb", 0xd503227f, 0xffffffff, ic_system, 0, OP1 (BARRIER_GCSB), {}, F_ALIAS),
CORE_INSN ("sys", 0xd5080000, 0xfff80000, ic_system, 0, OP5 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt), QL_SYS, F_HAS_ALIAS | F_OPD4_OPT | F_DEFAULT (0x1F)),
- D128_INSN ("sysp", 0xd5480000, 0xfff80000, OP6 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt, PAIRREG_OR_XZR), QL_SYSP, F_HAS_ALIAS | F_OPD_NARROW | F_OPD4_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)),
+ D128_INSN ("sysp", 0xd5480000, 0xfff80000, OP6 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt, PAIRREG_OR_XZR), QL_SYSP, F_HAS_ALIAS | F_OPD_NARROW),
CORE_INSN ("at", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_AT, Rt), QL_SRC_X, F_ALIAS),
CORE_INSN ("dc", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_DC, Rt), QL_SRC_X, F_ALIAS),
CORE_INSN ("ic", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_IC, Rt_SYS), QL_SRC_X, F_ALIAS | F_OPD1_OPT | F_DEFAULT (0x1F)),
CORE_INSN ("tlbi",0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_TLBI, Rt_SYS), QL_SRC_X, F_ALIAS | F_OPD1_OPT | F_DEFAULT (0x1F)),
- D128_TLBID_INSN ("tlbip",0xd5480000, 0xfff80000, OP3 (SYSREG_TLBIP, Rt_SYS, PAIRREG_OR_XZR), QL_SRC_X2, F_ALIAS| F_OPD1_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)),
+ D128_TLBID_INSN ("tlbip",0xd5480000, 0xfff80000, OP3 (SYSREG_TLBIP, Rt_SYS, PAIRREG_OR_XZR), QL_SRC_X2, F_ALIAS),
WFXT_INSN ("wfet", 0xd5031000, 0xffffffe0, ic_system, OP1 (Rd), QL_I1X, F_HAS_ALIAS),
WFXT_INSN ("wfit", 0xd5031020, 0xffffffe0, ic_system, OP1 (Rd), QL_I1X, F_HAS_ALIAS),
PREDRES_INSN ("cfp", 0xd50b7380, 0xffffffe0, ic_system, OP2 (SYSREG_SR, Rt), QL_SRC_X, F_ALIAS),
--
2.34.1
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