[PATCH] x86: emit warnings to avoid potential encoding surprises
Jan Beulich
jbeulich@suse.com
Fri Aug 14 13:21:31 GMT 2026
FMA and F16C insns have direct AVX512VL counterparts. If the respective of
the two features is disabled, we'd silently fall back to the corresponding
EVEX encoding, which may not be intended by the user (their code may, for
example, not be AVX512-aware at all). See also [1], [2].
A similar situation exists for the various VNNI extensions, where silently
falling back to later introduced forms may not be intended.
A similar situation also exists for CRC32, the APX form of which requires
no 2nd ("base") feature.
Using appropriate pseudo-prefixes will silence the warnings, as would
explicitly enabling the newer ISA extensions.
Note that this in particular won't affect gcc, as that doesn't use .arch
directives on x86.
[1] https://sourceware.org/pipermail/binutils/2026-July/150330.html
[2] https://sourceware.org/pipermail/binutils/2026-July/150334.html
---
The testcase points out a possible anomaly: Despite the use of {vex}, EVEX
encodings are emitted for (originally) FMA and F16C insns when
".arch .no*" is in use.
The VNNI and CRC32 checks don't really need to live in install_template(),
yet I thought it would be better if related logic lived reasonably close
together.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4262,9 +4262,21 @@ install_template (const insn_template *t
|| maybe_cpu (t, CpuFMA) || maybe_cpu (t, CpuF16C))
&& (maybe_cpu (t, CpuAVX512F) || maybe_cpu (t, CpuAVX512VL)))
{
- if (need_evex_encoding (t)
- || (maybe_cpu (t, CpuFMA) && !cpu_arch_flags.bitfield.cpufma)
- || (maybe_cpu (t, CpuF16C) && !cpu_arch_flags.bitfield.cpuf16c))
+ bool evex = need_evex_encoding (t) || pp.encoding == encoding_egpr;
+
+ if (!evex
+ && ((maybe_cpu (t, CpuFMA) && !cpu_arch_flags.bitfield.cpufma)
+ || (maybe_cpu (t, CpuF16C) && !cpu_arch_flags.bitfield.cpuf16c)))
+ {
+ if (!cpu_arch_isa_flags.bitfield.cpuavx512vl
+ && !i.types[i.operands - 1].bitfield.zmmword)
+ as_warn(_("%s: will use AVX512VL encoding; use {evex} to silence"),
+ insn_name (t));
+
+ evex = true;
+ }
+
+ if (evex)
{
i.tm.opcode_modifier.vex = 0;
i.tm.cpu.bitfield.cpuavx512f = i.tm.cpu_any.bitfield.cpuavx512f;
@@ -4297,6 +4309,44 @@ install_template (const insn_template *t
}
}
+ /* The various VNNI extensions are somewhat special:
+ - AVX512-VNNI pre-dates AVX-VNNI,
+ - AVX-VNNI-INT{8,16} have EVEX counterparts added by AVX10-V1-AUX.
+ In each case, when the former is disabled, warn about the use of a
+ potentially unexpected encoding unless
+ - a disambiguating pseudo-prefix or operand is in use, or
+ - the newer ISA extension was explicitly enabled. */
+ if (is_cpu (t, CpuAVX_VNNI)
+ && !cpu_arch_isa_flags.bitfield.cpuavx_vnni
+ && pp.encoding != encoding_vex
+ && pp.encoding != encoding_vex3
+ && (!cpu_arch_flags.bitfield.cpuavx512_vnni
+ || !cpu_arch_flags.bitfield.cpuavx512vl))
+ as_warn (_("%s: will use AVX-VNNI encoding; use {vex} to silence"),
+ insn_name (t));
+
+ if (is_cpu (t, CpuAVX10_1_AUX)
+ && !cpu_arch_isa_flags.bitfield.cpuavx10_1_aux
+ && !need_evex_encoding (t)
+ && pp.encoding != encoding_egpr
+ && ((!cpu_arch_flags.bitfield.cpuavx_vnni_int8
+ && is_cpu (t - 1, CpuAVX_VNNI_INT8))
+ || (!cpu_arch_flags.bitfield.cpuavx_vnni_int16
+ && is_cpu (t - 1, CpuAVX_VNNI_INT16))))
+ as_warn (_("%s: will use AVX10 encoding; use {evex} to silence"),
+ insn_name (t));
+
+ /* CRC32 is also somewhat special, as its APX form is dependent upon only
+ APX_F. */
+ if (t->mnem_off == MN_crc32
+ && is_cpu (t, CpuAPX_F)
+ && !cpu_arch_isa_flags.bitfield.cpuapx_f
+ && !cpu_arch_flags.bitfield.cpusse4_2
+ && !need_evex_encoding (t)
+ && pp.encoding != encoding_egpr)
+ as_warn (_("%s: will use APX encoding; use {evex} to silence"),
+ insn_name (t));
+
/* For CCMP and CTEST the template has EVEX.SCC in base_opcode. Move it out of
there, to then adjust base_opcode to obtain its normal meaning. */
if (i.tm.opcode_modifier.operandconstraint == SCC)
--- a/gas/testsuite/gas/i386/avx-vex.l
+++ b/gas/testsuite/gas/i386/avx-vex.l
@@ -1,6 +1,12 @@
.*: Assembler messages:
+.*:8: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:9: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:10: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
.*:15: Error: .* `vpmadd52luq'
.*:21: Error: .* `vcvtneps2bf16y'
+.*:8: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:9: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:10: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
.*:15: Error: .* `vpmadd52luq'
.*:21: Error: .* `vcvtneps2bf16y'
#...
@@ -47,10 +53,13 @@
[ ]*[0-9]+[ ]+> \.arch \.noavx512vl
[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd %ymm0,%ymm1,%ymm2
+.*Warning: .*
[ ]*[0-9]+[ ]+D0
[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2
+.*Warning: .*
[ ]*[0-9]+[ ]+5020
[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2
+.*Warning: .*
[ ]*[0-9]+[ ]+90000100 *
[ ]*[0-9]+[ ]+00
[ ]*[0-9]+[ ]+> *
@@ -83,10 +92,13 @@
[ ]*[0-9]+[ ]+> \.arch \.noavx512f
[ ]*[0-9]+[ ]+> *
[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd %ymm0,%ymm1,%ymm2
+.*Warning: .*
[ ]*[0-9]+[ ]+D0
[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2
+.*Warning: .*
[ ]*[0-9]+[ ]+5020
[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2
+.*Warning: .*
[ ]*[0-9]+[ ]+90000100 *
[ ]*[0-9]+[ ]+00
[ ]*[0-9]+[ ]+> *
--- a/gas/testsuite/gas/i386/avx-vnni.d
+++ b/gas/testsuite/gas/i386/avx-vnni.d
@@ -1,5 +1,6 @@
#objdump: -dw
#name: i386 AVX VNNI insns
+#warning_output: avx-vnni.e
.*: +file format .*
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-vnni.e
@@ -0,0 +1,7 @@
+.*: Assembler messages:
+.*:20: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:21: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:26: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:27: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:32: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
+.*:33: Warning: vpdpbusd: will use AVX-VNNI encoding; .*
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -258,6 +258,7 @@ if [gas_32_check] then {
run_list_test "noavx512-1" "-almn"
run_list_test "noavx512-2" "-almn --divide"
run_dump_test "noextreg"
+ run_list_test "warn-enc" "-almn"
run_dump_test "xmmhi32"
run_dump_test "xsave"
run_dump_test "xsave-intel"
--- /dev/null
+++ b/gas/testsuite/gas/i386/warn-enc.l
@@ -0,0 +1,274 @@
+.*: Assembler messages:
+.*:7: Warning: vfmadd132ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:8: Warning: vfnmadd132pd: will use AVX512VL encoding; use \{evex\} to silence
+.*:9: Warning: vfmsub213ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:10: Warning: vfnmsub213pd: will use AVX512VL encoding; use \{evex\} to silence
+.*:11: Warning: vfmaddsub231ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:12: Warning: vfmsubadd231pd: will use AVX512VL encoding; use \{evex\} to silence
+.*:15: Warning: vcvtph2ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:16: Warning: vcvtph2ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:17: Warning: vcvtps2ph: will use AVX512VL encoding; use \{evex\} to silence
+.*:18: Warning: vcvtps2ph: will use AVX512VL encoding; use \{evex\} to silence
+.*:21: Warning: vpdpbusd: will use AVX-VNNI encoding; use \{vex\} to silence
+.*:22: Warning: vpdpwssd: will use AVX-VNNI encoding; use \{vex\} to silence
+.*:25: Warning: vpdpbusd: will use AVX-VNNI encoding; use \{vex\} to silence
+.*:26: Warning: vpdpwssd: will use AVX-VNNI encoding; use \{vex\} to silence
+.*:29: Warning: vpdpbssd: will use AVX10 encoding; use \{evex\} to silence
+.*:30: Warning: vpdpbsuds: will use AVX10 encoding; use \{evex\} to silence
+.*:31: Warning: vpdpbuud: will use AVX10 encoding; use \{evex\} to silence
+.*:34: Warning: vpdpwsud: will use AVX10 encoding; use \{evex\} to silence
+.*:35: Warning: vpdpwusds: will use AVX10 encoding; use \{evex\} to silence
+.*:36: Warning: vpdpwuud: will use AVX10 encoding; use \{evex\} to silence
+.*:7: Warning: vfmadd132ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:8: Warning: vfnmadd132pd: will use AVX512VL encoding; use \{evex\} to silence
+.*:9: Warning: vfmsub213ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:10: Warning: vfnmsub213pd: will use AVX512VL encoding; use \{evex\} to silence
+.*:11: Warning: vfmaddsub231ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:12: Warning: vfmsubadd231pd: will use AVX512VL encoding; use \{evex\} to silence
+.*:15: Warning: vcvtph2ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:16: Warning: vcvtph2ps: will use AVX512VL encoding; use \{evex\} to silence
+.*:17: Warning: vcvtps2ph: will use AVX512VL encoding; use \{evex\} to silence
+.*:18: Warning: vcvtps2ph: will use AVX512VL encoding; use \{evex\} to silence
+.*:29: Error: no VEX/XOP encoding for `vpdpbssd'
+.*:30: Error: no VEX/XOP encoding for `vpdpbsuds'
+.*:31: Error: no VEX/XOP encoding for `vpdpbuud'
+.*:34: Error: no VEX/XOP encoding for `vpdpwsud'
+.*:35: Error: no VEX/XOP encoding for `vpdpwusds'
+.*:36: Error: no VEX/XOP encoding for `vpdpwuud'
+.*:21: Error: .* for `vpdpbusd'
+.*:22: Error: .* for `vpdpwssd'
+.*:25: Error: .* for `vpdpbusd'
+.*:26: Error: .* for `vpdpwssd'
+[ ]*[0-9]+[ ]+\.text
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+_start:
+[ ]*[0-9]+[ ]+\.irp pfx, "", \{vex\}, \{evex\}
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch default; \.arch \.nofma
+[ ]*[0-9]+[ ]+\\pfx vfmadd132ps %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vfnmadd132pd %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]+\\pfx vfmsub213ps %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vfnmsub213pd %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]+\\pfx vfmaddsub231ps %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vfmsubadd231pd %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch default; \.arch \.nof16c
+[ ]*[0-9]+[ ]+\\pfx vcvtph2ps %xmm1, %xmm2
+[ ]*[0-9]+[ ]+\\pfx vcvtph2ps %xmm1, %ymm2
+[ ]*[0-9]+[ ]+\\pfx vcvtps2ph \$0, %xmm1, %xmm2
+[ ]*[0-9]+[ ]+\\pfx vcvtps2ph \$0, %ymm1, %xmm2
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch default; \.arch \.noavx512_vnni
+[ ]*[0-9]+[ ]+\\pfx vpdpbusd %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vpdpwssd %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch default; \.arch \.noavx512vl
+[ ]*[0-9]+[ ]+\\pfx vpdpbusd %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vpdpwssd %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch default; \.arch \.noavx_vnni_int8
+[ ]*[0-9]+[ ]+\\pfx vpdpbssd %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vpdpbsuds %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vpdpbuud %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch default; \.arch \.noavx_vnni_int16
+[ ]*[0-9]+[ ]+\\pfx vpdpwsud %xmm1, %xmm2, %xmm3
+[ ]*[0-9]+[ ]+\\pfx vpdpwusds %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]+\\pfx vpdpwuud %ymm1, %ymm2, %ymm3
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.endr
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.nofma
+[ ]*[0-9]+ .... 62F26D08 > vfmadd132ps %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+98D9
+[ ]*[0-9]+ .... 62F2ED28 > vfnmadd132pd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+9CD9
+[ ]*[0-9]+ .... 62F26D08 > vfmsub213ps %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+AAD9
+[ ]*[0-9]+ .... 62F2ED28 > vfnmsub213pd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+AED9
+[ ]*[0-9]+ .... 62F26D08 > vfmaddsub231ps %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+B6D9
+[ ]*[0-9]+ .... 62F2ED28 > vfmsubadd231pd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+B7D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.nof16c
+[ ]*[0-9]+ .... 62F27D08 > vcvtph2ps %xmm1,%xmm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+13D1
+[ ]*[0-9]+ .... 62F27D28 > vcvtph2ps %xmm1,%ymm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+13D1
+[ ]*[0-9]+ .... 62F37D08 > vcvtps2ph \$0,%xmm1,%xmm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+1DCA00
+[ ]*[0-9]+ .... 62F37D28 > vcvtps2ph \$0,%ymm1,%xmm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+1DCA00
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx512_vnni
+[ ]*[0-9]+ .... C4E26950 > vpdpbusd %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+ .... C4E26D52 > vpdpwssd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx512vl
+[ ]*[0-9]+ .... C4E26950 > vpdpbusd %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+ .... C4E26D52 > vpdpwssd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx_vnni_int8
+[ ]*[0-9]+ .... 62F26F08 > vpdpbssd %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+50D9
+[ ]*[0-9]+ .... 62F26E08 > vpdpbsuds %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+51D9
+[ ]*[0-9]+ .... 62F26C28 > vpdpbuud %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+50D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx_vnni_int16
+[ ]*[0-9]+ .... 62F26E08 > vpdpwsud %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D2D9
+[ ]*[0-9]+ .... 62F26D28 > vpdpwusds %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D3D9
+[ ]*[0-9]+ .... 62F26C28 > vpdpwuud %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+D2D9
+#...
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.nofma
+[ ]*[0-9]+ .... 62F26D08 > \{vex\} vfmadd132ps %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+98D9
+[ ]*[0-9]+ .... 62F2ED28 > \{vex\} vfnmadd132pd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+9CD9
+[ ]*[0-9]+ .... 62F26D08 > \{vex\} vfmsub213ps %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+AAD9
+[ ]*[0-9]+ .... 62F2ED28 > \{vex\} vfnmsub213pd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+AED9
+[ ]*[0-9]+ .... 62F26D08 > \{vex\} vfmaddsub231ps %xmm1,%xmm2,%xmm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+B6D9
+[ ]*[0-9]+ .... 62F2ED28 > \{vex\} vfmsubadd231pd %ymm1,%ymm2,%ymm3
+.*Warning: .*
+[ ]*[0-9]+[ ]+B7D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.nof16c
+[ ]*[0-9]+ .... 62F27D08 > \{vex\} vcvtph2ps %xmm1,%xmm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+13D1
+[ ]*[0-9]+ .... 62F27D28 > \{vex\} vcvtph2ps %xmm1,%ymm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+13D1
+[ ]*[0-9]+ .... 62F37D08 > \{vex\} vcvtps2ph \$0,%xmm1,%xmm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+1DCA00
+[ ]*[0-9]+ .... 62F37D28 > \{vex\} vcvtps2ph \$0,%ymm1,%xmm2
+.*Warning: .*
+[ ]*[0-9]+[ ]+1DCA00
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx512_vnni
+[ ]*[0-9]+ .... C4E26950 > \{vex\} vpdpbusd %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+ .... C4E26D52 > \{vex\} vpdpwssd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx512vl
+[ ]*[0-9]+ .... C4E26950 > \{vex\} vpdpbusd %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+ .... C4E26D52 > \{vex\} vpdpwssd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx_vnni_int8
+[ ]*[0-9]+[ ]+> \{vex\} vpdpbssd %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+> \{vex\} vpdpbsuds %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+> \{vex\} vpdpbuud %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx_vnni_int16
+[ ]*[0-9]+[ ]+> \{vex\} vpdpwsud %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+> \{vex\} vpdpwusds %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+> \{vex\} vpdpwuud %ymm1,%ymm2,%ymm3
+#...
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.nofma
+[ ]*[0-9]+ .... 62F26D08 > \{evex\} vfmadd132ps %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+98D9
+[ ]*[0-9]+ .... 62F2ED28 > \{evex\} vfnmadd132pd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+9CD9
+[ ]*[0-9]+ .... 62F26D08 > \{evex\} vfmsub213ps %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+AAD9
+[ ]*[0-9]+ .... 62F2ED28 > \{evex\} vfnmsub213pd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+AED9
+[ ]*[0-9]+ .... 62F26D08 > \{evex\} vfmaddsub231ps %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+B6D9
+[ ]*[0-9]+ .... 62F2ED28 > \{evex\} vfmsubadd231pd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+B7D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.nof16c
+[ ]*[0-9]+ .... 62F27D08 > \{evex\} vcvtph2ps %xmm1,%xmm2
+[ ]*[0-9]+[ ]+13D1
+[ ]*[0-9]+ .... 62F27D28 > \{evex\} vcvtph2ps %xmm1,%ymm2
+[ ]*[0-9]+[ ]+13D1
+[ ]*[0-9]+ .... 62F37D08 > \{evex\} vcvtps2ph \$0,%xmm1,%xmm2
+[ ]*[0-9]+[ ]+1DCA00
+[ ]*[0-9]+ .... 62F37D28 > \{evex\} vcvtps2ph \$0,%ymm1,%xmm2
+[ ]*[0-9]+[ ]+1DCA00
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx512_vnni
+[ ]*[0-9]+[ ]+> \{evex\} vpdpbusd %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+> \{evex\} vpdpwssd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx512vl
+[ ]*[0-9]+[ ]+> \{evex\} vpdpbusd %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+> \{evex\} vpdpwssd %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx_vnni_int8
+[ ]*[0-9]+ .... 62F26F08 > \{evex\} vpdpbssd %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+50D9
+[ ]*[0-9]+ .... 62F26E08 > \{evex\} vpdpbsuds %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+51D9
+[ ]*[0-9]+ .... 62F26C28 > \{evex\} vpdpbuud %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+50D9
+[ ]*[0-9]+[ ]+> *
+[ ]*[0-9]+[ ]+> \.arch default
+[ ]*[0-9]+[ ]+> \.arch \.noavx_vnni_int16
+[ ]*[0-9]+ .... 62F26E08 > \{evex\} vpdpwsud %xmm1,%xmm2,%xmm3
+[ ]*[0-9]+[ ]+D2D9
+[ ]*[0-9]+ .... 62F26D28 > \{evex\} vpdpwusds %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+D3D9
+[ ]*[0-9]+ .... 62F26C28 > \{evex\} vpdpwuud %ymm1,%ymm2,%ymm3
+[ ]*[0-9]+[ ]+D2D9
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/warn-enc.s
@@ -0,0 +1,40 @@
+ .text
+
+_start:
+ .irp pfx, "", {vex}, {evex}
+
+ .arch default; .arch .nofma
+ \pfx vfmadd132ps %xmm1, %xmm2, %xmm3
+ \pfx vfnmadd132pd %ymm1, %ymm2, %ymm3
+ \pfx vfmsub213ps %xmm1, %xmm2, %xmm3
+ \pfx vfnmsub213pd %ymm1, %ymm2, %ymm3
+ \pfx vfmaddsub231ps %xmm1, %xmm2, %xmm3
+ \pfx vfmsubadd231pd %ymm1, %ymm2, %ymm3
+
+ .arch default; .arch .nof16c
+ \pfx vcvtph2ps %xmm1, %xmm2
+ \pfx vcvtph2ps %xmm1, %ymm2
+ \pfx vcvtps2ph $0, %xmm1, %xmm2
+ \pfx vcvtps2ph $0, %ymm1, %xmm2
+
+ .arch default; .arch .noavx512_vnni
+ \pfx vpdpbusd %xmm1, %xmm2, %xmm3
+ \pfx vpdpwssd %ymm1, %ymm2, %ymm3
+
+ .arch default; .arch .noavx512vl
+ \pfx vpdpbusd %xmm1, %xmm2, %xmm3
+ \pfx vpdpwssd %ymm1, %ymm2, %ymm3
+
+ .arch default; .arch .noavx_vnni_int8
+ \pfx vpdpbssd %xmm1, %xmm2, %xmm3
+ \pfx vpdpbsuds %xmm1, %xmm2, %xmm3
+ \pfx vpdpbuud %ymm1, %ymm2, %ymm3
+
+ .arch default; .arch .noavx_vnni_int16
+ \pfx vpdpwsud %xmm1, %xmm2, %xmm3
+ \pfx vpdpwusds %ymm1, %ymm2, %ymm3
+ \pfx vpdpwuud %ymm1, %ymm2, %ymm3
+
+ .endr
+
+ ret
--- a/gas/testsuite/gas/i386/x86-64-inval-crc32.l
+++ b/gas/testsuite/gas/i386/x86-64-inval-crc32.l
@@ -28,6 +28,7 @@
.*:34: Error: .*
.*:35: Error: .*
.*:36: Error: .*
+.*:41: Warning: .*
GAS LISTING .*
@@ -72,4 +73,13 @@ GAS LISTING .*
[ ]*[0-9]+[ ]+crc32 ax, ax
[ ]*[0-9]+[ ]+crc32 rax,eax
[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+# Also check handling with SSE4.2 disabled.
+[ ]*[0-9]+[ ]*
+[ ]*[0-9]+[ ]+\.arch \.nosse4\.2
+[ ]*[0-9]+[ ]+\?* 62F47C08[ ]+crc32 %ecx, %edx
+\*\*\*\* Warning: crc32: will use APX encoding; use \{evex\} to silence
+[ ]*[0-9]+[ ]+F1CA
+[ ]*[0-9]+[ ]+\?* 62F47C08[ ]+\{evex\} crc32 %ecx, %edx
+[ ]*[0-9]+[ ]+F1CA
+[ ]*[0-9]+[ ]*
#pass
--- a/gas/testsuite/gas/i386/x86-64-inval-crc32.s
+++ b/gas/testsuite/gas/i386/x86-64-inval-crc32.s
@@ -35,4 +35,10 @@ crc32 al,al
crc32 ax, ax
crc32 rax,eax
+# Also check handling with SSE4.2 disabled.
+
+ .arch .nosse4.2
+ crc32 %ecx, %edx
+ {evex} crc32 %ecx, %edx
+
.p2align 4
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