RISC-V: V vs Z?inx

Andrew Waterman andrew@sifive.com
Mon Apr 6 21:07:41 GMT 2026


On Sat, Apr 4, 2026 at 11:36 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 03.04.2026 01:01, Andrew Waterman wrote:
> > There's a normative statement in the spec that V implies D, as you
> > pointed out.
>
> Well, really I didn't. It was only later that I actually found that
> statement (which I meant to clarify in a reply, when I saw you already
> responded).
>
> >  The comment that the vector extension is compatible with
> > Zfinx is non-normative, so although there's a contradiction, the
> > former statement wins.
>
> Interesting.
>
> > We have a plan to rectify this situation in the future: eventually
> > Zfinx will become its own base ISA, and in that new context, V will be
> > redefined to imply Zdinx instead of D.  That will happen sometime this
> > year.
>
> Is this going to be a good move? Wouldn't V better depend on F/D _or_
> Z{f,d}inx? (Which effectively it is as per what's written today, just
> not explicitly, and - as you put it - not normatively.)

To be clear, under this proposal, V would only be redefined in the
context of the new Zfinx base ISAs, RV32LIFX and RV64LIFX.  So, for
example, RV32LIFX_V would mean RV32I + Zfinx + Zdinx + V, whereas
RV32IV would continue to mean RV32IFDV.  There are no
backwards-incompatible changes.

(If you are interested, you can read the extended-base-ISAs proposal
here: https://lists.riscv.org/g/tech-unprivileged/message/1134)

>
> >  For the time being, it makes the most sense to continue
> > rejecting the V + Zfinx combination.
>
> Why would that be? Furthermore, some change is going to be needed anyway
> in binutils, as otherwise with the planned change above, V would become
> incompatible with F/D.

It's only that I don't think it's advisable for binutils to start
accepting ISA combinations that contradict normative statements in the
ISA manual.  I think we should wait until the proposal I mentioned is
accepted, at which point the vector extensions chapter will also be
revised to sanction the RV32LIFX_V.



>
> Jan
>
> > On Thu, Apr 2, 2026 at 8:39 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>
> >> While Zfinx is specifically documented as compatible with V, there doesn't
> >> look to be a way to enable both at the same time. Question is why V implies
> >> D in the first place (and similarly why Zvfh implies Zfhmin; oddly it's not
> >> Zvfhmin which does so).
> >>
> >> Below are all sorts of option combinations I tried, but none worked.
> >>
> >> Jan
> >>
> >>         .option arch, rv32ivzfinx
> >>
> >>         .option arch, rv32iv
> >>         .option arch, +zfinx
> >>
> >>         .option arch, rv32izfinx
> >>         .option arch, +v
> >>
> >>         .option arch, rv32iv
> >>         .option arch, +zfinx,+v
> >>
> >>         .option arch, rv32iv
> >>         .option arch, +v,+zfinx
> >>
> >>         .option arch, rv32i
> >>         .option arch, +zfinx
> >>         .option arch, +v
> >>
> >>         .option arch, rv32i
> >>         .option arch, +v
> >>         .option arch, +zfinx
>


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