RISC-V: V vs Z?inx
Andrew Waterman
andrew@sifive.com
Thu Apr 2 23:01:20 GMT 2026
There's a normative statement in the spec that V implies D, as you
pointed out. The comment that the vector extension is compatible with
Zfinx is non-normative, so although there's a contradiction, the
former statement wins.
We have a plan to rectify this situation in the future: eventually
Zfinx will become its own base ISA, and in that new context, V will be
redefined to imply Zdinx instead of D. That will happen sometime this
year. For the time being, it makes the most sense to continue
rejecting the V + Zfinx combination.
On Thu, Apr 2, 2026 at 8:39 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> While Zfinx is specifically documented as compatible with V, there doesn't
> look to be a way to enable both at the same time. Question is why V implies
> D in the first place (and similarly why Zvfh implies Zfhmin; oddly it's not
> Zvfhmin which does so).
>
> Below are all sorts of option combinations I tried, but none worked.
>
> Jan
>
> .option arch, rv32ivzfinx
>
> .option arch, rv32iv
> .option arch, +zfinx
>
> .option arch, rv32izfinx
> .option arch, +v
>
> .option arch, rv32iv
> .option arch, +zfinx,+v
>
> .option arch, rv32iv
> .option arch, +v,+zfinx
>
> .option arch, rv32i
> .option arch, +zfinx
> .option arch, +v
>
> .option arch, rv32i
> .option arch, +v
> .option arch, +zfinx
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