[PATCH 5/5] aarch64: GICv5 registers, hypervisor control registers
Alice Carlotti
alice.carlotti@arm.com
Tue Sep 30 18:20:53 GMT 2025
On Tue, Sep 02, 2025 at 06:55:38AM +0100, saurabh.jha@arm.com wrote:
> From: Matthieu Longo <matthieu.longo@arm.com>
>
> This patch adds support for hypervisor control registers on AArch64,
> available via the Generic Interrupt Controller v5 feature, and enabled
> via the +gcie flag.
>
Same comments as patch 3/5 apply here, but this looks good otherwise.
Alice
> - ich_apr_el2
> - ich_contextr_el2
> - ich_hfgitr_el2
> - ich_hfgrtr_el2
> - ich_hfgwtr_el2
> - ich_hppir_el2 (RO)
> - ich_ppi_activer[0,1]_el2
> - ich_ppi_dvir[0,1]_el2
> - ich_ppi_enabler[0,1]_el2
> - ich_ppi_pendr[0,1]_el2
> - ich_ppi_priorityr[0,15]_el2
> - ich_vctlr_el2
> - ich_vmcr_el2
> ---
> .../gas/aarch64/sysreg/gcie-sysregs.d | 63 +++++++++++++++++++
> .../gas/aarch64/sysreg/gcie-sysregs.s | 35 +++++++++++
> opcodes/aarch64-sys-regs.def | 31 +++++++++
> 3 files changed, 129 insertions(+)
>
> diff --git a/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.d
> index c31fe4bf168..d8865b815e8 100644
> --- a/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.d
> +++ b/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.d
> @@ -90,3 +90,66 @@ Disassembly of section \.text:
> .*: d538cdc0 mrs x0, icc_ppi_spendr0_el1
> .*: d518cde0 msr icc_ppi_spendr1_el1, x0
> .*: d538cde0 mrs x0, icc_ppi_spendr1_el1
> +.*: d51cc880 msr ich_apr_el2, x0
> +.*: d53cc880 mrs x0, ich_apr_el2
> +.*: d51ccbc0 msr ich_contextr_el2, x0
> +.*: d53ccbc0 mrs x0, ich_contextr_el2
> +.*: d51cc9e0 msr ich_hfgitr_el2, x0
> +.*: d53cc9e0 mrs x0, ich_hfgitr_el2
> +.*: d51cc980 msr ich_hfgrtr_el2, x0
> +.*: d53cc980 mrs x0, ich_hfgrtr_el2
> +.*: d51cc9c0 msr ich_hfgwtr_el2, x0
> +.*: d53cc9c0 mrs x0, ich_hfgwtr_el2
> +.*: d53cc8a0 mrs x0, ich_hppir_el2
> +.*: d51ccac0 msr ich_ppi_activer0_el2, x0
> +.*: d53ccac0 mrs x0, ich_ppi_activer0_el2
> +.*: d51ccae0 msr ich_ppi_activer1_el2, x0
> +.*: d53ccae0 mrs x0, ich_ppi_activer1_el2
> +.*: d51cca00 msr ich_ppi_dvir0_el2, x0
> +.*: d53cca00 mrs x0, ich_ppi_dvir0_el2
> +.*: d51cca20 msr ich_ppi_dvir1_el2, x0
> +.*: d53cca20 mrs x0, ich_ppi_dvir1_el2
> +.*: d51cca40 msr ich_ppi_enabler0_el2, x0
> +.*: d53cca40 mrs x0, ich_ppi_enabler0_el2
> +.*: d51cca60 msr ich_ppi_enabler1_el2, x0
> +.*: d53cca60 mrs x0, ich_ppi_enabler1_el2
> +.*: d51cca80 msr ich_ppi_pendr0_el2, x0
> +.*: d53cca80 mrs x0, ich_ppi_pendr0_el2
> +.*: d51ccaa0 msr ich_ppi_pendr1_el2, x0
> +.*: d53ccaa0 mrs x0, ich_ppi_pendr1_el2
> +.*: d51cce00 msr ich_ppi_priorityr0_el2, x0
> +.*: d53cce00 mrs x0, ich_ppi_priorityr0_el2
> +.*: d51cce20 msr ich_ppi_priorityr1_el2, x0
> +.*: d53cce20 mrs x0, ich_ppi_priorityr1_el2
> +.*: d51cce40 msr ich_ppi_priorityr2_el2, x0
> +.*: d53cce40 mrs x0, ich_ppi_priorityr2_el2
> +.*: d51cce60 msr ich_ppi_priorityr3_el2, x0
> +.*: d53cce60 mrs x0, ich_ppi_priorityr3_el2
> +.*: d51cce80 msr ich_ppi_priorityr4_el2, x0
> +.*: d53cce80 mrs x0, ich_ppi_priorityr4_el2
> +.*: d51ccea0 msr ich_ppi_priorityr5_el2, x0
> +.*: d53ccea0 mrs x0, ich_ppi_priorityr5_el2
> +.*: d51ccec0 msr ich_ppi_priorityr6_el2, x0
> +.*: d53ccec0 mrs x0, ich_ppi_priorityr6_el2
> +.*: d51ccee0 msr ich_ppi_priorityr7_el2, x0
> +.*: d53ccee0 mrs x0, ich_ppi_priorityr7_el2
> +.*: d51ccf00 msr ich_ppi_priorityr8_el2, x0
> +.*: d53ccf00 mrs x0, ich_ppi_priorityr8_el2
> +.*: d51ccf20 msr ich_ppi_priorityr9_el2, x0
> +.*: d53ccf20 mrs x0, ich_ppi_priorityr9_el2
> +.*: d51ccf40 msr ich_ppi_priorityr10_el2, x0
> +.*: d53ccf40 mrs x0, ich_ppi_priorityr10_el2
> +.*: d51ccf60 msr ich_ppi_priorityr11_el2, x0
> +.*: d53ccf60 mrs x0, ich_ppi_priorityr11_el2
> +.*: d51ccf80 msr ich_ppi_priorityr12_el2, x0
> +.*: d53ccf80 mrs x0, ich_ppi_priorityr12_el2
> +.*: d51ccfa0 msr ich_ppi_priorityr13_el2, x0
> +.*: d53ccfa0 mrs x0, ich_ppi_priorityr13_el2
> +.*: d51ccfc0 msr ich_ppi_priorityr14_el2, x0
> +.*: d53ccfc0 mrs x0, ich_ppi_priorityr14_el2
> +.*: d51ccfe0 msr ich_ppi_priorityr15_el2, x0
> +.*: d53ccfe0 mrs x0, ich_ppi_priorityr15_el2
> +.*: d51ccb80 msr ich_vctlr_el2, x0
> +.*: d53ccb80 mrs x0, ich_vctlr_el2
> +.*: d51ccbe0 msr ich_vmcr_el2, x0
> +.*: d53ccbe0 mrs x0, ich_vmcr_el2
> diff --git a/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.s
> index 5434525dcc3..26f961660ed 100644
> --- a/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.s
> +++ b/gas/testsuite/gas/aarch64/sysreg/gcie-sysregs.s
> @@ -54,3 +54,38 @@
> rw_sys_reg sys_reg=icc_ppi_sactiver1_el1
> rw_sys_reg sys_reg=icc_ppi_spendr0_el1
> rw_sys_reg sys_reg=icc_ppi_spendr1_el1
> +
> + /* Hypervisor control registers. */
> +
> + rw_sys_reg sys_reg=ich_apr_el2
> + rw_sys_reg sys_reg=ich_contextr_el2
> + rw_sys_reg sys_reg=ich_hfgitr_el2
> + rw_sys_reg sys_reg=ich_hfgrtr_el2
> + rw_sys_reg sys_reg=ich_hfgwtr_el2
> + rw_sys_reg sys_reg=ich_hppir_el2 w=0
> + rw_sys_reg sys_reg=ich_ppi_activer0_el2
> + rw_sys_reg sys_reg=ich_ppi_activer1_el2
> + rw_sys_reg sys_reg=ich_ppi_dvir0_el2
> + rw_sys_reg sys_reg=ich_ppi_dvir1_el2
> + rw_sys_reg sys_reg=ich_ppi_enabler0_el2
> + rw_sys_reg sys_reg=ich_ppi_enabler1_el2
> + rw_sys_reg sys_reg=ich_ppi_pendr0_el2
> + rw_sys_reg sys_reg=ich_ppi_pendr1_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr0_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr1_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr2_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr3_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr4_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr5_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr6_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr7_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr8_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr9_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr10_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr11_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr12_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr13_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr14_el2
> + rw_sys_reg sys_reg=ich_ppi_priorityr15_el2
> + rw_sys_reg sys_reg=ich_vctlr_el2
> + rw_sys_reg sys_reg=ich_vmcr_el2
> diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
> index d80b787f081..98ae52e5b64 100644
> --- a/opcodes/aarch64-sys-regs.def
> +++ b/opcodes/aarch64-sys-regs.def
> @@ -540,9 +540,15 @@
> SYSREG ("ich_ap1r1_el2", CPENC (3,4,12,9,1), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_ap1r2_el2", CPENC (3,4,12,9,2), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_ap1r3_el2", CPENC (3,4,12,9,3), 0, AARCH64_NO_FEATURES)
> + SYSREG ("ich_apr_el2", CPENC (3,4,12,8,4), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_contextr_el2", CPENC (3,4,12,11,6), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> SYSREG ("ich_eisr_el2", CPENC (3,4,12,11,3), F_REG_READ, AARCH64_NO_FEATURES)
> SYSREG ("ich_elrsr_el2", CPENC (3,4,12,11,5), F_REG_READ, AARCH64_NO_FEATURES)
> SYSREG ("ich_hcr_el2", CPENC (3,4,12,11,0), 0, AARCH64_NO_FEATURES)
> + SYSREG ("ich_hfgitr_el2", CPENC (3,4,12,9,7), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_hfgrtr_el2", CPENC (3,4,12,9,4), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_hfgwtr_el2", CPENC (3,4,12,9,6), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_hppir_el2", CPENC (3,4,12,8,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (GCIE))
> SYSREG ("ich_lr0_el2", CPENC (3,4,12,12,0), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_lr10_el2", CPENC (3,4,12,13,2), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_lr11_el2", CPENC (3,4,12,13,3), 0, AARCH64_NO_FEATURES)
> @@ -560,6 +566,31 @@
> SYSREG ("ich_lr8_el2", CPENC (3,4,12,13,0), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_lr9_el2", CPENC (3,4,12,13,1), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_misr_el2", CPENC (3,4,12,11,2), F_REG_READ, AARCH64_NO_FEATURES)
> + SYSREG ("ich_ppi_activer0_el2", CPENC (3,4,12,10,6), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_activer1_el2", CPENC (3,4,12,10,7), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_dvir0_el2", CPENC (3,4,12,10,0), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_dvir1_el2", CPENC (3,4,12,10,1), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_enabler0_el2", CPENC (3,4,12,10,2), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_enabler1_el2", CPENC (3,4,12,10,3), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_pendr0_el2", CPENC (3,4,12,10,4), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_pendr1_el2", CPENC (3,4,12,10,5), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr0_el2", CPENC (3,4,12,14,0), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr1_el2", CPENC (3,4,12,14,1), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr2_el2", CPENC (3,4,12,14,2), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr3_el2", CPENC (3,4,12,14,3), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr4_el2", CPENC (3,4,12,14,4), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr5_el2", CPENC (3,4,12,14,5), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr6_el2", CPENC (3,4,12,14,6), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr7_el2", CPENC (3,4,12,14,7), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr8_el2", CPENC (3,4,12,15,0), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr9_el2", CPENC (3,4,12,15,1), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr10_el2", CPENC (3,4,12,15,2), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr11_el2", CPENC (3,4,12,15,3), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr12_el2", CPENC (3,4,12,15,4), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr13_el2", CPENC (3,4,12,15,5), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr14_el2", CPENC (3,4,12,15,6), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_ppi_priorityr15_el2", CPENC (3,4,12,15,7), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> + SYSREG ("ich_vctlr_el2", CPENC (3,4,12,11,4), F_ARCHEXT, AARCH64_FEATURE (GCIE))
> SYSREG ("ich_vmcr_el2", CPENC (3,4,12,11,7), 0, AARCH64_NO_FEATURES)
> SYSREG ("ich_vtr_el2", CPENC (3,4,12,11,1), F_REG_READ, AARCH64_NO_FEATURES)
> SYSREG ("id_aa64afr0_el1", CPENC (3,0,0,5,4), F_REG_READ, AARCH64_NO_FEATURES)
> --
> 2.34.1
>
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