[PATCH] RISC-V: Add support for sdtrig and ssstrict extensions.

[Dongyan Chen]

This implements the sdtrig extension, version 1.0[1] and ssstrict
extension, version 1.0[2].

[1]https://github.com/riscv/riscv-debug-spec/blob/main/Sdtrig.adoc
[2]https://github.com/riscv/riscv-profiles/issues/173

bfd/ChangeLog:

	* elfxx-riscv.c: Handle sdtrig and ssstrict.

gas/ChangeLog:

	* NEWS: Updated.
	* testsuite/gas/riscv/march-help.l: Ditto.

---
 bfd/elfxx-riscv.c                    | 5 +++++
 gas/NEWS                             | 2 ++
 gas/testsuite/gas/riscv/march-help.l | 2 ++
 3 files changed, 9 insertions(+)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 9163712967d..085d77923a0 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1303,6 +1303,8 @@ static const struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zvksc", "+zvks,+zvbc", check_implicit_always},
   {"zvks", "+zvksed,+zvksh,+zvkb,+zvkt", check_implicit_always},

+  {"sdtrig", "+zicsr", check_implicit_always},
+
   {"smaia", "+ssaia", check_implicit_always},
   {"smcdeleg", "+ssccfg", check_implicit_always},
   {"smcsrind", "+sscsrind", check_implicit_always},
@@ -1322,6 +1324,7 @@ static const struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"sscounterenw", "+zicsr", check_implicit_always},
   {"ssctr", "+zicsr", check_implicit_always},
   {"ssstateen", "+zicsr", check_implicit_always},
+  {"ssstrict", "+zicsr", check_implicit_always},
   {"sstc", "+zicsr", check_implicit_always},
   {"sstvala", "+zicsr", check_implicit_always},
   {"sstvecd", "+zicsr", check_implicit_always},
@@ -1552,6 +1555,7 @@ static const struct riscv_supported_ext riscv_supported_std_z_ext[] =

 static const struct riscv_supported_ext riscv_supported_std_s_ext[] =
 {
+  {"sdtrig",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sha",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"shcounterenw",	ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"shgatpa",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
@@ -1576,6 +1580,7 @@ static const struct riscv_supported_ext riscv_supported_std_s_ext[] =
   {"sscounterenw",	ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssctr",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"ssstrict",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sstc",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sstvala",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sstvecd",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
diff --git a/gas/NEWS b/gas/NEWS
index 5908f769fdd..0c223005bab 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -5,6 +5,8 @@

 * NaCl target support is removed.

+* Add support for RISC-V sdtrig and ssstrict extensions, v1.0.
+
 Changes in 2.45:

 * Add support to generate SFrame stack trace information (.sframe)
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index 709ccff2b7f..0ce2f896735 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -110,6 +110,7 @@ All available -march extensions for RISC-V:
 	zcmp                                    1.0
 	zcmt                                    1.0
 	zclsd                                   1.0
+	sdtrig                                  1.0
 	sha                                     1.0
 	shcounterenw                            1.0
 	shgatpa                                 1.0
@@ -134,6 +135,7 @@ All available -march extensions for RISC-V:
 	sscounterenw                            1.0
 	ssctr                                   1.0
 	ssstateen                               1.0
+	ssstrict                                1.0
 	sstc                                    1.0
 	sstvala                                 1.0
 	sstvecd                                 1.0
--
2.43.0