[PATCH v2 15/15] MIPS: Extend trap macros to handle immediate zero

Jovan Dmitrovic jovan.dmitrovic@htecgroup.com
Wed Oct 29 14:09:48 GMT 2025


From: Faraz Shahbazker <fshahbazker@wavecomp.com>

Immediate zero can be replaced by the zero register for ISAs
which don't have a trap-on-compare-immediate instruction. Extend
the macro expansion of trap-on-compare instructions to handle 0
without needing intermediate $AT.

gas/
	* config/tc-mips.c (macro): Extend trap macros to short
	circuit immediate zero with register $0.
	* testsuite/gas/mips/micromipsr6@micromips-insn32.d: Update
	reference output.
	* testsuite/gas/mips/micromipsr6@micromips.d: Likewise.

Signed-off-by: Jovan Dmitrović <jovan.dmitrovic@htecgroup.com>

---
 gas/config/tc-mips.c                          | 11 +++++++---
 .../gas/mips/micromipsr6@micromips-insn32.d   | 18 ++++++-----------
 .../gas/mips/micromipsr6@micromips.d          | 20 +++++++------------
 3 files changed, 21 insertions(+), 28 deletions(-)

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index daba5051ef4..3524d135a12 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -14162,9 +14162,14 @@ macro (struct mips_cl_insn *ip, char *str)
     case M_TNE_I:
       s = "tne";
     trap:
-      used_at = 1;
-      load_register (AT, &imm_expr, GPR_SIZE == 64);
-      macro_build (NULL, s, "s,t", op[0], AT);
+      if (imm_expr.X_add_number == 0)
+	macro_build (NULL, s, "s,t", op[0], 0);
+      else
+	{
+	  used_at = 1;
+	  load_register (AT, &imm_expr, GPR_SIZE == 64);
+	  macro_build (NULL, s, "s,t", op[0], AT);
+	}
       break;
 
     case M_TRUNCWS:
diff --git a/gas/testsuite/gas/mips/micromipsr6@micromips-insn32.d b/gas/testsuite/gas/mips/micromipsr6@micromips-insn32.d
index f3f6bb50698..c56ca8728c7 100644
--- a/gas/testsuite/gas/mips/micromipsr6@micromips-insn32.d
+++ b/gas/testsuite/gas/mips/micromipsr6@micromips-insn32.d
@@ -2262,8 +2262,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 003c 	teq	v0,v1
 [ 0-9a-f]+:	0062 103c 	teq	v0,v1,0x1
 [ 0-9a-f]+:	0062 f03c 	teq	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 003c 	teq	v0,at
+[ 0-9a-f]+:	0002 003c 	teq	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 003c 	teq	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2275,8 +2274,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 023c 	tge	v0,v1
 [ 0-9a-f]+:	0062 123c 	tge	v0,v1,0x1
 [ 0-9a-f]+:	0062 f23c 	tge	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 023c 	tge	v0,at
+[ 0-9a-f]+:	0002 023c 	tge	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 023c 	tge	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2288,8 +2286,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 043c 	tgeu	v0,v1
 [ 0-9a-f]+:	0062 143c 	tgeu	v0,v1,0x1
 [ 0-9a-f]+:	0062 f43c 	tgeu	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 043c 	tgeu	v0,at
+[ 0-9a-f]+:	0002 043c 	tgeu	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 043c 	tgeu	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2305,8 +2302,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 083c 	tlt	v0,v1
 [ 0-9a-f]+:	0062 183c 	tlt	v0,v1,0x1
 [ 0-9a-f]+:	0062 f83c 	tlt	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 083c 	tlt	v0,at
+[ 0-9a-f]+:	0002 083c 	tlt	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 083c 	tlt	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2318,8 +2314,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 0a3c 	tltu	v0,v1
 [ 0-9a-f]+:	0062 1a3c 	tltu	v0,v1,0x1
 [ 0-9a-f]+:	0062 fa3c 	tltu	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 0a3c 	tltu	v0,at
+[ 0-9a-f]+:	0002 0a3c 	tltu	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 0a3c 	tltu	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2335,8 +2330,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 0c3c 	tne	v0,v1
 [ 0-9a-f]+:	0062 1c3c 	tne	v0,v1,0x1
 [ 0-9a-f]+:	0062 fc3c 	tne	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 0c3c 	tne	v0,at
+[ 0-9a-f]+:	0002 0c3c 	tne	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 0c3c 	tne	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
diff --git a/gas/testsuite/gas/mips/micromipsr6@micromips.d b/gas/testsuite/gas/mips/micromipsr6@micromips.d
index 978cf712a5c..15eef1ae1b4 100644
--- a/gas/testsuite/gas/mips/micromipsr6@micromips.d
+++ b/gas/testsuite/gas/mips/micromipsr6@micromips.d
@@ -2276,8 +2276,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 003c 	teq	v0,v1
 [ 0-9a-f]+:	0062 103c 	teq	v0,v1,0x1
 [ 0-9a-f]+:	0062 f03c 	teq	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 003c 	teq	v0,at
+[ 0-9a-f]+:	0002 003c 	teq	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 003c 	teq	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2289,8 +2288,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 023c 	tge	v0,v1
 [ 0-9a-f]+:	0062 123c 	tge	v0,v1,0x1
 [ 0-9a-f]+:	0062 f23c 	tge	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 023c 	tge	v0,at
+[ 0-9a-f]+:	0002 023c 	tge	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 023c 	tge	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2302,8 +2300,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 043c 	tgeu	v0,v1
 [ 0-9a-f]+:	0062 143c 	tgeu	v0,v1,0x1
 [ 0-9a-f]+:	0062 f43c 	tgeu	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 043c 	tgeu	v0,at
+[ 0-9a-f]+:	0002 043c 	tgeu	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 043c 	tgeu	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2319,8 +2316,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 083c 	tlt	v0,v1
 [ 0-9a-f]+:	0062 183c 	tlt	v0,v1,0x1
 [ 0-9a-f]+:	0062 f83c 	tlt	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 083c 	tlt	v0,at
+[ 0-9a-f]+:	0002 083c 	tlt	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 083c 	tlt	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2332,8 +2328,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 0a3c 	tltu	v0,v1
 [ 0-9a-f]+:	0062 1a3c 	tltu	v0,v1,0x1
 [ 0-9a-f]+:	0062 fa3c 	tltu	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 0a3c 	tltu	v0,at
+[ 0-9a-f]+:	0002 0a3c 	tltu	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 0a3c 	tltu	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -2349,8 +2344,7 @@ Disassembly of section .text:
 [ 0-9a-f]+:	0062 0c3c 	tne	v0,v1
 [ 0-9a-f]+:	0062 1c3c 	tne	v0,v1,0x1
 [ 0-9a-f]+:	0062 fc3c 	tne	v0,v1,0xf
-[ 0-9a-f]+:	3020 0000 	li	at,0
-[ 0-9a-f]+:	0022 0c3c 	tne	v0,at
+[ 0-9a-f]+:	0002 0c3c 	tne	v0,zero
 [ 0-9a-f]+:	3020 8000 	li	at,-32768
 [ 0-9a-f]+:	0022 0c3c 	tne	v0,at
 [ 0-9a-f]+:	3020 7fff 	li	at,32767
@@ -4511,4 +4505,4 @@ Disassembly of section .text:
 [ 0-9a-f]+:	47ef      	movep	a0,a3,s4,s3
 [ 0-9a-f]+:	47ff      	movep	a0,a3,s4,s4
 [ 0-9a-f]+:	0c00      	nop
-[ 0-9a-f]+:	0000 0000 	nop
+	\.\.\.
-- 
2.34.1


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