[PATCH v2 0/9] aarch64: Add remaining SME2.2 instructions

[Alice Carlotti]

Changes v1->v2:
Changes to patch 1/9 only (apart from trivial changes when rebasing the rest of
the series).
- Use bitfields in aarch64_field, and add an explicit extra field is_const.
- Use macros to initialise aarch64_field variables.
- Add a more illustrative comment to aarch64_field.

Richard, is this version now ok?

Thanks,
Alice

---

This patch series is in three parts.

Patches 1-4 extend aarch64_field to include bit fields that take a constant
value instead of referencing part of the opcode, and add a few uses of this
mechanism.  This approach has the potential to simplify and deduplicate a lot
of the code for handling register name constraints and encoding patterns,
beyond the examples present in this patch series.

Patch 5 removes an outdated (and now invalid) constraint.

Patches 6-9 add support for the remaining 2024 SME extensions that were
accidentally omitted from the previous Binutils release.  These missing
extensions are FEAT_SME_TMOP, FEAT_SME_MOP4, FEAT_SSVE_FEXPA and
FEAT_SSVE_BITPERM.  The new instructions have some complicated encoding
patterns and constraints for register names, which is the motivation for
including the first four patches in this series.