[PATCH 0/9] aarch64: Add remaining SME2.2 instructions
Alice Carlotti
alice.carlotti@arm.com
Wed Oct 8 00:37:41 GMT 2025
This patch series is in three parts.
Patches 1-4 extend aarch64_field to include bit fields that take a constant
value instead of referencing part of the opcode, and add a few uses of this
mechanism. This approach has the potential to simplify and deduplicate a lot
of the code for handling register name constraints and encoding patterns,
beyond the examples present in this patch series.
Patch 5 removes an outdated (and now invalid) constraint.
Patches 6-9 add support for the remaining 2024 SME extensions that were
accidentally omitted from the previous Binutils release. These missing
extensions are FEAT_SME_TMOP, FEAT_SME_MOP4, FEAT_SSVE_FEXPA and
FEAT_SSVE_BITPERM. The new instructions have some complicated encoding
patterns and constraints for register names, which is the motivation for
including the first four patches in this series.
I plan to commit this on Thursday if there are no issues raised before then.
Alice
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