[PATCH v3] Add AMD znver6 processor support

[Jan Beulich]

On 14.11.2025 16:34, Umesh Kalvakuntla wrote:
>> Are you sure about the AVX512VL part? I.e. do the new insns really not act like
>> all others wrt that sub-feature?
> I'll also go through that part again.
> 
>>
>> I'll take a closer look next week. For the future, however, please submit new
>> patch versions as new threads, properly tagged with the version, rather than as
>> reply to an earlier thread.
> Posting it in new thread with a minor format fix in
> gas/testsuite/gas/i386/x86-64-arch-6.s and 
> gas/testsuite/gas/i386/arch-16.s
> 
> Thank you,
> Umesh
> 
>>
>> Jan

Hmm, that's still kind of a reply. The patch only starts below from here.

> commit e458fa3fdb37c9bf56c38a79bf4865009cc6c750
> Author: Umesh Kalvakuntla <umesh.kalvakuntla@amd.com>
> Date:   Fri Nov 14 19:27:21 2025 +0530
> 
>     Add AMD znver6 processor support
>[...]
>     Please find the ISA descriptions for AVX512_BMM instructions below.
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/arch-16-znver6.d
> @@ -0,0 +1,15 @@
> +#source: arch-16.s
> +#as: -march=znver6
> +#objdump: -dw
> +#name: i386 arch 16 (znver6)
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +[0-9a-f]+ <\.text>:
> +[\s]*[a-f0-9]+:[\s]*62 f6 6c 28 80 d9[\s]*vbmacor16x16x16 %ymm1,%ymm2,%ymm3
> +[\s]*[a-f0-9]+:[\s]*c4 e2 7a b1 0a[\s]*vbcstnebf162ps \(%edx\),%xmm1
> +[\s]*[a-f0-9]+:[\s]*c4 e2 f1 b5 d1[\s]*\{vex\} vpmadd52huq %xmm1,%xmm1,%xmm2
> +[\s]*[a-f0-9]+:[\s]*c4 e2 6f 50 d9[\s]*vpdpbssd %ymm1,%ymm2,%ymm3
> +[\s]*[a-f0-9]+:[\s]*62 f5 6c 48 58 d9[\s]*vaddph %zmm1,%zmm2,%zmm3

Still no #pass here.

> --- /dev/null
> +++ b/gas/testsuite/gas/i386/arch-16.d
> @@ -0,0 +1,13 @@
> +#objdump: -dw
> +#name: i386 arch 6
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +[0-9a-f]+ <\.text>:
> +[\s]*[a-f0-9]+:[\s]*62 f6 6c 28 80 d9[\s]*vbmacor16x16x16 %ymm1,%ymm2,%ymm3
> +[\s]*[a-f0-9]+:[\s]*c4 e2 7a b1 0a[\s]*vbcstnebf162ps \(%edx\),%xmm1
> +[\s]*[a-f0-9]+:[\s]*62 f2 f5 08 b5 d1[\s]*vpmadd52huq %xmm1,%xmm1,%xmm2
> +[\s]*[a-f0-9]+:[\s]*c4 e2 6f 50 d9[\s]*vpdpbssd %ymm1,%ymm2,%ymm3
> +[\s]*[a-f0-9]+:[\s]*62 f5 6c 48 58 d9[\s]*vaddph %zmm1,%zmm2,%zmm3
> \ No newline at end of file

Still not even a newline here.

(Both issues recur further down.)

> --- a/opcodes/i386-dis-evex-w.h
> +++ b/opcodes/i386-dis-evex-w.h
> @@ -524,3 +524,13 @@
>    {
>      { "vmovw",	{ EXwS, XMScalar }, 0 },
>    },
> +  /* EVEX_W_MAP6_80 */
> +  {
> +    { "vbmacor16x16x16", { XM, Vex, EXx }, NO_PREFIX },
> +    { "vbmacxor16x16x16", { XM, Vex, EXx }, NO_PREFIX },
> +  },

Still not going through evex_len_table[].

> @@ -208,6 +210,8 @@ static const dependency isa_dependencies[] =
>      "AVX512BW" },
>    { "AVX512_VP2INTERSECT",
>      "AVX512F" },
> +  { "AVX512_BMM",
> +    "AVX512VL|AVX512BW" },

Still having the VL dependency here.

Jan