[PATCH v3] gdb/record: Support fense.tso, zicond, bitmanip, sinval and zihintntl in RISC-V

[Nelson Chu]

On Fri, Nov 7, 2025 at 6:49 PM Timur Golubovich <timurgol007@gmail.com>
wrote:

> Hi!
> I tried to avoid adding new MATCH and MASK macros and now patch looks
> like this (in total 25 new lines):
>
> > +#define MATCH_BCLRI_RV32 0x48001013
> > +#define MASK_BCLRI_RV32 0xfe00707f
> > +#define MATCH_BEXTI_RV32 0x48005013
> > +#define MASK_BEXTI_RV32 0xfe00707f
> > +#define MATCH_BINVI_RV32 0x68001013
> > +#define MASK_BINVI_RV32 0xfe00707f
> > +#define MATCH_BSETI_RV32 0x28001013
> > +#define MASK_BSETI_RV32 0xfe00707f
> > +#define MATCH_RORI_RV32 0x60005013
> > +#define MASK_RORI_RV32 0xfe00707f
> > DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW)
> > DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW)
> > +DECLARE_INSN(fence_tso, MATCH_FENCE_TSO, MASK_FENCE_TSO)q
> > +DECLARE_INSN(rev8, MATCH_GREVI|MATCH_SHAMT_REV8_64,
> MASK_GREVI|MASK_SHAMT)
> > +DECLARE_INSN(zext_h, MATCH_PACKW, MASK_PACKW|MASK_RS2)
> > +DECLARE_INSN(zip, MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT)
> > +DECLARE_INSN(unzip, MATCH_UNSHFLI|MATCH_SHAMT_ZIP_32,
> MASK_UNSHFLI|MASK_SHAMT)
> > +DECLARE_INSN(orc_b, MATCH_GORCI|MATCH_SHAMT_ORC_B, MASK_GORCI |
> MASK_SHAMT)
> > +DECLARE_INSN(brev8, MATCH_GREVI|MATCH_SHAMT_BREV8,
> MASK_GREVI|MASK_SHAMT)
> > +DECLARE_INSN(rev8_rv32, MATCH_GREVI|MATCH_SHAMT_REV8_32,
> MASK_GREVI|MASK_SHAMT)
> > +DECLARE_INSN(rori_rv32, MATCH_RORI_RV32, MASK_RORI_RV32)
> > +DECLARE_INSN(zext_h_rv32, MATCH_PACK, MASK_PACK|MASK_RS2)
> > +DECLARE_INSN(bclri_rv32, MATCH_BCLRI_RV32, MASK_BCLRI_RV32)
> > +DECLARE_INSN(bexti_rv32, MATCH_BEXTI_RV32, MASK_BEXTI_RV32)
> > +DECLARE_INSN(binvi_rv32, MATCH_BINVI_RV32, MASK_BINVI_RV32)
> > +DECLARE_INSN(bseti_rv32, MATCH_BSETI_RV32, MASK_BSETI_RV32)
> > +DECLARE_INSN(c_sext_w, MATCH_C_ADDIW, MASK_C_ADDIW|MASK_RVC_IMM)
>
> but unfortunately I came across a mistake that now it doesn't compile,
> because such macroses:
>

Oops...


> #define MASK_RS1 (OP_MASK_RS1 << OP_SH_RS1)
> #define MASK_RS2 (OP_MASK_RS2 << OP_SH_RS2)
> #define MASK_RD (OP_MASK_RD << OP_SH_RD)
> #define MASK_CRS2 (OP_MASK_CRS2 << OP_SH_CRS2)
> #define MASK_CRS2S (OP_MASK_CRS2S << OP_SH_CRS2S)
> #define MASK_IMM ENCODE_ITYPE_IMM (-1U)
> #define MASK_RVC_IMM ENCODE_CITYPE_IMM (-1U)
> #define MASK_UIMM ENCODE_UTYPE_IMM (-1U)
> #define MASK_RM (OP_MASK_RM << OP_SH_RM)
> #define MASK_PRED (OP_MASK_PRED << OP_SH_PRED)
> #define MASK_SUCC (OP_MASK_SUCC << OP_SH_SUCC)
> #define MASK_AQ (OP_MASK_AQ << OP_SH_AQ)
> #define MASK_RL (OP_MASK_RL << OP_SH_RL)
> #define MASK_AQRL (MASK_AQ | MASK_RL)
> #define MASK_SHAMT (OP_MASK_SHAMT << OP_SH_SHAMT)
> #define MATCH_SHAMT_REV8_32 (0b11000 << OP_SH_SHAMT)
> #define MATCH_SHAMT_REV8_64 (0b111000 << OP_SH_SHAMT)
> #define MATCH_SHAMT_BREV8 (0b00111 << OP_SH_SHAMT)
> #define MATCH_SHAMT_ZIP_32 (0b1111 << OP_SH_SHAMT)
> #define MATCH_SHAMT_ORC_B (0b00111 << OP_SH_SHAMT)
> #define MASK_VD (OP_MASK_VD << OP_SH_VD)
> #define MASK_VS1 (OP_MASK_VS1 << OP_SH_VS1)
> #define MASK_VS2 (OP_MASK_VS2 << OP_SH_VS2)
> #define MASK_VMASK (OP_MASK_VMASK << OP_SH_VMASK)
> /* Vendor-specific (CORE-V) masks. */
> #define MASK_CV_IS3_UIMM5 ENCODE_CV_IS3_UIMM5 (-1U)
>
> are defined only in riscv-opc.c. So probably the simplest variant for
> now is either just add these new instructions and macroses as I
> proposed in the beginning either put these macroses in riscv-opc.h.
>

Okay, thanks.

Nelson
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