[PATCH] Add AMD znver6 processor support

[Jan Beulich]

On 14.11.2025 15:24, Kalvakuntla, Umesh wrote:
> --- a/opcodes/i386-dis-evex-w.h
> +++ b/opcodes/i386-dis-evex-w.h
> @@ -524,3 +524,13 @@
>    {
>      { "vmovw",	{ EXwS, XMScalar }, 0 },
>    },
> +  /* EVEX_W_MAP6_80 */
> +  {
> +    { "vbmacor16x16x16", { XM, Vex, EXx }, NO_PREFIX },
> +    { "vbmacxor16x16x16", { XM, Vex, EXx }, NO_PREFIX },

These still lack a decode step through evex_len_table[], to prevent the 128-bit
form to disassemble as-if-valid. As said, a testcase addition to this effect is
also wanted. (You may want to look for uses of .insn in some of the *-bad.s to
see what we do elsewhere in this regard.)

Jan