[PATCH] RISC-V: Add support for Smpmpmt v0.6 extension

[Jerry Zhang Jian]

This implements the Smpmpmt (PMP-based Memory Types) extension,
version 0.6[1].

The Smpmpmt extension provides a mechanism to control memory
attributes at the granularity of PMP regions, analogous to Svpbmt
but associated with PMP registers rather than page-table entries.

The extension is currently in frozen state[2].

[1] https://github.com/riscv/riscv-isa-manual/blob/smpmpmt/src/smpmpmt.adoc
[2] https://riscv.atlassian.net/browse/RVS-2948

bfd/ChangeLog:

	* elfxx-riscv.c: Add Smpmpmt v0.6 extension.

gas/ChangeLog:

	* NEWS: Updated.
	* testsuite/gas/riscv/march-help.l: Ditto.

Signed-off-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com>
---
 bfd/elfxx-riscv.c                    | 1 +
 gas/NEWS                             | 6 +++---
 gas/testsuite/gas/riscv/march-help.l | 1 +
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 085d77923a0..1134d671063 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1569,6 +1569,7 @@ static const struct riscv_supported_ext riscv_supported_std_s_ext[] =
   {"smcntrpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smctr",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smepmp",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"smpmpmt",		ISA_SPEC_CLASS_DRAFT,		0, 6, 0 },
   {"smrnmi",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smdbltrp",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
diff --git a/gas/NEWS b/gas/NEWS
index 4bd3d747aa5..fdbd3d90f1b 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -48,9 +48,9 @@ Changes in 2.45:
   .bfloat16 directive.
 
 * Add support for RISC-V standard extensions:
-  ssqosid v1.0, ssnpm v1.0, smnpm v1.0, smmpm v1.0, sspm v1.0, supm v1.0,
-  sha v1.0, zce v1.0, smcdeleg v1.0, ssccfg v1.0, svvptc v1.0, zilsd v1.0,
-  zclsd v1.0, smrnmi v1.0 instruction.
+  smpmpmt v0.6, ssqosid v1.0, ssnpm v1.0, smnpm v1.0, smmpm v1.0, sspm v1.0,
+  supm v1.0, sha v1.0, zce v1.0, smcdeleg v1.0, ssccfg v1.0, svvptc v1.0,
+  zilsd v1.0, zclsd v1.0, smrnmi v1.0 instruction.
 
 * Add support for RISC-V vendor extensions:
   T-Head: xtheadvdot v1.0.
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index 0ce2f896735..99608b21d0c 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -124,6 +124,7 @@ All available -march extensions for RISC-V:
 	smcntrpmf                               1.0
 	smctr                                   1.0
 	smepmp                                  1.0
+	smpmpmt                                 0.6
 	smrnmi                                  1.0
 	smstateen                               1.0
 	smdbltrp                                1.0
-- 
2.51.1