[PATCH] RISC-V: add machine architecture support

Nelson Chu nelson@rivosinc.com
Wed May 14 07:33:42 GMT 2025


Also cc Andrew Waterman since we should know these sm and ss extensions
best.

On Wed, May 14, 2025 at 3:30 PM Nelson Chu <nelson@rivosinc.com> wrote:

>
>
> On Wed, May 14, 2025 at 2:12 PM Jerry Zhang Jian <
> jerry.zhangjian@sifive.com> wrote:
>
>> - The RISC-V profile has defined the following
>>   - Sm1p11, Machine Architecture v1.11
>>   - Sm1p12, Machine Architecture v1.12
>> - The RISC-V ISA manual has defined the following
>>   - Sm1p13, Machine Architecture v1.13
>>
>> Ref:
>> https://github.com/riscv/riscv-profiles/blob/5879c13c924ec5636995c5883f40337e83f6049a/src/rvm23-profile.adoc#L263
>> Ref:
>> https://github.com/riscv/riscv-isa-manual/blob/584390d9d872835b1bc45ab9ea946b56db3ad485/src/machine.adoc#L4
>>
>> Signed-off-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com>
>> ---
>>  bfd/elfxx-riscv.c                    | 3 +++
>>  gas/testsuite/gas/riscv/march-help.l | 1 +
>>  2 files changed, 4 insertions(+)
>>
>> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
>> index 93644423a3d..3d3d677dd7f 100644
>> --- a/bfd/elfxx-riscv.c
>> +++ b/bfd/elfxx-riscv.c
>> @@ -1474,6 +1474,9 @@ static struct riscv_supported_ext
>> riscv_supported_std_s_ext[] =
>>    {"shvsatpa",         ISA_SPEC_CLASS_DRAFT,           1, 0, 0 },
>>    {"shvstvala",                ISA_SPEC_CLASS_DRAFT,           1, 0, 0 },
>>    {"shvstvecd",                ISA_SPEC_CLASS_DRAFT,           1, 0, 0 },
>> +  {"sm",               ISA_SPEC_CLASS_DRAFT,           1, 11, 0 },
>> +  {"sm",               ISA_SPEC_CLASS_DRAFT,           1, 12, 0 },
>> +  {"sm",               ISA_SPEC_CLASS_DRAFT,           1, 13, 0 },
>>    {"smaia",            ISA_SPEC_CLASS_DRAFT,           1, 0, 0 },
>>    {"smcsrind",         ISA_SPEC_CLASS_DRAFT,           1, 0, 0 },
>>    {"smcntrpmf",                ISA_SPEC_CLASS_DRAFT,           1, 0, 0 },
>>
>
> Well the sm extension seems won't be affected by the riscv_spec_class, so
> adding three entries here with the same riscv_spec_class is wrong.  The
> ISA_SPEC_CLASS_DRAFT means the newest ISA spec version, so you should
> choose one version of sm here, generally also the newest one.
>
> Besides, just curious that does the sm and ss extensions mean the machine
> mode and supervisor mode of the privileged spec?  If that is so then it
> seems we should drop the --priv-spec= options, and also let these ss and sm
> extensions control the CSR values?
>
> Nelson
>
>
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