[PATCH] aarch64: Support for FEAT_RME_GPC3

[Richard Earnshaw (lists)]

On 02/05/2025 18:08, Ezra.Sitorus@arm.com wrote:
> From: Ezra Sitorus <ezra.sitorus@arm.com>
> 
> FEAT_RME_GPC3 - RME Granule Protection Check 3 Extension - introduces a method
> for defining a set of windows in the memory map for which Granule Protection
> Checks are skipped, and instead applies a set of default settings associated
> with the window.
> 
> This patch introduces the sysreg gpcbw_el3. Add -march=armv9.5-a to access this
> sysreg since this feature is optional from armv9.5-a.

I've pushed this with a couple of tweaks:

1) Re-flowed the commit message to keep the line length below 72 characters.
2) Fixed the indentation in the assembly file.  Only comments and labels should start in column 1; mnemonics should be indented by one (hard) tab stop.

Please remember to send an update to GCC for the new register in the '.def' file.

R.

> ---
> Regression tested on aarch64-none-linux gnu. If this looks ok, could
> somebody commit this? I'll also do the gcc sysreg update once that
> happens.
> 
> Ezra
> 
>  gas/testsuite/gas/aarch64/gpc3.d | 11 +++++++++++
>  gas/testsuite/gas/aarch64/gpc3.s |  7 +++++++
>  opcodes/aarch64-sys-regs.def     |  1 +
>  3 files changed, 19 insertions(+)
>  create mode 100644 gas/testsuite/gas/aarch64/gpc3.d
>  create mode 100644 gas/testsuite/gas/aarch64/gpc3.s
> 
> diff --git a/gas/testsuite/gas/aarch64/gpc3.d b/gas/testsuite/gas/aarch64/gpc3.d
> new file mode 100644
> index 00000000000..2535aefa273
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/gpc3.d
> @@ -0,0 +1,11 @@
> +#name: RME_GPC3 System register
> +#as: -march=armv9.5-a
> +#objdump: -dr
> +
> +.*:     file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <.*>:
> +[^:]*:	d53e21a0 	mrs	x0, gpcbw_el3
> +[^:]*:	d51e21a0 	msr	gpcbw_el3, x0
> diff --git a/gas/testsuite/gas/aarch64/gpc3.s b/gas/testsuite/gas/aarch64/gpc3.s
> new file mode 100644
> index 00000000000..5aaf1c78b1f
> --- /dev/null
> +++ b/gas/testsuite/gas/aarch64/gpc3.s
> @@ -0,0 +1,7 @@
> +/* RME Granule Protection Check 3 Extension.  */
> +
> +/* Read from system register.  */
> +mrs x0, gpcbw_el3
> +
> +/* Write to system register.  */
> +msr gpcbw_el3, x0
> diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
> index c1b07c710f8..9713ff08d1a 100644
> --- a/opcodes/aarch64-sys-regs.def
> +++ b/opcodes/aarch64-sys-regs.def
> @@ -437,6 +437,7 @@
>    SYSREG ("gcscr_el3",		CPENC (3,6,2,5,0),    	F_ARCHEXT,		AARCH64_FEATURE (GCS))
>    SYSREG ("gcr_el1",		CPENC (3,0,1,0,6),	F_ARCHEXT,		AARCH64_FEATURE (MEMTAG))
>    SYSREG ("gmid_el1",		CPENC (3,1,0,0,4),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (MEMTAG))
> +  SYSREG ("gpcbw_el3",		CPENC (3,6,2,1,5),	F_ARCHEXT,		AARCH64_FEATURE (V9_5A))
>    SYSREG ("gpccr_el3",		CPENC (3,6,2,1,6),	0,			AARCH64_NO_FEATURES)
>    SYSREG ("gptbr_el3",		CPENC (3,6,2,1,4),	0,			AARCH64_NO_FEATURES)
>    SYSREG ("hacr_el2",		CPENC (3,4,1,1,7),	0,			AARCH64_NO_FEATURES)