[PATCH 1/1] doc/riscv: Add description of disassembler options

[Marek Pikuła]

Up to this point, no mention of RISC-V-specific disassembler options
wasn't mentioned in binutils documentation. This patch includes
description for all of the currently supported options.

Signed-off-by: Marek Pikuła <m.pikula@partner.samsung.com>
---
 binutils/doc/binutils.texi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
index 73848e3b390..f8c5bd927fb 100644
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -2764,6 +2764,23 @@ ROM dumps).  In these cases, the function entry mask would otherwise
 be decoded as VAX instructions, which would probably lead the rest
 of the function being wrongly disassembled.
 
+For RISC-V, the following options are supported:
+
+@table @code
+@item numeric
+Print numeric register names, rather than ABI names (e.g., print @code{x2}
+instead of @code{sp}).
+
+@item no-aliases
+Disassemble only into canonical instructions. For example, compressed
+instructions will be represented as such (@code{addi sp,sp,-128} will be
+@code{c.addi16sp sp,-128}).
+
+@item priv-spec=@var{SPEC}
+Print the CSR according to the chosen privilege spec version (e.g.,
+@code{1.9.1}, @code{1.10}, @code{1.11}, @code{1.12}).
+@end table
+
 @item -p
 @itemx --private-headers
 Print information that is specific to the object file format.  The exact
-- 
2.49.0