[PATCH 0/2] LoongArch: More instruction aliases

[WANG Xuerui]

From: WANG Xuerui <git@xen0n.name>

Hi,

Here are some more instruction aliases for LoongArch that should make
the assembly more usable for newcomer developers:

* rdcnt{vl,vh,id}.w: LA32R names for special cases of rdtime[lh].w that
  only write to one destination register.
* {ll.acq,sc.rel}.[wd]: Correct names according to the manual for the
  previously added {llacq,screl}.[wd] instructions. The previous names
  are made aliases to the correct ones instead.

Backwards compatibility should be preserved.

WANG Xuerui (2):
  LoongArch: Support LA32R aliases rdcnt{vl,vh,id}.w
  LoongArch: Fix the mnemonics of ll.acq.[wd] and sc.rel.[wd]

 gas/testsuite/gas/loongarch/fix_op.d        |  3 +
 gas/testsuite/gas/loongarch/fix_op.s        |  5 ++
 gas/testsuite/gas/loongarch/insn_alias_32.d |  3 +
 gas/testsuite/gas/loongarch/insn_alias_32.s |  5 ++
 gas/testsuite/gas/loongarch/insn_int64.d    | 16 ++--
 gas/testsuite/gas/loongarch/insn_int64.s    | 16 ++--
 gas/testsuite/gas/loongarch/load_store_op.d | 88 +++++++++++----------
 gas/testsuite/gas/loongarch/load_store_op.s |  8 ++
 opcodes/loongarch-opc.c                     | 30 +++++--
 9 files changed, 110 insertions(+), 64 deletions(-)

-- 
2.48.1