[PATCH v2] RISC-V: Add support for zilsd and zclsd extensions.

Dongyan Chen chendongyan@isrc.iscas.ac.cn
Mon Mar 17 14:21:40 GMT 2025


This implements the zilsd extensons and the zclsd extensions, version1.0[1]. 

The code was expanded and modified based on the GitHub link[2], incorporating the following changes:

1. According to the manual specifications, zcmlsd was changed to zclsd.

2. Constraints were added for zilsd and zclsd.

3. Testsuites were included.

[1] https://github.com/riscv/riscv-zilsd

[2] https://github.com/nxp-auto-tools/binutils_zilsd/tree/zilsd

Changes for v2:
- Fix a bug with zilsd extension dependency in bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_parse_check_conflicts): Add implicit rules for zclsd extensions.
	(riscv_multi_subset_supports): Handle zilsd and zclsd.
	(riscv_multi_subset_supports_ext): Ditto.

gas/ChangeLog:

	* NEWS: Updated.
	* testsuite/gas/riscv/march-help.l: Ditto.
	* testsuite/gas/riscv/march-fail-zclsd-01.d: New test.
	* testsuite/gas/riscv/march-fail-zclsd-01.l: New test.
	* testsuite/gas/riscv/march-fail-zclsd-02.d: New test.
	* testsuite/gas/riscv/march-fail-zclsd-02.l: New test.
	* testsuite/gas/riscv/march-fail-zilsd.d: New test.
	* testsuite/gas/riscv/march-fail-zilsd.l: New test.

include/ChangeLog:

	* opcode/riscv.h (enum riscv_insn_class): New operand.

---
 bfd/elfxx-riscv.c                             | 35 +++++++++++++++++++
 gas/NEWS                                      |  2 ++
 gas/testsuite/gas/riscv/march-fail-zclsd-01.d |  3 ++
 gas/testsuite/gas/riscv/march-fail-zclsd-01.l |  2 ++
 gas/testsuite/gas/riscv/march-fail-zclsd-02.d |  3 ++
 gas/testsuite/gas/riscv/march-fail-zclsd-02.l |  2 ++
 gas/testsuite/gas/riscv/march-fail-zilsd.d    |  3 ++
 gas/testsuite/gas/riscv/march-fail-zilsd.l    |  2 ++
 gas/testsuite/gas/riscv/march-help.l          |  2 ++
 include/opcode/riscv.h                        |  2 ++
 10 files changed, 56 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/march-fail-zclsd-01.d
 create mode 100644 gas/testsuite/gas/riscv/march-fail-zclsd-01.l
 create mode 100644 gas/testsuite/gas/riscv/march-fail-zclsd-02.d
 create mode 100644 gas/testsuite/gas/riscv/march-fail-zclsd-02.l
 create mode 100644 gas/testsuite/gas/riscv/march-fail-zilsd.d
 create mode 100644 gas/testsuite/gas/riscv/march-fail-zilsd.l

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index fd2cb74df80..4a936b9c0de 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1220,6 +1220,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zcmop", "+zca", check_implicit_always},
   {"zcmt", "+zca,+zicsr", check_implicit_always},
 
+  {"zclsd", "+zca,+zilsd",	check_implicit_always},
+
   {"zicfilp", "+zicsr", check_implicit_always},
   {"zicfiss", "+zimop,+zicsr", check_implicit_always},
 
@@ -1439,6 +1441,8 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zcmop",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcmp",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcmt",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zilsd",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zclsd",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {NULL, 0, 0, 0, 0}
 };
 
@@ -2117,6 +2121,29 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
 	(_("`zfinx' is conflict with the `f/d/q/zfh/zfhmin' extension"));
       no_conflict = false;
     }
+  if (riscv_lookup_subset (rps->subset_list, "zilsd", &subset)
+      && xlen > 32)
+    {
+      rps->error_handler
+	(_("rv%d does not support the `zilsd' extension"), xlen);
+      no_conflict = false;
+    }
+  if (riscv_lookup_subset (rps->subset_list, "zclsd", &subset)
+      && xlen > 32)
+    {
+      rps->error_handler
+	(_("rv%d does not support the `zclsd' extension"), xlen);
+      no_conflict = false;
+    }
+  if (riscv_lookup_subset (rps->subset_list, "zclsd", &subset)
+      && ((riscv_lookup_subset (rps->subset_list, "c", &subset)
+	    && riscv_lookup_subset (rps->subset_list, "f", &subset))
+	    || riscv_lookup_subset (rps->subset_list, "zcf", &subset)))
+    {
+      rps->error_handler
+	(_("`zclsd' is conflict with the `c+f'/ `zcf' extension"));
+      no_conflict = false;
+    }
   if (riscv_lookup_subset (rps->subset_list, "xtheadvector", &subset)
       && riscv_lookup_subset (rps->subset_list, "v", &subset))
     {
@@ -2752,6 +2779,10 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
       return riscv_subset_supports (rps, "zcmp");
     case INSN_CLASS_ZCMT:
       return riscv_subset_supports (rps, "zcmt");
+    case INSN_CLASS_ZILSD:
+      return riscv_subset_supports (rps, "zilsd");
+    case INSN_CLASS_ZCLSD:
+      return riscv_subset_supports (rps, "zclsd");
     case INSN_CLASS_SMCTR_OR_SSCTR:
       return (riscv_subset_supports (rps, "smctr")
 	      || riscv_subset_supports (rps, "ssctr"));
@@ -3058,6 +3089,10 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
       return "zcmp";
     case INSN_CLASS_ZCMT:
       return "zcmt";
+    case INSN_CLASS_ZILSD:
+      return "zilsd";
+    case INSN_CLASS_ZCLSD:
+      return "zclsd";
     case INSN_CLASS_SMCTR_OR_SSCTR:
       return _("smctr' or `ssctr");
     case INSN_CLASS_SVINVAL:
diff --git a/gas/NEWS b/gas/NEWS
index 6c5af12178f..258d8b126c6 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -2,6 +2,8 @@
 
 * Add support for the x86 Zhaoxin PadLock XMODX instructions.
 
+* Add support for RISC-V z[i/c]lsd extension, version 1.0.
+
 Changes in 2.44:
 
 * Add support for the x86 Intel Diamond Rapids AMX instructions, including
diff --git a/gas/testsuite/gas/riscv/march-fail-zclsd-01.d b/gas/testsuite/gas/riscv/march-fail-zclsd-01.d
new file mode 100644
index 00000000000..a98b1f03bbf
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-fail-zclsd-01.d
@@ -0,0 +1,3 @@
+#as: -march=rv64i_zca_zclsd
+#source: empty.s
+#error_output: march-fail-zclsd-01.l
diff --git a/gas/testsuite/gas/riscv/march-fail-zclsd-01.l b/gas/testsuite/gas/riscv/march-fail-zclsd-01.l
new file mode 100644
index 00000000000..0af9281f284
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-fail-zclsd-01.l
@@ -0,0 +1,2 @@
+.*Assembler messages:
+.*Error: .*rv64 does not support the `zclsd' extension
diff --git a/gas/testsuite/gas/riscv/march-fail-zclsd-02.d b/gas/testsuite/gas/riscv/march-fail-zclsd-02.d
new file mode 100644
index 00000000000..6d8d19e6093
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-fail-zclsd-02.d
@@ -0,0 +1,3 @@
+#as: -march=rv32i_zcf_zclsd
+#source: empty.s
+#error_output: march-fail-zclsd-02.l
diff --git a/gas/testsuite/gas/riscv/march-fail-zclsd-02.l b/gas/testsuite/gas/riscv/march-fail-zclsd-02.l
new file mode 100644
index 00000000000..68812c7d3dc
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-fail-zclsd-02.l
@@ -0,0 +1,2 @@
+.*Assembler messages:
+.*Error: .*`zclsd' is conflict with the `c+f'/ `zcf' extension
diff --git a/gas/testsuite/gas/riscv/march-fail-zilsd.d b/gas/testsuite/gas/riscv/march-fail-zilsd.d
new file mode 100644
index 00000000000..951ae6324d4
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-fail-zilsd.d
@@ -0,0 +1,3 @@
+#as: -march=rv64i_zilsd
+#source: empty.s
+#error_output: march-fail-zilsd.l
diff --git a/gas/testsuite/gas/riscv/march-fail-zilsd.l b/gas/testsuite/gas/riscv/march-fail-zilsd.l
new file mode 100644
index 00000000000..e40a89bdc07
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-fail-zilsd.l
@@ -0,0 +1,2 @@
+.*Assembler messages:
+.*Error: .*rv64 does not support the `zilsd' extension
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index b7975ff9ade..73308777a33 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -107,6 +107,8 @@ All available -march extensions for RISC-V:
 	zcmop                                   1.0
 	zcmp                                    1.0
 	zcmt                                    1.0
+	zilsd                                   1.0
+	zclsd                                   1.0
 	shcounterenw                            1.0
 	shgatpa                                 1.0
 	shtvala                                 1.0
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 6bcea638025..90621d09ca5 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -525,6 +525,8 @@ enum riscv_insn_class
   INSN_CLASS_ZCMOP,
   INSN_CLASS_ZCMP,
   INSN_CLASS_ZCMT,
+  INSN_CLASS_ZILSD,
+  INSN_CLASS_ZCLSD,
   INSN_CLASS_SMCTR_OR_SSCTR,
   INSN_CLASS_SVINVAL,
   INSN_CLASS_ZICBOM,
-- 
2.43.0



More information about the Binutils mailing list