[PATCH 1/8] bfd/aarch64-linux: Support reading and writing the GCS core file note

[Thiago Jung Bauermann]

Hello Luis,

Thank you very much for your quick review!

Luis Machado <luis.machado@arm.com> writes:

> On 6/8/25 02:03, Thiago Jung Bauermann wrote:
>> 
>> diff --git a/include/elf/common.h b/include/elf/common.h
>> index fd032d1e03ed..f4b543b353ac 100644
>> --- a/include/elf/common.h
>> +++ b/include/elf/common.h
>> @@ -740,6 +740,9 @@
>>  					/*   Note: name must be "LINUX".  */
>>  #define NT_ARM_ZT       0x40d           /* AArch64 SME2 ZT registers.  */
>>  					/*   Note: name must be "LINUX".  */
>> +#define NT_ARM_GCS	0x410		/* AArch64 Guarded Control Stack
>> +					   registers.  */
>> +					/*   Note  name must be "LINUX".  */
>>  #define NT_ARC_V2	0x600		/* ARC HS accumulator/extra registers.  */
>>  					/*   note name must be "LINUX".  */
>>  #define NT_LARCH_CPUCFG 0xa00		/* LoongArch CPU config registers */
>
> Unrelated, but we might need to update these definitions based on the current Linux kernel
> list.
>
> I see we have a couple entries before GCS. I'm not sure if we use these registers in
> userspace though.
>
> #define NT_ARM_FPMR     0x40e           /* ARM floating point mode register */
> #define NT_ARM_POE      0x40f           /* ARM POE registers */

I plan to add support for FPMR, and most likely POE as well.

> The patch itself looks OK to me. But the binutils folks need to approve it (cc-ed).
>
> Reviewed-By: Luis Machado <luis.machado@arm.com>

Thanks!

-- 
Thiago