[PATCH v2 0/4] Introduce support for CFI landing pad PLT generation in RISC-V

[Kito Cheng]

Hi Nelson:

Yeah, there are several chunks on gcc, glibc and linux kernel as well,
and the current status listed below:
- GCC part is upstreamed and included in GCC 15.
- glibc plans to send out the patch set soon.
- Linux kernel part is under review and it's v17 now.
- Qemu has upstreamed most CFI support except the syscall part since
the linux kernel part is not merged yet.

Those works has been integrated into a public riscv-gnu-toolchain
branch[1] and verified within SiFive.
[1] https://github.com/sifive/riscv-gnu-toolchain/tree/cfi-dev

On Thu, Jun 12, 2025 at 10:26 AM Nelson Chu <nelson@rivosinc.com> wrote:
>
> Thanks Kito :-)  These cfi series in binutils look good to me.  But the binutils part looks like just one piece of the puzzle.  It changes the plt format, so glibc and linux probably need to update something; and also seems to need gcc codegen support to add GNU property hints in assembly code.  From the test cases, it seems the cfi support in binutils are triggered only if the assembly code or objects have GNU properties for cfi, so it shouldn't affect current plt stuff and linux works.  Therefore, I am Okay to commit them if other projects, like gcc, glibc or linux, need binutils to commit cfi stuff first, but it would also be good if we can know whether the cfi stuff really works and are ready in other projects before we commit binutils part.
>
> cc other binutils maintainers, Jeff, and people that I think they probably need to know the progress of cfi stuff.
>
> Thanks
> Nelson
>
> On Wed, Jun 11, 2025 at 4:34 PM Kito Cheng <kito.cheng@sifive.com> wrote:
>>
>> This patch set introduces support for CFI landing pad PLT generation in
>> RISC-V.
>>
>> Change since V1:
>>
>> - Move setup_plt_values to the first patch.
>> - Drop unnessary changeon riscv_elfNN_set_options.
>> - Fix up coding style.
>>
>> Kito Cheng (4):
>>   RISC-V: Refactor PLT generation
>>   RISC-V: Add GNU_PROPERTY_RISCV_FEATURE_1_CFI_SS and
>>     GNU_PROPERTY_RISCV_FEATURE_1_CFI_LP_UNLABELED
>>   RISC-V: Implment the merge logic for GNU_PROPERTY_RISCV_FEATURE_1_AND
>>   RISC-V: Support for unlabeled landing pad PLT generation
>>
>>  bfd/elfnn-riscv.c                             | 306 ++++++++++++++++--
>>  bfd/elfxx-riscv.c                             | 170 ++++++++++
>>  bfd/elfxx-riscv.h                             |  19 ++
>>  binutils/readelf.c                            |  39 +++
>>  .../riscv/property-cfi-lp-unlabeled.d         |   8 +
>>  .../binutils-all/riscv/property-cfi-ss.d      |   8 +
>>  .../testsuite/binutils-all/riscv/property.s   |  41 +++
>>  include/elf/common.h                          |   5 +
>>  include/opcode/riscv.h                        |   1 +
>>  ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp    |   8 +
>>  .../ld-riscv-elf/property-combine-and-1.d     |   6 +
>>  .../ld-riscv-elf/property-combine-and-2.d     |  11 +
>>  .../ld-riscv-elf/property-combine-and-3.d     |  11 +
>>  .../ld-riscv-elf/property-zicfilp-unlabeled.d |  10 +
>>  .../ld-riscv-elf/property-zicfilp-unlabeled.s |  21 ++
>>  ld/testsuite/ld-riscv-elf/property-zicfiss.d  |  10 +
>>  ld/testsuite/ld-riscv-elf/property-zicfiss.s  |  21 ++
>>  ld/testsuite/ld-riscv-elf/property1.s         |  21 ++
>>  ld/testsuite/ld-riscv-elf/property2.s         |   5 +
>>  ld/testsuite/ld-riscv-elf/property3.s         |  21 ++
>>  ld/testsuite/ld-riscv-elf/property4.s         |  21 ++
>>  .../ld-riscv-elf/zicfilp-unlabeled-plt.d      |  35 ++
>>  .../ld-riscv-elf/zicfilp-unlabeled-plt.s      |  21 ++
>>  23 files changed, 784 insertions(+), 35 deletions(-)
>>  create mode 100644 binutils/testsuite/binutils-all/riscv/property-cfi-lp-unlabeled.d
>>  create mode 100644 binutils/testsuite/binutils-all/riscv/property-cfi-ss.d
>>  create mode 100644 binutils/testsuite/binutils-all/riscv/property.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-combine-and-1.d
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-combine-and-2.d
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-combine-and-3.d
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-zicfilp-unlabeled.d
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-zicfilp-unlabeled.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-zicfiss.d
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property-zicfiss.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property1.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property2.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property3.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/property4.s
>>  create mode 100644 ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d
>>  create mode 100644 ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.s
>>
>> --
>> 2.34.1
>>